KR20120090396A

KR20120090396A - Solar cell and method of fabircating the same

Info

Publication number: KR20120090396A
Application number: KR1020110010790A
Authority: KR
Inventors: 김승태
Original assignee: 엘지이노텍 주식회사
Priority date: 2011-02-07
Filing date: 2011-02-07
Publication date: 2012-08-17

Abstract

A solar cell according to an embodiment includes a substrate, a window layer on the substrate, a buffer layer on the window layer, and a light absorbing layer on the buffer layer; A plurality of solar cells in which a rear electrode layer is formed on the light absorbing layer; A diode formed on the substrate; And a connection electrode electrically connecting the plurality of solar cells and the diode, wherein the diode comprises: a connection electrode; A first conductive layer; And a second conductive layer, wherein the connection electrode and the window layer, the light absorbing layer and the first conductive layer, and the back electrode layer and the second conductive layer are each formed of the same material.

Description

SOLAR CELL AND METHOD OF FABIRCATING THE SAME}

An embodiment relates to a solar cell and a manufacturing method thereof.

Recently, as energy demand increases, development of a solar cell converting solar energy into electrical energy is in progress.

In particular, CIGS-based solar cells that are pn heterojunction devices having a substrate structure including a glass substrate, a metal back electrode layer, a p-type CIGS-based light absorbing layer, a high resistance buffer layer, an n-type window layer, and the like are widely used.

In such a solar cell, a plurality of cells are formed in one panel, and the cells are connected in series.

If a failure occurs in any one of these cells, the panel is not used and is discarded.

In addition, when a shadow is caused by an external object on the solar cell panel, or when foreign matter such as impurities is attached to the solar cell panel, the shadowed or foreign matter is attached to the cell, which causes a problem that the load becomes large and overheats.

The embodiment provides a solar cell and a method of manufacturing the same, which can be used as a solar cell without deterioration even when a defective cell is generated or a shadow is generated on the solar cell panel, and a process is simplified and integrated by forming a diode on the upper surface of the substrate. .

The solar cell according to the embodiment forms a cell unit including a plurality of cells on the substrate and a diode connected in parallel with the plurality of cells, and then connects the plurality of substrates in series by conductive wires.

Therefore, when one of the cell units is shadowed or foreign matter is formed on the cell unit, the charge is formed to bypass the diode, so that even if a defective cell or a shadow is generated on the solar cell panel, no deterioration occurs. Solar cells can be used.

In addition, since diodes may be integrated in the edge region of the upper surface of the substrate and diodes may be formed in the process of forming solar cells, the process may be simplified and productivity may be improved.

In contrast to the conventional thin film solar cell structure, since the window layer is formed to be in contact with the substrate, the refractive index difference between the air / glass / window layer is formed to have a gentle structure, thereby reducing the reflection loss of light incident to the solar cell. Since the transparent electrode layer can be prevented from being oxidized by water (H ₂ O) or the like to deteriorate its electrical characteristics, it is possible to provide a solar cell having improved reliability.

1 is a plan view illustrating a solar cell according to an embodiment.
FIG. 2 is a cross-sectional view illustrating a cross section taken along AA ′ in FIG. 1.
3 is a cross-sectional view taken along the line BB ′ of FIG. 1.
4 to 12 are cross-sectional views illustrating a method of manufacturing a solar cell according to an embodiment.
13 is a diagram illustrating a circuit including a solar cell according to an embodiment.

In the description of the embodiments, where each substrate, layer, film, or electrode is described as being formed "on" or "under" of each substrate, layer, film, or electrode, etc. , “On” and “under” include both “directly” or “indirectly” other components. In addition, the upper or lower reference of each component is described with reference to the drawings. In the drawings, the size of each component may be exaggerated for description, and does not mean the size to be actually applied.

Hereinafter, the solar cell will be described in more detail according to the manufacturing process of the solar cell.

FIG. 1 is a plan view illustrating a solar cell according to an embodiment, and FIG. 2 is a cross-sectional view illustrating a cross section taken along AA ′, which is a region in which a cell is formed in FIG. 1, and FIG. It is sectional drawing which shows the cross section cut along BB` which is an area | region.

The solar cell according to the embodiment includes a first cell C1, a second cell C2, a third cell C3, a fourth cell C4, a fifth cell C5, and a sixth cell C6. do.

The back electrode layer 600 formed on the first cell C1 is electrically connected to the light absorbing layer 500 formed on the second cell C2. Therefore, the first cell C1 and the second cell C2 are electrically connected. The first cell C1, the second cell C2, the third cell C3, the fourth cell C4, the fifth cell C5, and the sixth cell C6 are electrically configured as described above. Can be connected.

The first cell C1 is electrically connected to the first bus bar 810, and the sixth cell C6 is electrically connected to the second bus bar 820.

In addition, the first bus bar 810 and the second bus bar 820 may be parallel to the first cells C1 to sixth cell C6 and formed at both ends of the substrate 100.

In addition, a diode D is formed on the substrate 100. The diode D may be formed in a deposition and patterning process of each layer for forming the first cell C1 to sixth cell C6.

The diode D may be formed in an edge region of the substrate 100 in which the cells C1, C2... Are not formed on the substrate 100.

The diode D is connected in parallel with the plurality of cells C1, C2...

When the diode D has a shadow on one of the cells C1, C2 ..., or a foreign material is formed on the solar cell panel, current may be diverted to the diode D. So that it is formed.

As shown, the diode D may be formed on the substrate 100 in the same manner as the plurality of cells C1, C2..., And may be formed in the peripheral region of the substrate 100.

Since the first cells C1 to 6th cell C6 are formed in the same shape, only a part of the cross-sectional views will be presented.

FIG. 2 is a cross-sectional view illustrating a cross section taken along line AA ′ in FIG. 1, and FIG. 3 is a cross-sectional view illustrating a cross section taken along line B-B ′ in FIG. 1.

2 and 3, one of the first through holes TH1 in the region where the first cells C1 to 6th cell C6 is formed is formed in the region where the diode D is formed. 1 may extend into the through hole TH1 ′. That is, one of the first through holes TH1 may be formed longer than other through holes to become the first through hole TH1 ′ in the region where the diode D is formed.

The window layer 200 in the region where the diode D is formed may be etched by the first through hole TH1 ′ to expose the top surface of the substrate 100, and the first layer may be exposed by the window layer 200. The bus bar 810 and the second bus bar 820 may be electrically connected to each other.

The diode D and the first cells C1 to 6th cell C6 may be formed of the same material in the same process. That is, the connection electrode 210 and the window layer 200 are formed of the same material, and the light absorbing layer 500, the first conductive layer 510, the back electrode layer 600, and the second conductive layer 610 are made of the same material. It can be formed as.

4 to 12 are cross-sectional views illustrating a method of manufacturing a solar cell according to an embodiment.

4 is a diagram illustrating a substrate 100 and a window layer 200 in a region where a plurality of cells are formed, and FIG. 5 illustrates the substrate 100 and a connection electrode 210 in a region where a diode D is formed. Figure is shown.

4 and 5, the first cell C1, the second cell C2, the third cell C3, the fourth cell C4, the fifth cell C5, and the sixth cell C6. Preparing a substrate 100 for supporting the.

In general, the substrate 100 may be glass, and a ceramic substrate such as alumina, a stainless steel, a titanium substrate, or a polymer substrate may also be used.

Soda lime glass may be used as the glass substrate, and polyimide may be used as the polymer substrate.

In addition, the substrate 100 may be rigid or flexible.

The light blocking layer 150 may be formed in a region where the diode is formed on the upper surface of the substrate 100. Since sunlight is blocked by the light blocking layer 150, the first, second, and third diodes D1, D2, and D3 may not be generated by sunlight. The light blocking layer 150 may include a material having a light absorption rate of 50% or more, for example, a metal, or may include an opaque or translucent resin.

Next, the window layer 200 and the connection electrode 210 are formed on the substrate 100.

Next, the window layer 200, the connection electrode 210, and the light blocking layer 150 may be patterned so that the through holes TH1 and TH1 ′ may be formed to expose the top surface of the substrate 100.

The window layer 200 and the back electrode layer 600 are electrically connected to each other by the connection wiring 700.

The window layer 200 is a layer for forming a pn junction with the light absorbing layer 500. Since the window layer 200 functions as a transparent electrode on the front of the solar cell, the window layer 200 may be formed of zinc oxide (ZnO) having high light transmittance and good electrical conductivity. have.

In this case, an electrode having a low resistance value may be formed by doping aluminum to the zinc oxide.

The zinc oxide thin film as the window layer 200 may be formed by a method of depositing using a ZnO target by RF sputtering, reactive sputtering using a Zn target, and organometallic chemical vapor deposition.

In addition, a double structure in which an indium tin oxide (ITO) thin film having excellent electro-optic properties is deposited on a zinc oxide thin film may be formed.

The connection electrode 210 may be formed of the same material as the window layer 200 and may be formed in the same process, and may be formed in the peripheral region of the substrate 100.

4 to 6, a portion of the first through holes TH1 formed in the first cell C1 to the sixth cell C6 is formed to be long so that the diode D is formed. It may be extended to become the through groove TH1 '.

That is, in the same process, the through holes TH1 ′ and the first through holes formed in the first to sixth cells C6 are formed in the region where the diode D is formed by changing the patterning of the lengths. TH1 may be formed.

The through groove TH1 ′ of the region where the diode D is formed may be formed by changing a position, and thus the capacitance of the diode D may be adjusted.

Subsequently, as shown in FIG. 7, the high resistance buffer layer 300, the buffer layer 400, and the light absorbing layer 500 are formed on the window layer 200.

The high resistance buffer layer 300 may include zinc oxide (i-ZnO) that is not doped with impurities. The energy band gap of the high resistance buffer layer 300 is about 3.1 eV to 3.3 eV.

The buffer layer 400 formed on the high resistance buffer layer 300 may be formed of at least one layer, and cadmium sulfide (CdS) may be stacked.

In this case, the buffer layer 400 is an n-type semiconductor layer, and the light absorbing layer 500 is a p-type semiconductor layer. Thus, the light absorbing layer 500 and the buffer layer 400 form a pn junction.

That is, since the light absorption layer 500 and the window layer 200 have a large difference between the lattice constant and the energy band gap, the buffer layer 400 having the band gap in between the two materials may be inserted to form a good junction. Can be.

The light absorbing layer 500 is formed on the buffer layer 400. The light absorbing layer 500 includes an I-III-VI compound. In more detail, the light absorbing layer 500 includes a copper-indium-gallium-selenide-based (Cu (In, Ga) Se ₂ , CIGS-based) compound.

Alternatively, the light absorbing layer 500 may include a copper-indium selenide (CuInSe ₂ , CIS based) compound or a copper-gallium selenide (CuGaSe ₂ , CIS based) compound.

For example, in order to form the light absorbing layer 500, a CIG-based metal precursor film is formed on the window layer 200 by using a copper target, an indium target, and a gallium target.

Thereafter, the metal precursor film is reacted with selenium (Se) by a selenization process to form a CIGS-based light absorbing layer 500.

In addition, the light absorbing layer 500 may form copper, indium, gallium, selenide (Cu, In, Ga, Se) by co-evaporation.

The light absorbing layer 500 receives external light and converts the light into electrical energy. The light absorbing layer 500 generates photo electromotive force by the photoelectric effect.

Subsequently, as shown in FIG. 8, second through holes TH2 penetrating the light absorbing layer 500, the buffer layer 400, and the high resistance buffer layer 300 are formed.

The second through holes TH2 may be formed in a mechanical manner, and a portion of the window layer 200 is exposed.

9, the back electrode layer 600 and the connection wiring 700 are formed on the light absorbing layer 500.

When the back electrode layer 600 is stacked on the light absorbing layer 500, the connection electrode 700 may be inserted into the second through holes TH2 to form the connection wiring 700. That is, the back electrode layer 600 and the connection wiring 700 may be formed of the same material.

The back electrode layer 600 may be formed of a conductor such as metal.

For example, the back electrode layer 600 may be formed by a sputtering process using a molybdenum (Mo) target.

This is because of high electrical conductivity of molybdenum (Mo), ohmic bonding with the light absorbing layer 500, and high temperature stability under Se atmosphere.

In addition, although not shown in the drawing, the back electrode layer 600 may be formed of at least one layer.

When the back electrode layer 600 is formed of a plurality of layers, the layers constituting the back electrode layer 600 may be formed of different materials.

In addition, the back electrode layer 600 may be arranged in a stripe form or a matrix form and may correspond to each cell.

Next, as shown in FIG. 10, third through holes TH3 penetrating the back electrode layer 600, the light absorbing layer 500, the buffer layer 400, and the high resistance buffer layer 300 are formed.

The third through holes TH3 may be formed in a mechanical manner, and part of the window layer 200 is exposed.

Each cell may be separated from each other by the third through holes TH3.

The high resistance buffer layer 300, the buffer layer 400, the light absorbing layer 500, and the back electrode layer 600 may be arranged in a stripe shape or a matrix shape by the third through holes TH3.

The third through holes TH3 are not limited to the above shape, but may be formed in various shapes.

As shown in FIG. 11, the peripheral area of the substrate 100 is patterned to form the first bus bar 810 and the second bus bar 820. In the patterning process, the diode D is the diode D and the diode D is the first cell C1 to the sixth in the circumferential region of the substrate 100 where the first cell C1 to the sixth cell C6 are not formed. It is formed to be distinguished from the cell C6.

In the process of forming the window layer 200 to the back electrode layer 600, the first cells C1 to 6th cell C6 and the diode D are formed and separated by the patterning process. ) May be formed including the same layer as the first cell (C1) to the sixth cell (C6).

That is, the diode D is formed by stacking the same layer in the process of forming the first cell (C1) to the sixth cell (C6) and by the patterning the first cell (C1) to the sixth cell ( It is formed separately from C6).

Next, the first bus bar 810 and the second bus bar 820 are formed to be connected to the window layer 200.

The first bus bar 810 and the second bus bar 820 are the back electrode layer 600, the light absorbing layer 500, the buffer layer 400, and the high resistance buffer layer 300 formed in the peripheral region of the substrate 100. It may be formed after exposing the window layer 200 by removing a portion of).

In the above process, the connection electrode 210 may be formed of the same material as the window layers 200 of the plurality of solar cells and may be formed in the same process.

In the present embodiment, the first bus bar 810 and the second bus bar 820 are connected to the window layer 200, but the first bus bar 810 and the second bus are connected to the light absorbing layer 600. Bar 820 may be connected.

A first bus bar 810 is formed in the first cell C1, and a second bus bar 820 is formed in the sixth cell C6. The first bus bar 810 may be connected to the (+) electrode, and the second bus bar 820 may be connected to the (-) electrode.

In addition, the plurality of cells C1, C2... And the diode D may be electrically connected by the window layer 200.

Referring to FIG. 12, a diode D and a plurality of cells C1, C2... Are electrically connected through the window layer 200, and the window layer 200 is the first bus bar 810. And a second bus bar 820.

The diode D and the plurality of cells C1, C2... May be connected in parallel.

The capacity of the diode D may vary depending on the area to be etched and the through groove TH1 ′.

13 is a diagram illustrating a circuit including a solar cell according to an embodiment.

A plurality of solar cells connected in series usually flow current through a plurality of cells C1, C2, C3..., But to any one of the cells C1, C2, C3. When a shadow is formed or a foreign material is formed on the solar cell panel, the cell in which the defect occurs is operated as a passive device, that is, a resistor, not an active device that generates power, and thus counter electromotive force is generated in the cell.

Therefore, a conduction voltage is applied to the diode connected to the cell so that current flows through the diode, not the cell. That is, the current is bypassed through the diode D.

The first cell C1 to the sixth cell C6 may be bundled into a first cell unit CU1. The second cell unit CU2 and the third cell unit CU3 may be electrically connected to the first cell unit CU1.

When the first cell unit CU1 to the third cell unit CU3 normally operate, current flows through the first cell unit CU1 to the third cell unit CU3 (X path).

However, for example, when a part of the cells of the second cell unit CU2 is shadowed or defective, current flows through the second diode D2 connected in parallel with the second cell unit CU2 ( Y path).

In the solar cell according to the embodiment described above, when one of the plurality of cell units has a shadow or a foreign substance is formed, a defective cell is generated by forming a current to bypass the diode connected in parallel with the corresponding cell unit. In addition, even if a shadow occurs on the solar panel can use the solar cell without deterioration.

In addition, since the diode is formed in the module, not the junction box, that is, the edge of the upper surface of the substrate 100, integration of the device is possible.

In addition, the diode D may be formed in the deposition and patterning process of each layer for forming the first to sixth cells C6 on the substrate 100, thereby simplifying the process.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, It will be understood that various modifications and applications are possible. For example, each component specifically shown in the embodiments can be modified and implemented. It is to be understood that all changes and modifications that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

Claims

A substrate, a window layer on the substrate, a buffer layer on the window layer, and a light absorbing layer on the buffer layer; A plurality of solar cells in which a rear electrode layer is formed on the light absorbing layer;
A diode formed on the substrate; And
And a connection electrode electrically connecting the plurality of solar cells and the diode.
The diode comprises a connection electrode; A first conductive layer; And a second conductive layer, wherein the connection electrode and the window layer, the light absorbing layer and the first conductive layer, and the back electrode layer and the second conductive layer are each formed of the same material.

The method of claim 1,
The diode is a solar cell formed in the edge (Edge) region of the substrate.

The method of claim 1,
The diode is a solar cell connected in parallel with a plurality of the solar cell.

The method of claim 1,
The plurality of solar cells are connected in parallel by the diode and the back electrode layer.

The method of claim 1,
A solar cell comprising a light blocking layer formed between the substrate and the connection electrode.

The method of claim 5,
The light blocking layer is a solar cell comprising a metal or an opaque or translucent resin.

The method of claim 1,
And a first bus bar and a second bus bar electrically connected to the diode and the plurality of solar cell cells and having opposite polarities to each other.

The method of claim 7, wherein
The first bus bar and the second bus bar are formed in the peripheral region of the substrate.