KR101091253B1 - Solar cell and method of fabircating the same - Google Patents

Solar cell and method of fabircating the same Download PDF

Info

Publication number
KR101091253B1
KR101091253B1 KR1020090105418A KR20090105418A KR101091253B1 KR 101091253 B1 KR101091253 B1 KR 101091253B1 KR 1020090105418 A KR1020090105418 A KR 1020090105418A KR 20090105418 A KR20090105418 A KR 20090105418A KR 101091253 B1 KR101091253 B1 KR 101091253B1
Authority
KR
South Korea
Prior art keywords
pattern
electrode
layer pattern
layer
solar cell
Prior art date
Application number
KR1020090105418A
Other languages
Korean (ko)
Other versions
KR20110048724A (en
Inventor
최성범
Original Assignee
엘지이노텍 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 엘지이노텍 주식회사 filed Critical 엘지이노텍 주식회사
Priority to KR1020090105418A priority Critical patent/KR101091253B1/en
Publication of KR20110048724A publication Critical patent/KR20110048724A/en
Application granted granted Critical
Publication of KR101091253B1 publication Critical patent/KR101091253B1/en

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/042—PV modules or arrays of single PV cells
    • H01L31/0445—PV modules or arrays of single PV cells including thin film solar cells, e.g. single thin film a-Si, CIS or CdTe solar cells
    • H01L31/046—PV modules composed of a plurality of thin film solar cells deposited on the same substrate
    • H01L31/0463—PV modules composed of a plurality of thin film solar cells deposited on the same substrate characterised by special patterning methods to connect the PV cells in a module, e.g. laser cutting of the conductive or active layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H01L31/0392—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate
    • H01L31/03923—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate including AIBIIICVI compound materials, e.g. CIS, CIGS
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/042—PV modules or arrays of single PV cells
    • H01L31/048—Encapsulation of modules
    • H01L31/0488—Double glass encapsulation, e.g. photovoltaic cells arranged between front and rear glass sheets
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264—Inorganic materials
    • H01L31/032—Inorganic materials including, apart from doping materials or other impurities, only compounds not provided for in groups H01L31/0272 - H01L31/0312
    • H01L31/0322—Inorganic materials including, apart from doping materials or other impurities, only compounds not provided for in groups H01L31/0272 - H01L31/0312 comprising only AIBIIICVI chalcopyrite compounds, e.g. Cu In Se2, Cu Ga Se2, Cu In Ga Se2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type
    • H01L31/0749—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type including a AIBIIICVI compound, e.g. CdS/CulnSe2 [CIS] heterojunction solar cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/541—CuInSe2 material PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Abstract

실시예에 따른 태양전지는 기판 상에 형성된 제1전극층; 상기 제1전극층 상에 단위 셀 별로 형성된 흡수층 패턴; 상기 흡수층 패턴 사이에 형성된 절연층 패턴; 상기 흡수층 패턴 및 절연층 패턴 상에 형성된 제3전극층; 및 상기 제3전극층 상에 형성된 상부 기판을 포함하며, 상기 절연층 패턴에 의해 상기 흡수층 패턴은 서로 분리된 것을 포함한다.A solar cell according to an embodiment includes a first electrode layer formed on a substrate; An absorption layer pattern formed for each unit cell on the first electrode layer; An insulation layer pattern formed between the absorption layer patterns; A third electrode layer formed on the absorbing layer pattern and the insulating layer pattern; And an upper substrate formed on the third electrode layer, wherein the absorption layer patterns are separated from each other by the insulating layer pattern.

실시예에 따른 태양전지의 제조방법은 기판 상에 제1전극층을 형성하는 단계; 상기 제1전극층 상에 단위 셀 별로 흡수층 패턴을 형성하는 단계; 상기 흡수층 패턴 사이에 절연층 패턴을 형성하는 단계; 상기 흡수층 패턴 및 절연층 패턴 상에 제3전극층을 형성하는 단계; 상기 제3전극층 상에 상부 기판을 형성하는 단계를 포함하며, 상기 절연층 패턴에 의해 상기 흡수층 패턴은 서로 분리된 것을 포함한다.A method of manufacturing a solar cell according to an embodiment includes forming a first electrode layer on a substrate; Forming an absorption layer pattern for each unit cell on the first electrode layer; Forming an insulating layer pattern between the absorbing layer patterns; Forming a third electrode layer on the absorption layer pattern and the insulating layer pattern; And forming an upper substrate on the third electrode layer, wherein the absorption layer patterns are separated from each other by the insulating layer pattern.

태양전지, 불량셀 Solar Cell, Bad Cell

Description

태양전지 및 이의 제조방법{SOLAR CELL AND METHOD OF FABIRCATING THE SAME}SOLAR CELL AND METHOD OF FABIRCATING THE SAME}

실시예는 태양전지 및 이의 제조방법에 관한 것이다. An embodiment relates to a solar cell and a manufacturing method thereof.

최근 에너지 수요가 증가함에 따라서, 태양광 에너지를 전기에너지로 변환시키는 태양전지에 대한 개발이 진행되고 있다. Recently, as energy demand increases, development of a solar cell converting solar energy into electrical energy is in progress.

특히, 유리 기판, 금속 후면 전극층, p형 CIGS 계 광 흡수층, 고저항 버퍼층, n형 창층 등을 포함하는 기판 구조의 pn 헤테로 접합 장치인 CIGS계 태양전지가 널리 사용되고 있다. In particular, CIGS-based solar cells that are pn heterojunction devices having a substrate structure including a glass substrate, a metal back electrode layer, a p-type CIGS-based light absorbing layer, a high resistance buffer layer, an n-type window layer, and the like are widely used.

이러한 태양전지는 하나의 패널(panel)에 복수개의 셀이 형성되어, 상기 셀을 직렬로 연결하여 사용하고 있다.In such a solar cell, a plurality of cells are formed in one panel, and the cells are connected in series.

이러한 복수개의 셀 중 어느 하나의 셀에 불량이 발생하면, 이 패널은 사용하지 못하고 폐기하게 된다.If a failure occurs in any one of these cells, the panel is not used and is discarded.

실시예는 불량셀이 발생하더라도 태양전지로 사용할 수 있는 태양전지 및 이의 제조방법을 제공한다. The embodiment provides a solar cell and a method of manufacturing the same that can be used as a solar cell even if a defective cell occurs.

실시예에 따른 태양전지는 기판 상에 형성된 제1전극층; 상기 제1전극층 상에 단위 셀 별로 형성된 흡수층 패턴; 상기 흡수층 패턴 사이에 형성된 절연층 패턴; 상기 흡수층 패턴 및 절연층 패턴 상에 형성된 제3전극층; 및 상기 제3전극층 상에 형성된 상부 기판을 포함하며, 상기 절연층 패턴에 의해 상기 흡수층 패턴은 서로 분리된 것을 포함한다.A solar cell according to an embodiment includes a first electrode layer formed on a substrate; An absorption layer pattern formed for each unit cell on the first electrode layer; An insulation layer pattern formed between the absorption layer patterns; A third electrode layer formed on the absorbing layer pattern and the insulating layer pattern; And an upper substrate formed on the third electrode layer, wherein the absorption layer patterns are separated from each other by the insulating layer pattern.

실시예에 따른 태양전지의 제조방법은 기판 상에 제1전극층을 형성하는 단계; 상기 제1전극층 상에 단위 셀 별로 흡수층 패턴을 형성하는 단계; 상기 흡수층 패턴 사이에 절연층 패턴을 형성하는 단계; 상기 흡수층 패턴 및 절연층 패턴 상에 제3전극층을 형성하는 단계; 상기 제3전극층 상에 상부 기판을 형성하는 단계를 포함하며, 상기 절연층 패턴에 의해 상기 흡수층 패턴은 서로 분리된 것을 포함한다.A method of manufacturing a solar cell according to an embodiment includes forming a first electrode layer on a substrate; Forming an absorption layer pattern for each unit cell on the first electrode layer; Forming an insulating layer pattern between the absorbing layer patterns; Forming a third electrode layer on the absorption layer pattern and the insulating layer pattern; And forming an upper substrate on the third electrode layer, wherein the absorption layer patterns are separated from each other by the insulating layer pattern.

기존 직렬로 형성된 태양전지 모듈에서 하나의 셀이 불량인 경우 전체 모듈의 성능은 "0"이 되어 모듈을 사용할 수 없었지만, 실시예에 따른 태양전지 및 이의 제조방법은 각 셀을 병렬로 연결하여 어느 셀에 불량이 발생하여도 태양전지 모듈을 사용할 수 있다.If one cell is defective in a conventional solar cell module formed in series, the performance of the entire module becomes "0" and the module cannot be used. However, the solar cell and its manufacturing method according to the embodiment are connected to each cell in parallel. Even if a defect occurs in the cell, the solar cell module can be used.

또한, 다양한 모양의 마스크를 이용하여 병렬 형태로 각 셀을 형성하여, 각 셀의 모양도 다양하게 형성할 수 있어, 태양전지의 심미감 및 장식성을 제공할 수 있다.In addition, by forming each cell in a parallel form using a mask of various shapes, it is possible to form a variety of shapes of each cell, it is possible to provide aesthetic and decorative properties of the solar cell.

실시 예의 설명에 있어서, 각 기판, 층, 막 또는 전극 등이 각 기판, 층, 막, 또는 전극 등의 "상(on)"에 또는 "아래(under)"에 형성되는 것으로 기재되는 경우에 있어, "상(on)"과 "아래(under)"는 "직접(directly)" 또는 "다른 구성요소를 개재하여 (indirectly)" 형성되는 것을 모두 포함한다. 또한 각 구성요소의 상 또는 아래에 대한 기준은 도면을 기준으로 설명한다. 도면에서의 각 구성요소들의 크기는 설명을 위하여 과장될 수 있으며, 실제로 적용되는 크기를 의미하는 것은 아니다.In the description of the embodiments, where each substrate, layer, film, or electrode is described as being formed "on" or "under" of each substrate, layer, film, or electrode, etc. , "On" and "under" include both "directly" or "indirectly" formed through other components. In addition, the upper or lower reference of each component is described with reference to the drawings. The size of each component in the drawings may be exaggerated for the sake of explanation and does not mean the size actually applied.

도 7은 실시예에 따른 태양전지를 도시한 단면도이다.7 is a cross-sectional view showing a solar cell according to an embodiment.

실시예에 따른 태양전지는 도 7에 도시된 바와 같이, 제1전극(200), 제2전극 패턴(250), 흡수층 패턴(300), 버퍼층 패턴(400), 제3전극(500) 및 상부패널(600)을 포함한다.As illustrated in FIG. 7, the solar cell according to the embodiment includes a first electrode 200, a second electrode pattern 250, an absorption layer pattern 300, a buffer layer pattern 400, a third electrode 500, and an upper portion. Panel 600.

상기 제2전극 패턴(250), 흡수층 패턴(300), 버퍼층 패턴(400)은 단위 셀 별로 적층되어 형성되며, 단위 셀 사이에는 절연층 패턴(470)이 형성된다.The second electrode pattern 250, the absorption layer pattern 300, and the buffer layer pattern 400 are stacked in unit cells, and an insulation layer pattern 470 is formed between the unit cells.

즉, 상기 절연층 패턴(470)에 의해 상기 단위 셀들은 서로 분리되도록 형성된다.That is, the unit cells are formed to be separated from each other by the insulating layer pattern 470.

상기 단위 셀들은 상기 제1전극(200)과 제3전극(500)에 의해 병렬 연결 구조 를 이루게 된다.The unit cells form a parallel connection structure by the first electrode 200 and the third electrode 500.

상기 제2전극 패턴(250), 흡수층 패턴(300), 버퍼층 패턴(400)으로 이루어진 상기 단위 셀들은 서로 병렬 연결되며, 평면에서 보았을 경우, 각각의 단위 셀은 삼각형, 사각형, 원형, 별모양을 포함하는 다각형 및 원형의 모양으로 형성될 수 있다.The unit cells consisting of the second electrode pattern 250, the absorber layer pattern 300, and the buffer layer pattern 400 are connected in parallel to each other. When viewed in a plan view, each unit cell has a triangular, rectangular, circular, and star shape. It may be formed in the shape of a polygon and a circle containing.

이하, 태양전지 제조공정에 따라 상기 태양전지를 더 자세히 설명하도록 한다.Hereinafter, the solar cell will be described in more detail according to the solar cell manufacturing process.

도 1 내지 도 7은 실시예에 따른 태양전지의 제조공정을 도시한 단면도이다.1 to 7 are sectional views showing the manufacturing process of the solar cell according to the embodiment.

도 1에 도시된 바와 같이, 기판(100) 상에 제1전극(200)을 형성한다.As shown in FIG. 1, the first electrode 200 is formed on the substrate 100.

상기 기판(100)은 유리(glass)가 사용되고 있으며, 알루미나와 같은 세라믹 기판, 스테인레스 스틸, 티타늄기판 또는 폴리머 기판 등도 사용될 수 있다.The substrate 100 may be glass, and a ceramic substrate such as alumina, stainless steel, a titanium substrate, or a polymer substrate may also be used.

유리 기판으로는 소다라임 유리(sodalime glass)를 사용할 수 있으며, 폴리머 기판으로는 폴리이미드(polyimide)를 사용할 수 있다.Soda lime glass may be used as the glass substrate, and polyimide may be used as the polymer substrate.

또한, 상기 기판(100)은 리지드(rigid)하거나 플렉서블(flexible)할 수 있다.In addition, the substrate 100 may be rigid or flexible.

상기 제1전극(200)은 투명한 도전물질로서, 상기 기판(100) 상에 스퍼터링 공정을 진행하여 알루미늄(Al), 붕소(B) 또는 갈륨(Ga)으로 도핑된 산화 아연으로 형성될 수 있다.The first electrode 200 is a transparent conductive material and may be formed of zinc oxide doped with aluminum (Al), boron (B), or gallium (Ga) by performing a sputtering process on the substrate 100.

상기 제1전극(200)은 투명전극으로 광투과율이 높고 전기 전도성이 좋은 산 화 아연(ZnO)으로 형성된다.The first electrode 200 is a transparent electrode made of zinc oxide (ZnO) having high light transmittance and good electrical conductivity.

이때, 상기 산화 아연에 알루미늄(Al), 붕소(B) 또는 갈륨(Ga)을 도핑함으로써 낮은 저항값을 갖는 전극을 형성할 수 있다.In this case, an electrode having a low resistance value may be formed by doping aluminum (Al), boron (B), or gallium (Ga) on the zinc oxide.

상기 제1전극(200)인 산화 아연 박막은 RF, DC, DC 펄스(pulse) 스퍼터링방법으로 ZnO 타겟을 사용하여 증착하는 방법과 Zn 타겟을 이용한 반응성 스퍼터링, 그리고 유기금속화학증착법 등으로 형성될 수 있다.The zinc oxide thin film as the first electrode 200 may be formed using a ZnO target by RF, DC, or DC pulse sputtering, reactive sputtering using a Zn target, and an organometallic chemical vapor deposition method. have.

또한, 전기광학적 특성이 뛰어난 ITO(Indium tin Oxide) 박막을 산화 아연 박막 상에 층착한 2중 구조를 형성할 수도 있다.In addition, a double structure in which an indium tin oxide (ITO) thin film having excellent electro-optical properties is laminated on a zinc oxide thin film may be formed.

상기 제1전극(200)은 500~1000nm의 두께로 형성될 수 있다.The first electrode 200 may be formed to a thickness of 500 ~ 1000nm.

이어서, 도 2에 도시된 바와 같이, 상기 제1전극(200) 상에 제2전극 패턴(250), 광 흡수층 패턴(300) 및 버퍼층 패턴(400)을 형성한다.Subsequently, as shown in FIG. 2, the second electrode pattern 250, the light absorbing layer pattern 300, and the buffer layer pattern 400 are formed on the first electrode 200.

상기 제2전극 패턴(250), 광 흡수층 패턴(300) 및 버퍼층 패턴(400)은 분리패턴(350)에 의해 단위 셀로 분리될 수 있다.The second electrode pattern 250, the light absorbing layer pattern 300, and the buffer layer pattern 400 may be separated into unit cells by a separation pattern 350.

상기 제2전극 패턴(250)은 금속 등의 도전체로 형성될 수 있으며, 도전성 물질로 형성될 수 있다.The second electrode pattern 250 may be formed of a conductor such as a metal, and may be formed of a conductive material.

예를 들어, 상기 제2전극 패턴(250)은 몰리브덴(Mo) 타겟을 사용하여, 스퍼터링(sputtering) 공정에 의해 형성될 수 있다. For example, the second electrode pattern 250 may be formed by a sputtering process using a molybdenum (Mo) target.

이는, 몰리브덴(Mo)이 가진 높은 전기전도도, 광 흡수층과의 오믹(ohmic) 접합, Se 분위기 하에서의 고온 안정성 때문이다.This is because of high electrical conductivity of molybdenum (Mo), ohmic bonding with the light absorbing layer, and high temperature stability under Se atmosphere.

상기 제2전극 패턴(250)은 티타늄(Ti)으로도 형성될 수 있으며, 100~1000nm 의 두께로 형성될 수 있다.The second electrode pattern 250 may be formed of titanium (Ti), and may be formed to a thickness of 100 to 1000 nm.

또한, 도면에는 도시하지 않았지만, 상기 제2전극 패턴(250)은 적어도 하나 이상의 층으로 형성될 수 있다.In addition, although not shown in the drawing, the second electrode pattern 250 may be formed of at least one layer.

상기 제2전극 패턴(250)이 복수개의 층으로 형성될 때, 상기 제2전극 패턴(250)을 이루는 층들은 서로 다른 물질로 형성될 수 있다.When the second electrode pattern 250 is formed of a plurality of layers, the layers constituting the second electrode pattern 250 may be formed of different materials.

상기 광 흡수층 패턴(300)은 Ⅰb-Ⅲb-Ⅵb계 화합물로 형성될 수 있다. The light absorbing layer pattern 300 may be formed of an Ib-IIIb-VIb-based compound.

더 자세하게, 상기 광 흡수층 패턴(300)은 구리-인듐-갈륨-셀레나이드계(Cu(In, Ga)Se2, CIGS계) 화합물을 포함한다.In more detail, the light absorbing layer pattern 300 includes a copper-indium-gallium-selenide-based (Cu (In, Ga) Se 2 , CIGS-based) compound.

이와는 다르게, 상기 광 흡수층 패턴(300)은 구리-인듐-셀레나이드계(CuInSe2, CIS계) 화합물 또는 구리-갈륨-셀레나이드계(CuGaSe2, CGS계) 화합물을 포함할 수 있다.Alternatively, the light absorbing layer pattern 300 may include a copper-indium selenide-based (CuInSe 2 , CIS-based) compound or a copper-gallium-selenide-based (CuGaSe 2 , CGS-based) compound.

예를 들어, 상기 광 흡수층 패턴(300)을 형성하기 위해서, 구리 타겟, 인듐 타겟 및 갈륨 타겟을 사용하여, 상기 제2전극 패턴(250) 상에 CIG계 금속 프리커서(precursor)막이 형성된다. For example, to form the light absorbing layer pattern 300, a CIG metal precursor layer is formed on the second electrode pattern 250 using a copper target, an indium target, and a gallium target.

이후, 상기 금속 프리커서막은 셀레니제이션(selenization) 공정에 의해서, 셀레늄(Se)과 반응하여 CIGS계 광 흡수층 패턴(300)이 형성된다.Subsequently, the metal precursor film is reacted with selenium (Se) by a selenization process to form a CIGS-based light absorbing layer pattern 300.

또한, 상기 금속 프리커서막을 형성하는 공정 및 셀레니제이션 공정 동안에, 상기 기판(100)에 포함된 알칼리(alkali) 성분이 상기 제2전극 패턴(250)을 통해서, 상기 금속 프리커서막 및 상기 광 흡수층 패턴(300)에 확산된다.In addition, during the process of forming the metal precursor film and the selenization process, an alkali component included in the substrate 100 passes through the second electrode pattern 250, and the metal precursor film and the light absorbing layer. The pattern 300 is diffused.

알칼리(alkali) 성분은 상기 광 흡수층 패턴(300)의 그레인(grain) 크기를 향상시키고, 결정성을 향상시킬 수 있다.An alkali component may improve grain size of the light absorbing layer pattern 300 and improve crystallinity.

또한, 상기 광 흡수층 패턴(300)은 구리, 인듐, 갈륨, 셀레나이드(Cu, In, Ga, Se)를 동시증착법(co-evaporation)에 의해 형성할 수도 있다.In addition, the light absorbing layer pattern 300 may form copper, indium, gallium, selenide (Cu, In, Ga, Se) by co-evaporation.

상기 광 흡수층 패턴(300)은 외부의 광을 입사받아, 전기 에너지로 변환시킨다. 상기 광 흡수층 패턴(300)은 광전효과에 의해서 광 기전력을 생성한다.The light absorbing layer pattern 300 receives external light and converts the light into electrical energy. The light absorbing layer pattern 300 generates photo electromotive force by the photoelectric effect.

상기 광 흡수층 패턴(300)은 1~3μm의 두께로 형성될 수 있다.The light absorbing layer pattern 300 may be formed to a thickness of 1 ~ 3μm.

상기 버퍼층 패턴(400)은 제1버퍼층 패턴(410) 및 제2버퍼층 패턴(420)의 적층으로 형성될 수 있다.The buffer layer pattern 400 may be formed by stacking the first buffer layer pattern 410 and the second buffer layer pattern 420.

상기 제1버퍼층 패턴(410)은 황화 카드뮴(CdS)이 상기 광 흡수층 패턴(300) 상에 적층되어 형성될 수 있다.The first buffer layer pattern 410 may be formed by stacking cadmium sulfide (CdS) on the light absorbing layer pattern 300.

이때, 상기 제1버퍼층 패턴(410)은 n형 반도체 층이고, 상기 광 흡수층 패턴(300)은 p형 반도체 층이다. 따라서, 상기 광 흡수층 패턴(300) 및 제1버퍼층 패턴(410)은 pn 접합을 형성한다.In this case, the first buffer layer pattern 410 is an n-type semiconductor layer, and the light absorbing layer pattern 300 is a p-type semiconductor layer. Therefore, the light absorbing layer pattern 300 and the first buffer layer pattern 410 form a pn junction.

그리고, 상기 제2버퍼층 패턴(420)은 ITO, ZnO, i-ZnO 중 어느 하나를 포함하는 투명전극층으로 형성될 수 있으며, 30~100nm의 두께로 형성될 수 있다.The second buffer layer pattern 420 may be formed of a transparent electrode layer including any one of ITO, ZnO, and i-ZnO, and may be formed to have a thickness of 30 to 100 nm.

상기 제1버퍼층 패턴(410) 및 제2버퍼층 패턴(420)은 상기 광 흡수층 패턴(300)과 이후 형성될 제3전극의 사이에 배치된다.The first buffer layer pattern 410 and the second buffer layer pattern 420 are disposed between the light absorbing layer pattern 300 and a third electrode to be formed later.

즉, 상기 광 흡수층 패턴(300)과 제3전극은 격자상수와 에너지 밴드 갭의 차이가 크기 때문에, 밴드갭이 두 물질의 중간에 위치하는 상기 제1버퍼층 패턴(410) 및 제2버퍼층 패턴(420)을 삽입하여 양호한 접합을 형성할 수 있다.That is, since the difference between the lattice constant and the energy band gap between the light absorbing layer pattern 300 and the third electrode is large, the first buffer layer pattern 410 and the second buffer layer pattern having a band gap between the two materials ( 420 may be inserted to form a good bond.

본 실시예에서는 두 개의 버퍼층을 상기 광 흡수층 패턴(300) 상에 형성하였지만, 이에 한정되지 않고, 상기 버퍼층은 한 개의 층으로만 형성될 수도 있다.In the present exemplary embodiment, two buffer layers are formed on the light absorbing layer pattern 300, but the present invention is not limited thereto. The buffer layer may be formed of only one layer.

이때, 상기 제1전극(200) 상에 형성된 제2전극 패턴(250), 광 흡수층 패턴(300) 및 버퍼층 패턴(400)은 도 3a에 도시된 바와 같이, 상기 제1전극(200) 상에 마스크(450)를 배치시킨 후, 증착공정을 진행하여 형성할 수 있다.In this case, the second electrode pattern 250, the light absorbing layer pattern 300, and the buffer layer pattern 400 formed on the first electrode 200 are formed on the first electrode 200 as shown in FIG. 3A. After the mask 450 is disposed, the deposition process may be performed to form the mask 450.

상기 마스크(450)는 단위 셀에 대응되는 영역이 오픈(open)되도록 형성되어, 상기 단위 셀 영역을 제외한 영역은 상기 분리패턴(350)이 형성된다.The mask 450 is formed such that an area corresponding to the unit cell is open, and the separation pattern 350 is formed in an area except the unit cell area.

즉, 상기 마스크(450)를 사용하여, 상기 제1전극(200)상에 상기 패턴들을 적층함으로써, 별도의 추가적인 공정 없이 상기 분리패턴(350)에 의해 서로 이격된 제2전극 패턴(250), 광 흡수층 패턴(300) 및 버퍼층 패턴(400)을 형성할 수 있다.That is, by stacking the patterns on the first electrode 200 using the mask 450, the second electrode patterns 250 spaced apart from each other by the separation pattern 350 without any additional process, The light absorbing layer pattern 300 and the buffer layer pattern 400 may be formed.

또한, 상기 제1전극(200) 상에 형성된 상기 제2전극 패턴(250), 광 흡수층 패턴(300) 및 버퍼층 패턴(400)은 상기의 방법에 한정되지 않고 여러 방법으로 형성될 수 있다.In addition, the second electrode pattern 250, the light absorbing layer pattern 300, and the buffer layer pattern 400 formed on the first electrode 200 may be formed in various ways without being limited to the above method.

즉, 도 3b에 도시된 바와 같이, 제2전극층(25), 광 흡수층(30), 제1버퍼층(41), 제2버퍼층(42)을 형성한 후, 버퍼층(40) 상에 포토레지스트 패턴(10)을 형성한 후, 상기 포토레지스트 패턴(10)을 마스크로 식각공정을 진행하여 형성할 수 있다.That is, as shown in FIG. 3B, after forming the second electrode layer 25, the light absorbing layer 30, the first buffer layer 41, and the second buffer layer 42, the photoresist pattern is formed on the buffer layer 40. After forming (10), the photoresist pattern 10 may be formed by performing an etching process using a mask.

이때, 상기 포토레지스트 패턴(10)은 단위 셀에 대응되도록 형성될 수 있으며, 상기 포토레지스트 패턴(10)을 이용한 식각공정으로 상기 분리패턴(350)이 형 성됨으로써, 상기 패턴들은 단위 셀로 분리될 수 있다.In this case, the photoresist pattern 10 may be formed to correspond to a unit cell, and the separation pattern 350 is formed by an etching process using the photoresist pattern 10, so that the patterns may be separated into unit cells. Can be.

또한, 도면에는 도시하지 않았지만, 단위 셀로 분리된 상기 패턴들은 제2전극층(25), 광 흡수층(30), 제1버퍼층(41), 제2버퍼층(42)을 형성한 후, 팁(Tip)을 이용한 기계적(Mechanical)인 방법이나, 레이저(laser)를 조사(irradiate)하여 형성될 수도 있다.In addition, although not shown in the drawing, the patterns separated into unit cells are formed after forming the second electrode layer 25, the light absorbing layer 30, the first buffer layer 41, and the second buffer layer 42. It may be formed by using a mechanical method or irradiating a laser.

단위 셀로 분리된 상기 제2전극 패턴(250), 광 흡수층 패턴(300) 및 버퍼층 패턴(400)은 평면에서 보았을 경우, 도 4에 도시된 것과 같이 다양한 문양으로 형성될 수 있다.The second electrode pattern 250, the light absorbing layer pattern 300, and the buffer layer pattern 400 separated into unit cells may be formed in various patterns as shown in FIG. 4 when viewed in plan view.

즉, 단위 셀로 분리된 상기 제2전극 패턴(250), 광 흡수층 패턴(300) 및 버퍼층 패턴(400)의 모양이 평면에서 보았을 경우, 각각의 단위 셀은 삼각형, 사각형, 원형, 별모양을 포함하는 다각형 및 원형의 모양으로 형성될 수 있다.That is, when the shape of the second electrode pattern 250, the light absorbing layer pattern 300, and the buffer layer pattern 400 separated into unit cells is viewed in plan, each unit cell includes a triangle, a rectangle, a circle, and a star shape. It may be formed in the shape of a polygon and a circle.

이때, 상기 단위 셀로 분리된 상기 패턴들이 모양은 상기의 모양에 한정되지 않고, 스트라이프(stripe) 형태, 매트릭스(matrix) 형태, 글씨 또는 그림의 모양으로 배치될 수도 있으며, 상기의 형태에 한정되지 않고, 다양한 형태로 형성될 수 있다.In this case, the shapes of the patterns separated into the unit cells are not limited to the above shapes, and may be arranged in a stripe shape, a matrix shape, a letter or a picture, and are not limited to the above shapes. It may be formed in various forms.

이때, 각 단위 셀의 면적은 동일하게 형성될 수도 있고, 다르게 형성될 수도 있다.In this case, the area of each unit cell may be identical or different.

이어서, 도 5에 도시된 바와 같이, 각 단위 셀 사이의 상기 분리패턴(350)에 절연층 패턴(470)을 형성한다.Subsequently, as shown in FIG. 5, an insulating layer pattern 470 is formed on the separation pattern 350 between each unit cell.

상기 절연층 패턴(470)은 상기 분리패턴(350) 내부가 채워지도록 형성될 수 있으며, 상기 제2전극 패턴(250), 광 흡수층 패턴(300) 및 버퍼층 패턴(400)을 이루는 제1셀(C1), 제2셀(C2), 제3셀(C3), 제4셀(C4)의 단위 셀이 서로 분리될 수 있다.The insulating layer pattern 470 may be formed to fill an inside of the separation pattern 350, and may include a first cell constituting the second electrode pattern 250, the light absorbing layer pattern 300, and the buffer layer pattern 400. The unit cells of C1), the second cell C2, the third cell C3, and the fourth cell C4 may be separated from each other.

상기 절연층 패턴(470)은 EVA(Ethylene Vinyle Acetate copolymer), 페를린(parlyne), 고분자 물질 중 어느 하나를 포함하는 투명한 절연물질로 형성될 수 있다.The insulating layer pattern 470 may be formed of a transparent insulating material including any one of an ethylene vinyle acetate copolymer (EVA), a perlin, and a polymer material.

상기 절연층 패턴(470)로 EVA를 사용할 경우에는 상기 EVA를 상기 분리패턴(350) 내부에 형성한 후, 열공정을 진행할 수 있다.When the EVA is used as the insulating layer pattern 470, the EVA may be formed in the separation pattern 350, and then thermal processing may be performed.

그리고, 도 6에 도시된 바와 같이, 상기 절연층 패턴(470) 및 상기 버퍼층 패턴(400) 상에 투명한 도전물질인 제3전극(500)을 형성한다.As shown in FIG. 6, the third electrode 500, which is a transparent conductive material, is formed on the insulating layer pattern 470 and the buffer layer pattern 400.

상기 제3전극(500)은 상기 기판(100) 상에 스퍼터링 공정을 진행하여 알루미늄(Al), 붕소(B) 또는 갈륨(Ga)으로 도핑된 산화 아연으로 형성된다.The third electrode 500 is formed of zinc oxide doped with aluminum (Al), boron (B), or gallium (Ga) by performing a sputtering process on the substrate 100.

상기 제3전극(500)은 상기 광 흡수층 패턴(300)과 pn접합을 형성하는 윈도우(window)층으로서, 태양전지 전면의 투명전극의 기능을 하기 때문에 광투과율이 높고 전기 전도성이 좋은 산화 아연(ZnO)으로 형성된다.The third electrode 500 is a window layer forming a pn junction with the light absorbing layer pattern 300. Since the third electrode 500 functions as a transparent electrode on the front of the solar cell, zinc oxide having high light transmittance and good electrical conductivity ( ZnO).

이때, 상기 산화 아연에 알루미늄(Al), 붕소(B) 또는 갈륨(Ga)를 도핑함으로써 낮은 저항값을 갖는 전극을 형성할 수 있다.In this case, an electrode having a low resistance value may be formed by doping aluminum (Al), boron (B), or gallium (Ga) on the zinc oxide.

상기 제3전극(500)인 산화 아연 박막은 RF, DC, DC 펄스(pulse) 스퍼터링방법으로 ZnO 타겟을 사용하여 증착하는 방법과 Zn 타겟을 이용한 반응성 스퍼터링, 그리고 유기금속화학증착법 등으로 형성될 수 있다.The zinc oxide thin film as the third electrode 500 may be formed using a ZnO target by RF, DC, or DC pulse sputtering, reactive sputtering using a Zn target, and an organometallic chemical vapor deposition method. have.

또한, 전기광학적 특성이 뛰어난 ITO(Indium tin Oxide) 박막을 산화 아연 박막 상에 층착한 2중 구조를 형성할 수도 있다.In addition, a double structure in which an indium tin oxide (ITO) thin film having excellent electro-optical properties is laminated on a zinc oxide thin film may be formed.

상기 제3전극(500)은 면저항이 20Ω/□이고 투광도가 90%가 될 수 있으며, 100~500nm의 두께로 형성될 수 있다.The third electrode 500 may have a sheet resistance of 20Ω / □, a light transmittance of 90%, and a thickness of 100 to 500 nm.

상기 제3전극(500)을 형성함으로써, 상기 단위 셀들(C1, C2, C3, C4)은 상기 제1전극(200)과 제3전극(500)에 의해 병렬 연결 구조를 이루게 된다.By forming the third electrode 500, the unit cells C1, C2, C3, and C4 form a parallel connection structure by the first electrode 200 and the third electrode 500.

즉, 기존에는 각 셀이 직렬로 형성된 태양전지 모듈에서 하나의 셀이 불량인 경우 전체 모듈의 성능은 "0"이 되어 모듈을 사용할 수 없었지만, 본 실시예에서는 각 셀을 병렬로 연결하여 어느 셀에 불량이 발생하여도 태양전지 모듈을 사용할 수 있다.That is, in the past, when one cell is bad in the solar cell module in which each cell is formed in series, the performance of the entire module becomes “0”, and thus the module cannot be used. Even if a defect occurs in the solar cell module can be used.

또한, 상기 제3전극(500), 절연층 패턴(470), 제1전극(200)이 모두 투명한 층으로 형성되어, 상기 단위 셀들(C1, C2, C3, C4) 사이로는 빛이 투광될 수 있다.In addition, since the third electrode 500, the insulating layer pattern 470, and the first electrode 200 are all formed as transparent layers, light may be transmitted between the unit cells C1, C2, C3, and C4. have.

즉, 상기 단위 셀들(C1, C2, C3, C4)의 모양에 따라 투과 영역이 자유롭게 조절될 수 있다.That is, the transmission region may be freely adjusted according to the shape of the unit cells C1, C2, C3, and C4.

이어서, 도 7에 도시된 바와 같이, 상기 제3전극(500) 상에 상부 패널(600)이 형성된다.Subsequently, as shown in FIG. 7, an upper panel 600 is formed on the third electrode 500.

상기 상부 패널(600)은 저철분 강화 유리 또는 반강화유리로 형성될 수 있다.The upper panel 600 may be formed of low iron tempered glass or semi-tempered glass.

도면에는 도시하지 않았지만, 상기 상부 패널(600)을 형성하기 전, 상기 제3전극(500) 상에 EVA(Ethylene Vinyle Acetate copolymer) 필름을 더 형성할 수 있 다.Although not shown in the drawing, before forming the upper panel 600, an EVA (Ethylene Vinyle Acetate copolymer) film may be further formed on the third electrode 500.

이렇게 형성된 태양전지는 상기 단위 셀들(C1, C2, C3, C4)이 병렬로 연결되어, 전체 전압은 낮고 전류는 높을 수 있다.In the solar cell formed as described above, the unit cells C1, C2, C3, and C4 are connected in parallel, so that the total voltage is low and the current is high.

이때, 감소되는 전압은 도 8에 도시된 바와 같이, 제1태양전지 패널(700)과 제2태양전지 패널(800)을 직렬로 연결하여 전체의 전력을 확보할 수 있다.In this case, as shown in FIG. 8, the reduced voltage may secure the total power by connecting the first solar panel 700 and the second solar panel 800 in series.

이상에서 설명한 바와 같이, 기존 직렬로 형성된 태양전지 모듈에서 하나의 셀이 불량인 경우 전체 모듈의 성능은 "0"이 되어 모듈을 사용할 수 없었지만, 실시예에 따른 태양전지 및 이의 제조방법은 각 셀을 병렬로 연결하여 어느 셀에 불량이 발생하여도 태양전지 모듈을 사용할 수 있다.As described above, when one cell is defective in the conventional solar cell module formed in series, the performance of the entire module becomes “0”, but the module cannot be used. However, the solar cell and the method of manufacturing the same according to the embodiment By connecting them in parallel, even if a defect occurs in any cell, the solar cell module can be used.

또한, 다양한 모양의 마스크를 이용하여 병렬 형태로 각 셀을 형성하여, 각 셀의 모양도 다양하게 형성할 수 있어, 태양전지의 심미감 및 장식성을 제공할 수 있다.In addition, by forming each cell in a parallel form using a mask of various shapes, it is possible to form a variety of shapes of each cell, it is possible to provide aesthetic and decorative properties of the solar cell.

이상에서 실시예를 중심으로 설명하였으나 이는 단지 예시일 뿐 본 발명을 한정하는 것이 아니며, 본 발명이 속하는 분야의 통상의 지식을 가진 자라면 본 실시예의 본질적인 특성을 벗어나지 않는 범위에서 이상에 예시되지 않은 여러 가지의 변형과 응용이 가능함을 알 수 있을 것이다. 예를 들어, 실시예에 구체적으로 나타난 각 구성 요소는 변형하여 실시할 수 있는 것이다. 그리고 이러한 변형과 응용에 관계된 차이점들은 첨부된 청구 범위에서 규정하는 본 발명의 범위에 포함되는 것으로 해석되어야 할 것이다.Although described above with reference to the embodiment is only an example and is not intended to limit the invention, those of ordinary skill in the art to which the present invention does not exemplify the above within the scope not departing from the essential characteristics of this embodiment It will be appreciated that many variations and applications are possible. For example, each component specifically shown in the embodiment can be modified. And differences relating to such modifications and applications will have to be construed as being included in the scope of the invention defined in the appended claims.

도 1 내지 도 8 실시예에 따른 태양전지의 제조공정을 도시한 단면도 및 평면도이다. 1 and 8 are cross-sectional views and plan views illustrating a manufacturing process of the solar cell according to the embodiment.

Claims (10)

기판 상에 형성된 제1전극층;A first electrode layer formed on the substrate; 상기 제1전극층 상에 단위 셀 별로 형성된 흡수층 패턴;An absorption layer pattern formed for each unit cell on the first electrode layer; 상기 흡수층 패턴 사이에 형성된 절연층 패턴;An insulation layer pattern formed between the absorption layer patterns; 상기 흡수층 패턴 및 절연층 패턴 상에 형성된 제3전극층; 및A third electrode layer formed on the absorbing layer pattern and the insulating layer pattern; And 상기 제3전극층 상에 형성된 상부 기판을 포함하며,An upper substrate formed on the third electrode layer, 상기 절연층 패턴에 의해 상기 흡수층 패턴은 서로 분리된 것을 포함하는 태양전지.The solar cell of claim 1, wherein the absorption layer patterns are separated from each other by the insulating layer pattern. 제 1항에 있어서,The method of claim 1, 각 단위 셀 별로 형성된 상기 흡수층 패턴은 상기 제1전극층 및 제3전극층에 따라 병렬 연결되는 태양전지.The absorption layer pattern formed for each unit cell is connected in parallel with the first electrode layer and the third electrode layer. 제 1항에 있어서,The method of claim 1, 상기 제1전극층과 흡수층 패턴 사이에 형성된 제2전극 패턴을 포함하고,A second electrode pattern formed between the first electrode layer and the absorption layer pattern, 상기 제2전극 패턴은 상기 흡수층 패턴에 대응되도록 형성되며,The second electrode pattern is formed to correspond to the absorption layer pattern, 상기 제2전극 패턴은 상기 절연층 패턴에 의해 서로 분리된 것을 포함하는 태양전지.The second electrode pattern is separated from each other by the insulating layer pattern. 제 1항에 있어서,The method of claim 1, 상기 흡수층 패턴은 평면에서 보았을 경우,When the absorption layer pattern is viewed in plan, 각 단위 셀이 다각형, 원형 또는 타원형으로 형성되는 것을 포함하는 태양전지. A solar cell comprising each unit cell formed in a polygon, circle or oval. 제 1항에 있어서,The method of claim 1, 상기 절연층 패턴은 EVA(Ethylene Vinyle Acetate copolymer), 페를린(parlyne), 고분자 물질 중 어느 하나를 포함하는 절연물질인 포함하는 태양전지.The insulating layer pattern is a solar cell comprising an insulating material containing any one of EVA (Ethylene Vinyle Acetate copolymer), Perlin (parlyne), a polymer material. 기판 상에 제1전극층을 형성하는 단계;Forming a first electrode layer on the substrate; 상기 제1전극층 상에 단위 셀 별로 흡수층 패턴을 형성하는 단계;Forming an absorption layer pattern for each unit cell on the first electrode layer; 상기 흡수층 패턴 사이에 절연층 패턴을 형성하는 단계;Forming an insulating layer pattern between the absorbing layer patterns; 상기 흡수층 패턴 및 절연층 패턴 상에 제3전극층을 형성하는 단계;Forming a third electrode layer on the absorption layer pattern and the insulating layer pattern; 상기 제3전극층 상에 상부 기판을 형성하는 단계를 포함하며,Forming an upper substrate on the third electrode layer; 상기 절연층 패턴에 의해 상기 흡수층 패턴은 서로 분리된 것을 포함하는 The absorber layer pattern may be separated from each other by the insulating layer pattern. 태양전지의 제조방법.Method of manufacturing solar cell. 제 6항에 있어서,The method of claim 6, 각 단위 셀 별로 형성된 상기 흡수층 패턴은 상기 제1전극층 및 제3전극층에 따라 병렬 연결되는 태양전지의 제조방법.The absorption layer pattern formed for each unit cell is a solar cell manufacturing method connected in parallel with the first electrode layer and the third electrode layer. 제 6항에 있어서,The method of claim 6, 상기 제1전극층 상에 상기 흡수층 패턴을 형성하기 전,Before forming the absorption layer pattern on the first electrode layer, 상기 제1전극층 상에 단위 셀 별로 제2전극 패턴을 형성하는 단계를 포함하고,Forming a second electrode pattern for each unit cell on the first electrode layer; 상기 제2전극 패턴은 상기 제1전극층과 흡수층 패턴 사이에 배치되며,The second electrode pattern is disposed between the first electrode layer and the absorption layer pattern, 상기 제2전극 패턴은 상기 흡수층 패턴에 대응되도록 형성되며,The second electrode pattern is formed to correspond to the absorption layer pattern, 상기 제2전극 패턴은 상기 절연층 패턴에 의해 서로 분리된 것을 포함하는 태양전지의 제조방법.The second electrode pattern is a solar cell manufacturing method comprising a separation from each other by the insulating layer pattern. 제 6항에 있어서,The method of claim 6, 상기 흡수층 패턴은 평면에서 보았을 경우,When the absorption layer pattern is viewed in plan, 각 단위 셀은 삼각형, 사각형, 오각형, 육각형, 별, 원형 또는 타원형으로 형성되는 것을 포함하는 태양전지의 제조방법.Each unit cell is a triangle, square, pentagonal, hexagonal, star, circle or oval manufacturing method comprising the one formed in an oval. 제 1항에 있어서,The method of claim 1, 상기 절연층 패턴은 EVA(Ethylene Vinyle Acetate copolymer), 페를린(parlyne), 고분자 물질 중 어느 하나를 절연 물질인 태양전지.The insulating layer pattern is EVA (Ethylene Vinyle Acetate copolymer), Perlin (parlyne), the solar cell of any one of the polymer material.
KR1020090105418A 2009-11-03 2009-11-03 Solar cell and method of fabircating the same KR101091253B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020090105418A KR101091253B1 (en) 2009-11-03 2009-11-03 Solar cell and method of fabircating the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020090105418A KR101091253B1 (en) 2009-11-03 2009-11-03 Solar cell and method of fabircating the same

Publications (2)

Publication Number Publication Date
KR20110048724A KR20110048724A (en) 2011-05-12
KR101091253B1 true KR101091253B1 (en) 2011-12-07

Family

ID=44359985

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020090105418A KR101091253B1 (en) 2009-11-03 2009-11-03 Solar cell and method of fabircating the same

Country Status (1)

Country Link
KR (1) KR101091253B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015005610A1 (en) * 2013-07-10 2015-01-15 고려대학교 산학협력단 Solar radiation energy absorber based on metamaterial and method of manufacturing same

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101856212B1 (en) * 2011-05-30 2018-06-25 엘지이노텍 주식회사 Solar cell apparatus and mentod of fabricating the same
KR20120133173A (en) 2011-05-30 2012-12-10 엘지이노텍 주식회사 Solar cell apparatus and method of fabricating the same
KR101241714B1 (en) * 2011-06-13 2013-03-11 엘지이노텍 주식회사 Solar cell and method for repairing the same
FR2990300B1 (en) 2012-05-04 2017-02-03 Disasolar PHOTOVOLTAIC MODULE AND METHOD FOR PRODUCING THE SAME
KR102174537B1 (en) * 2019-04-10 2020-11-05 한국과학기술연구원 Solar cell and process of preparing the same

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100654103B1 (en) 2005-11-30 2006-12-06 한국전기연구원 Dye-sensitized solar cell module using carbon nanotube electrode
US20080276980A1 (en) 2007-02-19 2008-11-13 Sanyo Electric Co., Ltd. Solar cell module

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100654103B1 (en) 2005-11-30 2006-12-06 한국전기연구원 Dye-sensitized solar cell module using carbon nanotube electrode
US20080276980A1 (en) 2007-02-19 2008-11-13 Sanyo Electric Co., Ltd. Solar cell module

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015005610A1 (en) * 2013-07-10 2015-01-15 고려대학교 산학협력단 Solar radiation energy absorber based on metamaterial and method of manufacturing same
KR101497817B1 (en) * 2013-07-10 2015-03-04 고려대학교 산학협력단 Metamaterial-based absorber of solar radiation energy and method of manufacturing the same

Also Published As

Publication number Publication date
KR20110048724A (en) 2011-05-12

Similar Documents

Publication Publication Date Title
JP5624152B2 (en) Solar cell and manufacturing method thereof
KR101125322B1 (en) Solar cell and method of fabircating the same
KR101154727B1 (en) Solar cell and method of fabricating the same
JP2013507766A (en) Photovoltaic power generation apparatus and manufacturing method thereof
KR101091253B1 (en) Solar cell and method of fabircating the same
KR101034150B1 (en) Solar cell and method of fabircating the same
KR101091475B1 (en) Solar cell and method of fabircating the same
KR20100109321A (en) Solar cell and method of fabricating the same
KR101081143B1 (en) Solar cell and method of fabricating the same
KR101428146B1 (en) Solar cell module and method of fabricating the same
KR101081270B1 (en) Solar cell and method of fabircating the same
JP5624153B2 (en) Solar cell and manufacturing method thereof
KR101382898B1 (en) See through type solar cell and fabricating method
KR101592582B1 (en) Solar cell and method of fabircating the same
KR20110001795A (en) Solar cell and method of fabricating the same
KR101028310B1 (en) Solar cell and method of fabricating the same
KR20110036173A (en) Solar cell and method of fabircating the same
KR101231284B1 (en) Solar cell and method of fabircating the same
KR101063721B1 (en) Solar cell and manufacturing method thereof
KR101091319B1 (en) Solar cell and method of fabricating the same
KR101209982B1 (en) Solar cell and method of fabircating the same
KR20120090396A (en) Solar cell and method of fabircating the same
KR101628365B1 (en) Solar cell and method of fabricating the same
KR101072067B1 (en) Tip, solar cell and method of fabricating the solar cell using the tip
KR20110036353A (en) Solar cell and method of fabircating the same

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20141106

Year of fee payment: 4

FPAY Annual fee payment

Payment date: 20151105

Year of fee payment: 5

FPAY Annual fee payment

Payment date: 20161104

Year of fee payment: 6

FPAY Annual fee payment

Payment date: 20171107

Year of fee payment: 7

LAPS Lapse due to unpaid annual fee