KR20120073793A - Liquid crystal display and driving method thereof - Google Patents

Abstract

PURPOSE: A liquid crystal display and a driving method thereof are provided to reduce power consumption and a driving frequency of data driving circuit by simultaneously employing a z-inversion driving method and interlace scan method. CONSTITUTION: A liquid crystal display panel(10) comprises two glass substrates and a liquid crystal layer. A pixel electrode(1), common electrode(2) and storage capacitor are formed on the lower glass substrate of the liquid crystal display. A data driving circuit(12) includes a plurality of gate drive ICs(Integrated Circuit). A data controlling signal controls the operation timing of the data driving circuit. A gate controlling signal controls the operation timing of the gate driving circuit.

Description

Liquid crystal display and its driving method {LIQUID CRYSTAL DISPLAY AND DRIVING METHOD THEREOF}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device and a driving method thereof for improving display quality and reducing power consumption.

The liquid crystal display device displays an image by adjusting light transmittance of liquid crystal cells according to a video signal. An active matrix type liquid crystal display device in which a thin film transistor (“TFT”) is formed for each liquid crystal cell displays a moving image as compared to a passive matrix type liquid crystal display device. You can display images with clearer picture quality.

In order to reduce the DC offset component and reduce the deterioration of the liquid crystal, such a liquid crystal display device adopts a dot inversion driving method to invert the polarity of the data voltage in units of horizontally and vertically adjacent liquid crystal cells. The polarity of the data voltage is determined based on the common voltage. The positive data voltage is selected within a range higher than the common voltage, and the negative data voltage is selected within a range lower than the common voltage. However, in the dot inversion driving method, since the data voltage applied to the same data line has to swing between the positive and negative polarities every horizontal period, the driving frequency of the data driving circuit is increased. There is a disadvantage that the power consumption increases.

In order to reduce the driving frequency and power consumption of the data driving circuit, a jet-inversion driving method has been proposed. In the jet-inversion driving method, as shown in FIG. 1, the liquid crystal cells connected to the data line through each TFT are arranged on the right side of the data line in the odd horizontal lines HL # 1, HL # 3, and HL # 5. In the horizontal lines HL # 2, HL # 4, and HL # 6, they are arranged on the left side of the data line. The liquid crystal cells positioned on the horizontal lines HL # 1, HL # 3, and HL # 5 sequentially apply data supplied from the data lines D1 to D6 adjacent to the left, as shown in FIG. Charged in synchronization with the scanning pulse SP, the liquid crystal cells positioned in the even horizontal lines HL # 2, HL # 4, and HL # 6 are adjacent to the data lines DL2 to D7 adjacent to the right. 2) is charged in synchronization with scan pulses SP sequentially applied as shown in FIG. 2. Negative data is continuously applied to the odd data lines D1, D3, D5, and D7 for one frame, and positive data (D2, D4 and D6) is continuously applied for one frame. ) Data is applied. The jet-inversion driving method can control the polarity of the liquid crystal cells in a dot inversion form without swinging the polarity of the data voltage applied to the same data line every horizontal period.

The jet-inversion driving method maintains the polarity of the data voltage applied to the same data line for one frame, thereby greatly reducing the driving frequency and power consumption of the data driving circuit. However, the jet-inversion driving method has a fatal problem in that fine horizontal lines are generated due to poor charging when a mixed color such as yellow, cyan, and magenta is implemented.

As shown in FIG. 1, when the red (R) liquid crystal cells and the green (G) liquid crystal cells are turned on, and the blue (B) liquid crystal cells are turned off, yellow is implemented as an example. Is as follows. Here, 'turning on the liquid crystal cells' means charging the liquid crystal cells with a data voltage of white gray, and 'turning off the liquid crystal cells' means charging the liquid crystal cells with a data voltage of black gray.

When yellow is implemented, the green (G) liquid crystal cells are strongly charged in the horizontal horizontal lines (HL # 1, HL # 3, HL # 5), while the red (R) liquid crystal cells are weakly charged and the excellent horizontal lines ( In HL # 2, HL # 4, and HL # 6, the red (R) liquid crystal cells are strongly charged, whereas the green (G) liquid crystal cells are weakly charged.

When the upper neighboring liquid crystal cell, which is connected to the same data line with itself and is charged immediately before itself, is charged with the data voltage of white gray, the red (R) liquid crystal cell (or green (G) liquid crystal cell) is strongly charged. do. For example, the red (R) liquid crystal cell and the green (G) liquid crystal cell connected to the second data line D2 by a zig zag may have a positive polarity of white gradation in one horizontal period in accordance with a sequential scanning method. ) Charge the data voltage sequentially. At this time, the positive data voltage of white gradation is continuously applied to the second data line D2 in accordance with a sequential scanning method. Accordingly, the charge potential variation on the second data line D2 is very small, and as a result, a red (R) liquid crystal cell and a green (G) liquid crystal cell connected to the second data line D2 by a zig zag. Can be strongly charged.

On the other hand, when the upper neighboring liquid crystal cell connected to the same data line and charged directly before itself is charged with the data voltage of black gradation, the red (R) liquid crystal cell (or green (G) liquid crystal cell) It is weakly charged.

For example, the blue (B) liquid crystal cell and the green (G) liquid crystal cell connected to the third data line D3 by a zig zag may be a blue (B) liquid crystal cell in units of one horizontal period in accordance with a sequential scanning method. The negative (-) data voltage of the black gradation is sequentially charged, and the green (G) liquid crystal cell charges the negative (-) data voltage of the white gradation sequentially. At this time, the negative data voltage of the black gray level and the negative data voltage of the white gray level are alternately applied to the third data line D3 according to the scanning method. Due to the data voltages of the black and white grays applied alternately, the charge potential variation on the third data line D3 is relatively large. Therefore, when a white gray data voltage is applied to the third data line D3 to charge the green (G) liquid crystal cell after the blue (B) liquid crystal cell, a charge delay is applied to the third data line D3. Is generated. Due to this charging delay, the green (G) liquid crystal cell is weakly charged.

In addition, the red (R) liquid crystal cell and the blue (B) liquid crystal cell connected to the fourth data line D4 by a zig zag are red (R) liquid crystal cells in units of one horizontal period according to the scanning method. The blue (B) liquid crystal cell sequentially charges the positive (+) data voltage of the white gradation and the black (B) liquid crystal cell. In this case, the positive data voltage of the white gray and the positive data voltage of the black gray are alternately applied to the fourth data line D4 according to the scanning method. Due to the data voltages of the white and black grays applied alternately, the charge potential variation on the fourth data line D4 is relatively large. Therefore, when the data voltage of white gray is applied to the fourth data line D4 to charge the red liquid crystal cell after the blue (B) liquid crystal cell, the charging delay is applied to the fourth data line D4. Is generated. This charging delay causes the red (R) liquid crystal cell to be weakly charged.

When the liquid crystal cell that is weakly charged in the odd horizontal line and the liquid crystal cell that is weakly charged in the even horizontal line are different, a yellow color occurs in units of horizontal lines. This difference is perceived in the form of fine horizontal lines as shown in FIG. 3, which causes a decrease in display quality.

Accordingly, an object of the present invention is to provide a liquid crystal display device and a method of driving the same, which can improve the display quality while reducing the driving frequency and power consumption of the data driving circuit.

In order to achieve the above object, a liquid crystal display device according to an embodiment of the present invention comprises a liquid crystal display panel in which data lines and gate lines are crossed and TFTs connected to the same data line are arranged in a zigzag along a column direction; A gate driving circuit sequentially supplying scan pulses to odd gate lines among the gate lines, and sequentially supplying scan pulses to even gate lines; And a data driver circuit for supplying data whose polarity is inverted in column line units in synchronization with the scan pulse to the data lines.

Liquid crystal cells connected to the data line through the TFTs are disposed on the right side of the data line in the odd horizontal line and on the left side of the data line in the even horizontal line.

In the liquid crystal display panel, charging polarities of data are inverted between adjacent liquid crystal cells horizontally and vertically.

The gate driving circuit divides the scan regions defined by the gate lines into n (n is a positive integer of 2 or more), and completes a scan operation in each scan region within a 1 / n frame.

When the scan area is divided into two, the gate driving circuit sequentially drives odd gate lines of the first scan area and then drives even gate lines of the first scan area in one-half frame; Following the sequential driving of the even gate lines of the first scan region, the even gate lines of the second scan region are sequentially driven within 2/2 frames, and then the even gate lines of the second scan region are sequentially driven.

According to an exemplary embodiment of the present invention, a method of driving a liquid crystal display device including a liquid crystal display panel in which data lines and gate lines intersect and TFTs connected to the same data line are arranged in a zigzag pattern along a column direction is provided. Sequentially supplying scan pulses to the odd gate lines, and sequentially supplying scan pulses to even gate lines; And supplying data whose polarities are inverted on a column line basis in synchronization with the scan pulse, to the data lines.

The liquid crystal display and the driving method thereof according to the present invention adopt the jet inversion driving method and the interlace scanning method simultaneously, while reducing the driving frequency and power consumption of the data driving circuit, and the mixed color fine problem which is a unique problem in the jet inversion driving method. The display quality can be significantly improved by solving the horizontal lines by the interlace scan method and by solving the problems inherent in the interlace scan method by the jet inversion driving method.

1 and 2 are views for explaining a conventional jet inversion driving method.
3 is a view showing an example of mixed color fine horizontal lines.
4 is a view showing a liquid crystal display according to an embodiment of the present invention.
FIG. 5 is a view showing liquid crystal cells driven in a jet-inversion manner to reduce driving frequency and power consumption of a data driving circuit. FIG.
6 is a diagram showing scan pulses supplied in an interlaced manner to remove mixed fine horizontal lines;
FIG. 7 is a diagram illustrating an example of dividing a scan area into a plurality and sequentially supplying interlace scan pulses; FIG.
8 to 10 are diagrams for explaining line dim peculiar to an interlace scan method.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 4 to 10.

4 shows a liquid crystal display according to an embodiment of the present invention.

Referring to FIG. 4, the liquid crystal display according to the exemplary embodiment includes a liquid crystal display panel 10, a timing controller 11, a data driving circuit 12, and a gate driving circuit 13.

The liquid crystal display panel 10 includes two glass substrates and a liquid crystal layer formed therebetween. In the liquid crystal display panel 10, a plurality of liquid crystal cells Clc are arranged in a matrix form for each pixel area provided in a cross structure of the data lines DL and the gate lines GL.

The lower glass substrate of the liquid crystal display panel 10 has a plurality of data lines DL, a plurality of gate lines GL, TFTs, and pixel electrodes 1 of a liquid crystal cell Clc connected to each of the TFTs. The common electrode 2 and the storage capacitor Cst, which face the pixel electrodes 1, are formed. The black matrix, the color filter, and the common electrode 2 are formed on the upper glass substrate of the liquid crystal display panel 10. The common electrode 2 is formed on the upper glass substrate in a vertical electric field driving method such as twisted nematic (TN) mode and vertical alignment (VA) mode, and has an in plane switching (IPS) mode and a fringe field switching (FFS) mode. In the same horizontal electric field driving method, the pixel electrode 1 is formed on the lower glass substrate. A polarizing plate having an optical axis orthogonal to each other is attached to each of the upper glass substrate and the lower glass substrate of the liquid crystal display panel 10, and an alignment layer for setting a pretilt angle of the liquid crystal is formed on an inner surface of the liquid crystal display panel 10.

The timing controller 11 receives timing signals such as the vertical / horizontal synchronization signals Vsync and Hsync, the data enable signal DE, and the clock signal CLK, and the data driver circuit 12 and the gate driver circuit 13. Generate control signals DDC and GDC to control the operation timing of the signal.

The data control signal DDC for controlling the operation timing of the data driving circuit 12 is source sampling to control the latching operation of data in the data driving circuit 12 based on a rising or falling edge. A polarity of the data voltage to be supplied to the clock (Source Sampling Clock SSC), the source output enable signal SOE for controlling the output of the data driving circuit 12, and the liquid crystal cells Clc of the liquid crystal display panel 10. It includes a polarity control signal (POL) for controlling the.

The gate control signal GDC for controlling the operation timing of the gate driving circuit 13 may include a gate start pulse (GSP) indicating a start horizontal line at which scanning starts in one vertical period in which one screen is displayed; A gate shift clock signal (Gate Shift) generated at a pulse width corresponding to an ON period of a TFT as a timing control signal input to a shift register in the gate driving circuit 13 to sequentially shift the gate start pulse GSP. Clock (GSC), and a gate output enable signal (GOE) for controlling the output of the gate driving circuit 13 and the like.

The timing controller 11 aligns the input digital video data RGB to the resolution of the liquid crystal display panel 10 and supplies the digital video data RGB to the data driving circuit 12.

The data driver circuit 12 includes a plurality of data drive ICs. Each of the data drive ICs includes a shift register, a latch, a digital to analog converter (DAC), an output buffer, and the like.

The data driving circuit 12 maintains the digital video data RGB input from the timing controller 11 as it is in the odd horizontal period with reference to the data control signal DDC and shifts one channel to the right in the even horizontal period. . The data driving circuit 12 latches the digital video data RGB held and shifted and converts the latched data into a positive data voltage or a negative data voltage with reference to the polarity control signal POL. The data driving circuit 12 inverts the polarities of the data voltages supplied to the data lines DL in units of column lines and inverts them in units of frames. The data voltage whose polarity is inverted by the data driving circuit 12 is sequentially supplied to the data lines DL in synchronization with the scan pulse.

The gate driving circuit 13 includes a plurality of gate drive ICs. Each of the gate drive ICs includes a shift register, a level shifter for converting an output signal of the shift register into a swing width suitable for TFT driving of a liquid crystal cell, an output buffer, and the like. The gate driving circuit 13 supplies scan pulses having a pulse width of approximately one horizontal period to the gate lines GL in an interlace manner as shown in FIG. 6 to select a horizontal line to which a data voltage is applied.

FIG. 5 shows liquid crystal cells driven in a jet-inversion manner to reduce the driving frequency and power consumption of the data driving circuit 12. 6 shows scan pulses supplied in an interlaced manner to remove mixed fine horizontal lines. 7 illustrates an example of dividing a scan area into a plurality of cells and sequentially supplying interlace scan pulses.

Referring to FIG. 5, the present invention employs a jet-inversion driving method to control polarities of liquid crystal cells in a dot inversion form by using the output of the data driving circuit 12 inverted in column lines.

Referring to FIG. 5, the liquid crystal cells connected to the data lines through each TFT are arranged on the right side of the data lines in the odd horizontal lines HL # 1, HL # 3 and HL # 5, and the even horizontal lines HL # 2. , HL # 4, HL # 6) are disposed on the left side of the data line. The TFTs are turned on in response to the scan pulse to supply data on the data lines D1 to D7 to the liquid crystal cell. In the odd horizontal lines HL # 1, HL # 3 and HL # 5, the TFTs are located at the intersection of the left data lines D1 to D6 and the odd gate lines G1, G3 and G5 of the liquid crystal cell. In the horizontal lines HL # 2, HL # 4 and HL # 6, the TFTs are positioned at the intersections of the right data lines D2 to D7 and the even gate lines G2, G4 and G6 of the liquid crystal cell. The gate electrodes of the TFTs are connected to the gate lines G1 to G6. The source electrodes of the TFTs located on the odd horizontal lines HL # 1, HL # 3, HL # 5 are connected to the left data lines D1 to D6, and the even horizontal lines HL # 2, HL # 4, HL #. The source electrodes of the TFTs located at 6) are connected to the right data lines D2 to D7. The drain electrodes of the TFTs positioned in the odd horizontal lines HL # 1, HL # 3, and HL # 5 are connected to the pixel electrodes of the liquid crystal cells adjacent to the right side thereof, and the even horizontal lines HL # 2, The drain electrodes of the TFTs located at HL # 4 and HL # 6 are connected to the pixel electrodes of the liquid crystal cells adjacent to the left of the TFTs. As a result, the TFTs connected to the same data line are arranged in zig-zag along the column direction. Also, TFTs included in the same column line are arranged in a zigzag between two adjacent data lines.

Accordingly, the liquid crystal cells positioned on the horizontal horizontal lines HL # 1, HL # 3, and HL # 5 interlace data supplied from the data lines D1 to D6 adjacent to the left side thereof with reference to FIG. 6. Charged in synchronization with the scan pulse SP applied in a manner, and the liquid crystal cells located in the even horizontal lines (HL # 2, HL # 4, HL # 6) are adjacent to the data lines (right) on the basis of themselves. The data supplied from D2 to D7 is charged in synchronization with the scan pulse SP applied in an interlaced manner as shown in FIG. 6.

Negative data is continuously applied to the odd data lines D1, D3, D5, and D7 for one frame, and positive data (D2, D4 and D6) is continuously applied for one frame. ) Data is applied. The jet-inversion driving method can control the polarity of the liquid crystal cells in a dot inversion form without swinging the polarity of the data voltage applied to the same data line every horizontal period. Since the polarity of the data voltage output through the same output channel in the data driving circuit is kept constant for one frame, the driving frequency and power consumption of the data driving circuit are greatly reduced.

The present invention drives the gate lines G1 to G6 in an interlaced scan method in order to solve a problem in which fine horizontal lines are generated due to poor charging when the color mixture is implemented in the jet-inversion driving method as described above. To this end, the gate driving circuit sequentially scans the even gate lines G2, G4, and G6 after supplying the scan pulse SP to the odd gate lines G1, G3, and G5 as shown in FIG. Supply a pulse SP.

The mixed color is cyan, red (R) data and blue (B) data implemented by yellow, green (G) data, and blue (B) data, which are implemented by red (R) data and green (G) data. ) Magenta implemented with data. Among them, as shown in FIG. 5, the mixed color fine horizontal lines are prevented by using red (R) and green (G) liquid crystal cells and turning off the blue (B) liquid crystal cells to implement yellow as an example. The following description is made. Here, 'turning on the liquid crystal cells' means charging the liquid crystal cells with a data voltage of white gray, and 'turning off the liquid crystal cells' means charging the liquid crystal cells with a data voltage of black gray.

As described in the related art, the fine horizontal lines in the yellow implementation are weakly charged with the red liquid crystal cells in the odd horizontal lines HL # 1, HL # 3 and HL # 5, and the even horizontal lines HL #. 2, HL # 4, HL # 6) occurs because the green (G) liquid crystal cells are weakly charged. The most fundamental reason why some liquid crystal cells are weakly charged is a sequential scanning method in which the data voltage of black gray and the data voltage of white gray are alternately supplied every one horizontal period. For example, when data is supplied in synchronization with the sequential scanning method, the green (G) liquid crystal cells connected to the third data line D3 are weakly charged due to the charging delay of the third data line D3. The charging delay is generated because the charging potential of the third data line D3 does not change rapidly from the black gradation level of the immediately preceding horizontal period to the white gradation level of the current horizontal period. Similarly, when data is supplied in synchronization with the sequential scanning method, the red (R) liquid crystal cells connected to the fourth data line D4 are weakly charged due to the charging delay of the fourth data line D4. The charging delay is generated because the charging potential of the fourth data line D4 does not change rapidly from the black gradation level of the immediately preceding horizontal period to the white gradation level of the current horizontal period.

According to the interlaced scanning method as in the present invention, the data voltage of the white gray level is supplied after all of the black gray data voltages are supplied, or the data voltage of the black gray level is supplied after all of the white gray data voltages are supplied. Therefore, the charge delay phenomenon on the data line as described above is greatly reduced. For example, among the liquid crystal cells connected to the third data line D3, the blue (B) liquid crystal cells are sequentially black in synchronization with the scan pulse SP applied to the odd gate lines G1, G3, and G5. After being first charged with the data voltage of, the green (G) liquid crystal cells are sequentially charged with the data voltage of white gray in synchronization with the scan pulse SP applied to the even gate lines G2, G4, and G6. Further, among the liquid crystal cells connected to the fourth data line D4, the blue (B) liquid crystal cells are sequentially black in synchronization with the scan pulse SP applied to the even gate lines G2, G4, and G6. Prior to charging with a data voltage of, the red (R) liquid crystal cells are first charged with a data voltage of white gray sequentially in synchronization with the scan pulse SP applied to the odd gate lines G1, G3, and G5.

On the other hand, in the interlace scan method, as the resolution of the liquid crystal display panel increases (that is, as the number of gate lines increases), the driving period of the odd or even gate lines becomes longer. However, as the driving period becomes longer, a moving picture response time (MPRT) characteristic becomes worse due to a difference in charging time between adjacent gate lines. Therefore, the present invention divides the scan regions defined by the gate lines into n (n is a positive integer of 2 or more) as shown in FIG. 7, and completes the scan operation in each scan region within a 1 / n frame. For example, when the scan areas G1 to G1080 are divided into four areas AR # 1 to AR # 4 as shown in FIG. 7, the gate driving circuit may include the first area AR # 1 within a quarter frame. After the odd gate lines of () are sequentially driven (hereinafter, the odd scan), the even gate lines of the first region AR # 1 are sequentially driven (hereafter, even scan). After the even scan for the first region AR # 1, the gate driving circuit scans the odd region after the odd scan of the second region AR # 2 in a 2/4 frame. The gate driving circuit performs an even scan after the odd scan of the second region AR # 2 after the odd scan of the third region AR # 3 in a 3/4 frame. The gate driving circuit performs an even scan after the odd scan of the third region AR # 3 and the odd scan of the fourth region AR # 4 in a 4/4 frame.

On the other hand, when the interlace scan method is applied to the jet inversion driving method as in the present invention, there is a side effect of eliminating the line dim peculiar to the interlace scan method shown in FIGS. 8 to 10.

When the interlace scan method as shown in FIG. 9 is applied to a normal liquid crystal cell connection configuration driven by a dot inversion method as shown in FIG. 8, the horizontal line HL # 2 where the even scan starts after the radix scan is completed as shown in FIG. 10. ), A charging failure occurs due to a change in polarity.

That is, the first, third, and fifth data lines D1, D3, and D5 are respectively synchronized with the scan pulses SP applied from the first, third, and fifth gate lines G1, G3, and G5. After charging the negative data voltage, the positive data voltage is synchronized with the scan pulse SP applied from the second, fourth, and sixth gate lines G2, G4, and G6. To charge. Therefore, charge delays are generated in the first, third and fifth data lines D1, D3, and D5 when the polarity of the data voltage is changed in synchronization with the scan pulse SP from the second gate line G2. . As a result, the liquid crystal cells of the second horizontal line HL # 2 connected between the second gate line G2 and the first, third, and fifth data lines D1, D3, and D5 are weakly charged.

In addition, the second, fourth, and sixth data lines D2, D4, and D6 are synchronized with the scan pulse SP applied from the first, third, and fifth gate lines G1, G3, and G5, respectively. After charging the data voltage of positive polarity, the data voltage of negative polarity is reduced in synchronization with the scan pulse SP applied from the second, fourth, and sixth gate lines G2, G4, and G6. To charge. Accordingly, charge delays are generated in the second, fourth, and sixth data lines D2, D4, and D6 when the polarity of the data voltage is changed in synchronization with the scan pulse SP from the second gate line G2. . As a result, the liquid crystal cells of the second horizontal line HL # 2 connected between the second gate line G2 and the second, fourth and sixth data lines D2, D4 and D6 are weakly charged.

However, according to the present invention, since the data polarity at the odd scan and the data polarity at the even scan are the same as shown in FIG. 5, the charging at the horizontal line at which the even scan starts as described above is performed. Defects will be prevented beforehand.

That is, the first, third, and fifth data lines D1, D3, and D5 are respectively synchronized with the scan pulses SP applied from the first, third, and fifth gate lines G1, G3, and G5. After charging the negative data voltage, the negative data voltage is still in synchronization with the scan pulse SP applied from the second, fourth and sixth gate lines G2, G4 and G6. To charge. Therefore, no charge delay occurs in the first, third, and fifth data lines D1, D3, and D5, and as a result, the second gate line G2 and the first, third, and fifth data lines D1, The liquid crystal cells of the second horizontal line HL # 2 connected between D3 and D5 are not weakly charged.

In addition, the second, fourth, and sixth data lines D2, D4, and D6 are synchronized with the scan pulse SP applied from the first, third, and fifth gate lines G1, G3, and G5, respectively. After charging the positive data voltage, the positive data voltage is still synchronized with the scan pulse SP applied from the second, fourth, and sixth gate lines G2, G4, and G6. To charge. Therefore, no charge delay occurs in the second, fourth, and sixth data lines D2, D4, and D6. As a result, the second gate line G2 and the second, fourth, and sixth data lines D2, The liquid crystal cells of the second horizontal line HL # 2 connected between D4 and D6 are not weakly charged.

As described above, the liquid crystal display and the driving method thereof according to the present invention employ the jet inversion driving method and the interlace scanning method simultaneously to reduce the driving frequency and power consumption of the data driving circuit, The display quality can be significantly improved by solving the mixed color fine horizontal line, which is a unique problem, by the interlaced scan method, and solving the problem of the interlaced scan method by the jet inversion driving method.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

10 liquid crystal display panel 11 timing controller
12: data driving circuit 13: gate driving circuit

Claims (9)

A liquid crystal display panel in which data lines and gate lines intersect and TFTs connected to the same data line are arranged in a zigzag pattern along a column direction;
A gate driving circuit sequentially supplying scan pulses to odd gate lines among the gate lines, and sequentially supplying scan pulses to even gate lines; And
And a data driving circuit for supplying data whose polarity is inverted in column line units in synchronization with the scan pulse to the data lines. The method of claim 1,
And liquid crystal cells connected to the data line through the TFTs are disposed on the right side of the data line in the odd horizontal line and on the left side of the data line in the even horizontal line. The method of claim 1,
In the liquid crystal display panel, the polarity of charging of data is inverted between the adjacent liquid crystal cells horizontally and vertically. The method of claim 1,
The gate driving circuit,
And dividing the scan regions defined by the gate lines into n (n is a positive integer of 2 or more), and completing the scan operation in each scan region within a 1 / n frame. The method of claim 4, wherein
When the scan area is divided into two, the gate driving circuit,
Driving odd gate lines of the first scan area sequentially after driving the odd gate lines of the first scan area within a half frame;
Following the sequential driving of the even gate lines of the first scan region, the odd gate lines of the second scan region are sequentially driven within a 2/2 frame, and then the even gate lines of the second scan region are sequentially driven. A liquid crystal display device. A driving method of a liquid crystal display device including a liquid crystal display panel in which data lines and gate lines intersect and TFTs connected to the same data line are arranged in a zigzag pattern along a column direction.
Sequentially supplying scan pulses to odd gate lines among the gate lines, and sequentially supplying scan pulses to even gate lines; And
And supplying data whose polarities are inverted on a column line basis in synchronization with the scan pulse, to the data lines. The method according to claim 6,
In the liquid crystal display panel, the polarity of the charging of data is inverted between the adjacent liquid crystal cells horizontally and vertically. The method according to claim 6,
Supplying the scan pulse,
The scan area defined by the gate lines is divided into n (n is a positive integer of 2 or more), and the scan operation in each scan area is completed within a 1 / n frame. Way. The method of claim 8,
When the scan area is divided into two, supplying the scan pulse,
Sequentially driving odd gate lines of the first scan region and sequentially driving even gate lines of the first scan region within a half frame; And
Sequential driving of even gate lines of the first scan region, followed by sequentially driving odd gate lines of the second scan region within 2/2 frames, and then sequentially driving even gate lines of the second scan region Method of driving a liquid crystal display device comprising a.

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