KR101845561B1 - Liquid crystal display and power consumption method thereof - Google Patents

Abstract

The liquid crystal display device according to the present invention includes liquid crystal cells located on an odd horizontal line and connected to odd data lines adjacent to one side thereof and liquid crystal cells connected to odd data lines located on an odd horizontal line, A liquid crystal display panel having cells; The plasma display apparatus according to claim 1, wherein the first polarity data voltage is supplied to the odd data lines and the second polarity data voltage is supplied to the odd data lines based on the video data, A data driving circuit for changing polarities of data voltages supplied to the data lines; And at least one of black gradation data and white gradation data included in the problem pattern is inputted at the time of inputting a problem pattern in which the gradation of the data voltage to be supplied through the same data line alternates with the black gradation and the white gradation in a period of one horizontal period And supplies the modulated data to the data driving circuit as the video data.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display (LCD)

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device capable of reducing power consumption and a method of reducing power consumption thereof.

The liquid crystal display displays an image by adjusting the light transmittance of the liquid crystal cells according to a video signal. An active matrix type liquid crystal display device in which a thin film transistor (hereinafter referred to as "TFT") is formed for each liquid crystal cell displays a moving image in comparison with a liquid crystal display device of a passive matrix type The image can be displayed with a clearer image quality.

In an active matrix type liquid crystal display device, in order to reduce the DC offset component and reduce deterioration of the liquid crystal, a dot inversion driving method is employed to invert the polarity of the data voltage in units of horizontal and vertical neighboring liquid crystal cells . The polarity of the data voltage is determined based on the common voltage. The positive (+) data voltage is selected within a range higher than the common voltage, and the negative (-) data voltage is selected within a range lower than the common voltage. According to such a dot inversion driving method, since the data voltage applied to the same data line must swing between positive (+) and negative (-) every horizontal period, the consumption of the data drive IC The power is increased.

In order to reduce the driving frequency and the power consumption of the data drive IC, a z-inversion driving method has been proposed. In the jet-inversion driving method, liquid crystal cells connected to the data lines through respective TFTs are arranged on the right side of the data lines in the odd horizontal lines HL # 1 and HL # 3 as shown in FIG. 1, # 2, HL # 4) are arranged on the left side of the data line. The liquid crystal cells located in the odd horizontal lines HL # 1 and HL # 3 are driven by the data voltages supplied from the data lines D1 to D4 adjacent to the left side in synchronization with the sequentially applied scan pulses And the liquid crystal cells located in the excellent horizontal lines HL # 2 and HL # 4 are sequentially supplied with the data voltages supplied from the data lines D2 to D5 adjacent to the right side, And is charged in synchronization with the pulse. In the odd frame, the positive data voltage is continuously applied to the odd data lines D1, D3 and D5 for one frame while the even data lines D2 and D4 are continuously applied with negative voltage -) data voltage is applied. On the other hand, in the odd frame, the negative (-) data voltage is continuously applied to the odd data lines D1, D3 and D5 for one frame while the even data lines D2 and D4 are continuously A polarity (+) data voltage is applied.

Such a jet-inversion driving method can control the polarity of the liquid crystal cells in dot-inversion form without swinging the polarity of the data voltage applied to the same data line every horizontal period. In the jet-inversion driving method, the polarity of the data voltage applied to the same data line is maintained constant for one frame, so that the power consumption of the data driving IC can be reduced.

In this manner, the jet-inversion driving method is effective in reducing the power consumption of the data drive IC. However, even if the jet-inversion driving method is adopted, the white gradation W and the black gradation B are alternated to the horizontal line units HL # 1 to HL # 4 as shown in FIG. 2, When the data W and the black gradation B display alternate data patterns in the vertical line units CL # 1 to CL # 4, the data drive IC has a small amount of power consumption reduction. FIGS. 2 and 3 are problematic patterns for increasing the output swing width of the data drive IC in the jet-inversion driving method. The output of the data drive IC swings between the white gradation level W and the black gradation level B every one horizontal period 1H in response to the input of the problem patterns, (? W1) is relatively large. In Fig. 4, "POL" indicates a polarity control signal for controlling the polarity of the data voltage to be supplied to the liquid crystal cells.

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a liquid crystal display device capable of reducing the power consumption of a data drive IC in response to an input of problematic patterns and a power consumption reduction method thereof.

In order to achieve the above object, a liquid crystal display device according to an embodiment of the present invention includes liquid crystal cells located on a radial horizontal line and connected to odd data lines adjacent to one side thereof, A liquid crystal display panel having liquid crystal cells connected to adjacent superior data lines; The plasma display apparatus according to claim 1, wherein the first polarity data voltage is supplied to the odd data lines and the second polarity data voltage is supplied to the odd data lines based on the video data, A data driving circuit for changing polarities of data voltages supplied to the data lines; And at least one of black gradation data and white gradation data included in the problem pattern is inputted at the time of inputting a problem pattern in which the gradation of the data voltage to be supplied through the same data line alternates with the black gradation and the white gradation in a period of one horizontal period And supplies the modulated data to the data driving circuit as the video data.

Wherein the data modulation circuit is configured to perform upward modulation of black gradation data included in the problem pattern to a first gradation value higher than the black gradation and lower than the white gradation, Keep it in white tones.

The first tone value is selected in a range of gradations that is greater than 0% and less than 5% of the luminance of the white gradation so as not to cause a significant difference due to the upward modulation.

Wherein the data modulation circuit modifies the black gradation data included in the problem pattern upward to a first gradation value higher than the black gradation and lower than the white gradation and outputs the white gradation data included in the problem pattern to the first Modulation is performed to a second tone value higher than the white tone and lower than the white tone.

Wherein the first tone value is selected in a gradation range that exhibits a luminance greater than 0% and less than 5% with respect to the luminance of the white gradation so as not to cause a significant difference due to the upward modulation, Is selected within a range of a gradation range that is greater than 85% of the luminance of the white gradation and exhibits a luminance of less than 100% so as not to cause a significant difference due to the white gradation.

And the data modulation circuit bypasses the input data to the data driving circuit when data other than the problem pattern is input.

According to an embodiment of the present invention, liquid crystal cells that are located on an odd horizontal line and are connected to odd data lines adjacent to one side thereof, and liquid crystal cells that are located on an odd horizontal line and connected to even- In a case where a gray level of a data voltage to be supplied through the same data line is alternated with black gradation and white gradation in a period of one horizontal period, Modulating at least one of grayscale data and white grayscale data and outputting the modulated data as video data; And supplying a data voltage of a first polarity to the odd data lines and a data voltage of a second polarity to the odd data lines based on the video data, wherein the odd data lines and the even data And changing polarities of the data voltages supplied to the lines.

A liquid crystal display device and a power consumption reduction method thereof according to the present invention are characterized in that in a liquid crystal display panel driven by a jet-inversion method, the gradation of a data voltage to be supplied through the same data line is repeated in black gradation and white gradation The output swing width of the data drive IC is reduced by modulating at least one of the black gradation data and the white gradation data included in the problem pattern. As a result, the present invention can drastically reduce power consumption and heat generation of the data driver IC as compared with the conventional jet-inversion method.

1 is a view showing a conventional jet inversion driving method;
Figures 2 and 3 are views showing problem patterns.
4 is a diagram showing the output swing width of a conventional data drive IC in response to input of a problem pattern;
5 is a view illustrating a liquid crystal display device according to an embodiment of the present invention.
6 is a detailed view of a data modulation circuit;
Fig. 7 is a view showing a size of a problem pattern preset in an external memory; Fig.
8A is a diagram showing an example of an up-modulation value for black gradation data;
8B is a diagram showing an example of an up-modulating value for black gradation data and a down-modulating value for white gradation data.
9 is a diagram showing the output swing width of the data drive IC during up-modulation of black gradation data.
Fig. 10 is a diagram showing the output swing width of the data drive IC when down-modulating white gradation data together with up-modulating black gradation data. Fig.
11 is a diagram illustrating a power consumption reduction method of a liquid crystal display device according to an embodiment of the present invention.

Hereinafter, a preferred embodiment of the present invention will be described with reference to FIGS. 5 to 11. FIG.

5 shows a liquid crystal display according to an embodiment of the present invention.

5, a liquid crystal display according to an embodiment of the present invention includes a liquid crystal display panel 10, a timing controller 11, a data driving circuit 12, a gate driving circuit 13, a data modulation circuit 14, , And an external memory (20).

The liquid crystal display panel 10 includes two glass substrates and a liquid crystal layer formed therebetween. In the liquid crystal display panel 10, a plurality of liquid crystal cells Clc are arranged in a matrix form for each pixel region provided with an intersection structure of the data lines DL and the gate lines GL.

The lower glass substrate of the liquid crystal display panel 10 includes a plurality of data lines DL, a plurality of gate lines GL, TFTs, pixel electrodes 1 of a liquid crystal cell Clc connected to TFTs, A common electrode 2 facing the pixel electrodes 1, and a storage capacitor Cst are formed. On the upper glass substrate of the liquid crystal display panel 10, a black matrix, a color filter, and a common electrode 2 are formed. The common electrode 2 is formed on an upper glass substrate in a vertical electric field driving mode such as a TN (Twisted Nematic) mode and a VA (Vertical Alignment) mode. The common electrode 2 is formed of an IPS (In Plane Switching) mode, an FFS (Fringe Field Switching) Is formed on the lower glass substrate together with the pixel electrode 1 in the same horizontal electric field driving system. On the upper glass substrate and the lower glass substrate of the liquid crystal display panel 10, polarizing plates having optical axes orthogonal to each other are attached, and an alignment film for forming a pre-tilt angle of liquid crystal is formed on the inner surface in contact with the liquid crystal.

The liquid crystal cells are connected to be driven by the jet-inversion method as shown in FIG. The liquid crystal cells connected to the data lines through the respective TFTs are arranged on the right side of the data lines in the odd horizontal lines HL # 1 and HL # 3 and the liquid crystal cells arranged in the odd horizontal lines HL # 2 and HL # Is disposed on the left side. The liquid crystal cells located in the odd horizontal lines HL # 1 and HL # 3 charge the data voltage supplied from the data lines D1 to D4 adjacent to the left side in synchronization with the scan pulse, The liquid crystal cells located on the excellent horizontal lines HL # 2 and HL # 4 charge the data voltage supplied from the data lines D2 to D5 adjacent to the right side in synchronization with the scan pulse. In the odd frame, the positive data voltage is continuously applied to the odd data lines D1, D3 and D5 for one frame while the even data lines D2 and D4 are continuously applied with negative voltage -) data voltage is applied. On the other hand, in the odd frame, the negative (-) data voltage is continuously applied to the odd data lines D1, D3 and D5 for one frame while the even data lines D2 and D4 are continuously A polarity (+) data voltage is applied.

The timing controller 11 receives the timing signals such as the vertical / horizontal synchronizing signals Vsync and Hsync, the data enable signal DE and the clock signal DCLK and supplies them to the data driving circuit 12 and the gate driving circuit 13, And generates control signals (DDC, GDC) for controlling the operation timings of the switches.

The data control signal DDC for controlling the operation timing of the data driving circuit 12 includes a source sampling control signal for controlling the latch operation of data in the data driving circuit 12 based on a rising or falling edge, A source output enable signal SOE for controlling the output of the data driving circuit 12 and a polarity of a data voltage to be supplied to the liquid crystal cells Clc of the liquid crystal display panel 10, And a polarity control signal POL for controlling the polarity control signal POL.

The gate control signal GDC for controlling the operation timing of the gate driving circuit 13 includes a gate start pulse GSP indicating a starting horizontal line at which the scanning starts in one vertical period in which one screen is displayed, A gate shift clock signal (Gate Shift) generated in a pulse width corresponding to the ON period of the TFT as a timing control signal inputted to the shift register in the gate drive circuit 13 and sequentially shifting the gate start pulse GSP, Clock: GSC) and a gate output enable (GOE) for controlling the output of the gate driving circuit 13, and the like.

The timing controller 11 arranges the input digital video data RGB and the modulated digital video data RmGmBm in accordance with the resolution of the liquid crystal display panel 10 and supplies them to the data driving circuit 12.

The data driving circuit 12 includes a plurality of data drive ICs. Each of the data drive ICs includes a shift register, a latch, a digital to analog converter (DAC), an output buffer, and the like.

The data driving circuit 12 latches the digital video data RGB and RmGmBm input from the timing controller 11 with reference to the data control signal DDC and outputs the latched data to the data control circuit 12 with reference to the polarity control signal POL Polarity data voltage or a negative data voltage. The data driving circuit 12 inverts the polarities of the data voltages supplied to the data lines DL in units of column lines and inverts them in frame units. The data voltage whose polarity is inverted by the data driving circuit 12 is sequentially supplied to the data lines DL in synchronization with the scan pulse.

The gate drive circuit 13 includes a plurality of gate drive ICs. Each of the gate drive ICs includes a shift register, a level shifter for converting an output signal of the shift register into a swing width appropriate for driving the TFT of the liquid crystal cell, and an output buffer. The gate drive circuit 13 sequentially supplies scan pulses having a pulse width of about one horizontal period to the gate lines GL to select a horizontal line to which a data voltage is to be applied.

The data modulation circuit 14 analyzes the input digital video data RGB by referring to the external memory 20 and outputs the input digital video data RGB so that the output swing width of the data voltage is reduced upon input of the problematic patterns shown in FIGS. Modulates the data (RGB). 2 and 3, the data modulation circuit 14 has a problem in inputting a problem pattern in which the gradation of the data voltage to be supplied through the same data line repeats black gradation (B) and white gradation (W) Modulated digital video data (RmGmBm) is generated by modulating at least one of black gradation data and white gradation data included in the pattern. The data modulation circuit 14 may be embedded in the timing controller 11. [

In the external memory 20, the size of the problematic pattern used for determining whether the pattern is a problem pattern and the modulation values used for generating the modulated digital video data RmGmBm are set in advance.

6 shows the data modulation circuit 14 in detail. 7 shows the size of a problem pattern preset in the external memory. 8A shows an example of an up-modulation value for black gradation data. 8B shows an example of the up-modulating value for the black gradation data and the down-modulating value for the white gradation data.

6, the data modulation circuit 14 includes a first analysis unit 141, a storage and comparison unit 142, a second analysis unit 143, and a modulation unit 144.

The first analyzing unit 141 refers to the external memory 20 and determines whether the input digital video data satisfies the horizontal size X of the predetermined problem pattern as shown in FIG. When the one line data satisfies the horizontal size X of the problem pattern, the first analyzing section 141 outputs the one line data to the storing & comparing section 142, whereas when the one line data is the horizontal size (X) is not satisfied, the one-line data is bypassed to the data driving circuit 12.

The storing and comparing unit 142 stores one line data inputted from the first analyzing unit 141 and compares the stored one line data with the next one line data inputted from the first analyzing unit 141. [ The storage and comparison unit 142 may compare the two line data to be compared with each other in a white / black data pair along the horizontal direction as in the problem pattern of Fig. 2, Pair and a black / black data pair. 2 and 3, the storing & comparing unit 142 outputs the stored 1-line data to the second analyzing unit 143, whereas if the 2-line data are not consecutive, 1 line data to the data driving circuit 12. [ Then, the storage and comparison unit 142 stores the next line data, compares the stored next line data with the next next line data input from the first analyzing unit 141, The same judgment process is repeated.

The second analyzing unit 143 increases the count value by "1 " every time one line of data is input from the storing & comparing unit 142. [ The second analyzing unit 143 determines whether the accumulated offset value satisfies the longitudinal size Y of the problem pattern set in advance as shown in FIG. The second analyzing section 143 outputs the accumulated one line data to the modulating section 144 until the cumulative count value satisfies the vertical size Y of the problem pattern, (Y) is not satisfied, one line data is bypassed to the data driving circuit 12.

The modulator 144 refers to the external memory 20 and determines at least one of the black gradation data and the white gradation data included in the problem pattern based on the determination that the line data input from the second analyzer 143 is a problem pattern And supplies the modulated digital video data RmGmBm to the data driving circuit 12. The modulated digital video data RmGmBm is supplied to the data driving circuit 12,

The modulation section 144 modulates the black gradation data included in the problem pattern upward to a first gradation value higher than the black gradation B and lower than the white gradation W and also modulates the white gradation data included in the problem pattern White gradation (W). It is preferable that the first tone value is selected within a gradation range that is greater than 0% and less than 5% of the luminance of the white gradation W so as not to cause a significant difference due to the upward modulation. For example, when input digital video data (RGB) is implemented with 8 bits, the modulating section 144 converts the black gradation data to a first gradation value (" 0 " L). ≪ / RTI > The "63" gradation is a maximum upward value that can be selected as the first gradation value L, and exhibits a luminance of 4.68% of the luminance of the white gradation W. [

On the other hand, the modulating section 144 modulates the black gradation data included in the problem pattern upward to a first gradation value higher than the black gradation B and lower than the white gradation W, Modulated to a second tone value which is higher than the first tone value and lower than the white tone W. It is preferable that the first tone value is selected within a tone range that is greater than 0% and less than 5% of the luminance of the white tone W so as not to cause a significant difference due to the upward modulation, Is preferably selected within a range of a gradation range that is greater than 85% of the luminance of the white gradation (W) and exhibits a luminance lower than 100% so as not to cause a significant difference due to modulation. For example, when the input digital video data RGB is implemented with 8 bits, the modulator 144 converts the black gradation data to a first gradation value (" 0 " L), and the white tone data can be down-modulated to either the second tone value H of "239" tone or higher and lower than "255" tone. The "63" gradation is a maximum upward value that can be selected as the first gradation value L, and exhibits a luminance of 4.68% of the luminance of the white gradation W. [ The "239" gradation is a maximum downward value that can be selected as the second gradation value L, and exhibits 86.7% luminance as compared with the luminance of the white gradation W. [

9 shows the output swing width of the data drive IC during up-modulation of the black gradation data.

Referring to FIG. 9, the output of the data drive IC according to the present invention corresponds to the input of the problem patterns as shown in FIGS. 2 and 3, between the first gradation level and the white gradation level The output swing width? W2 of the data drive IC is reduced as compared with the prior art. As a result, the present invention can reduce power consumption and heat generation of the data driver IC without causing a significant difference due to data modulation.

FIG. 10 shows the output swing width of the data drive IC when down-modulating white gradation data together with up-modulating the black gradation data.

Referring to FIG. 10, the output of the data drive IC according to the present invention corresponds to the input of the problem patterns as shown in FIG. 2 and FIG. 3, and the output of the data drive IC according to the present invention is swung between the first gradation level and the second gradation level, Therefore, the output swing width? W2 of the data drive IC is further reduced as compared with Fig. As a result, the present invention can further reduce power consumption and heat generation of the data driver IC without causing a significant difference due to data modulation.

FIG. 11 shows a power consumption reduction method of a liquid crystal display according to an embodiment of the present invention.

11, the power consumption reduction method of the liquid crystal display device analyzes the input data and determines whether the digital video data of one line satisfies the predetermined horizontal size of the problematic pattern (S1, S2)

In the power consumption reduction method of this liquid crystal display apparatus, when the 1-line data satisfies the horizontal size of the problem pattern (Yes), the 1-line data is stored, and the stored 1-line data is stored in the 1-line data (S3)

The power consumption reduction method of the liquid crystal display device is a method in which two line data to be compared are successively formed as white / black data pairs along the horizontal direction as in the problem pattern of Fig. 2, It is determined whether the white data pair and the black / black data pair are alternately continued (S4)

In the method of reducing the power consumption of the liquid crystal display device, if the result of S4 is YES (Yes), the count value is increased by "1 " every time one line of data is input, (S5, S6)

If the accumulated line count value satisfies the vertical size of the problem pattern (Yes), it is determined that the inputted line data is a problem pattern and the black gradation data included in the problem pattern And white gradation data to generate modulated digital video data RmGmBm and then supplies the modulated digital video data RmGmBm to the data driving circuit 12. At S8,

This power consumption reduction method of the liquid crystal display device is a method for down-modulating black gradation data included in a problem pattern to a first gradation value higher than a black gradation and lower than a white gradation, It is possible to maintain the gradation. The power consumption reduction method of the liquid crystal display device is a method of reducing the black gradation data included in the problem pattern by up-modulating the black gradation data to a first gradation value higher than the black gradation and lower than the white gradation, And to a second tone value lower than the white tone.

On the other hand, when the power consumption reduction method of this liquid crystal display device is "No" as a result of the determination in S2, S4, and S6, the input data is directly bypassed to the data driving circuit (S9)

As described above, the liquid crystal display device and the power consumption reduction method thereof according to the present invention are characterized in that in the liquid crystal display panel driven by the jet-inversion method, the gradation of the data voltage to be supplied through the same data line is changed to black gradation The output swing width of the data drive IC is reduced by modulating at least one of the black gradation data and the white gradation data included in the problem pattern at the time of inputting the problem pattern for repeating the white gradation. As a result, the present invention can drastically reduce power consumption and heat generation of the data driver IC as compared with the conventional jet-inversion method.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

10: liquid crystal display panel 11: timing controller
12: data driving circuit 13: gate driving circuit
14: Data modulation circuit 20: External memory
141: first analysis unit 142: storage & comparison unit
143: second analyzing unit 144:

Claims (11)

A liquid crystal display panel having liquid crystal cells located on a radial horizontal line and connected to odd data lines adjacent to one side thereof and liquid crystal cells connected to even data lines adjacent to the other side of the horizontal horizontal line;
The plasma display apparatus according to claim 1, wherein the first polarity data voltage is supplied to the odd data lines and the second polarity data voltage is supplied to the odd data lines based on the video data, A data driving circuit for changing polarities of data voltages supplied to the data lines; And
The black gradation data included in the problem pattern is modulated higher than the black gradation when a problem pattern in which the gradation of the data voltage to be supplied through the same data line alternates with the black gradation and the white gradation in a period of one horizontal period, And a data modulation circuit for holding the white gradation data included in the pattern in the white gradation without modulation and supplying the white gradation data as the video data to the data driving circuit. The method according to claim 1,
Wherein the data modulation circuit comprises:
Modulates black gradation data included in the problem pattern to a first gradation value higher than the black gradation and lower than the white gradation. 3. The method of claim 2,
Wherein the first tone value is selected in a gradation range that is greater than 0% and less than 5% of the luminance of the white gradation so as not to cause a significant difference due to the upward modulation. A liquid crystal display panel having liquid crystal cells located on a radial horizontal line and connected to odd data lines adjacent to one side thereof and liquid crystal cells connected to even data lines adjacent to the other side of the horizontal horizontal line;
The plasma display apparatus according to claim 1, wherein the first polarity data voltage is supplied to the odd data lines and the second polarity data voltage is supplied to the odd data lines based on the video data, A data driving circuit for changing polarities of data voltages supplied to the data lines; And
When the problematic pattern in which the gradation of the data voltage to be supplied through the same data line is alternated with the black gradation and the white gradation in a period of one horizontal period is set to be higher than the black gradation and higher than the white gradation Modulating the white gradation data included in the problem pattern to a second gradation value that is higher than the first gradation value and lower than the white gradation level and outputs the white gradation data as the video data to the data driving circuit And a data modulation circuit for supplying the data to the liquid crystal display panel. 5. The method of claim 4,
Wherein the first tone value is selected in a gradation range that is greater than 0% and less than 5% of the luminance of the white gradation so as not to cause a significant difference due to the upward modulation,
Wherein the second tone value is selected within a range of a tone range that is greater than 85% and less than 100% of the luminance of the white tones so as not to cause a significant difference due to the down-modulation. The method according to claim 1,
Wherein the data modulation circuit bypasses the input data to the data driving circuit when data other than the problem pattern is input. The liquid crystal cells located in the odd horizontal line and connected to odd data lines adjacent to one side thereof and the liquid crystal cells connected to the odd data lines located on the odd horizontal line and adjacent to the odd data lines adjacent to the odd horizontal line, In the power reduction method,
The black gradation data included in the problem pattern is modulated higher than the black gradation when a problem pattern in which the gradation of the data voltage to be supplied through the same data line alternates with the black gradation and the white gradation in a period of one horizontal period, Maintaining the white gradation data included in the pattern in the white gradation without modulation and outputting the white gradation data as video data; And
And supplying a data voltage of a first polarity to the odd data lines and a data voltage of a second polarity to the odd data lines based on the video data, And changing the polarities of the data voltages supplied to the data lines to each other. 8. The method of claim 7,
Wherein the step of modulating black gradation data included in the problem pattern comprises:
Modulating the black gradation data included in the problem pattern to a first gradation value higher than the black gradation and lower than the white gradation. 9. The method of claim 8,
Wherein the first gray level value is selected within a gray level range that is greater than 0% and less than 5% of the brightness of the white gray level so as not to cause a significant difference due to up-modulation. Abatement method. The liquid crystal cells located in the odd horizontal line and connected to the odd data lines adjacent to one side thereof and the liquid crystal cells connected to the even data lines located on the odd horizontal line and adjacent to the odd data lines adjacent to the odd horizontal line, In the power reduction method,
When the problematic pattern in which the gradation of the data voltage to be supplied through the same data line is alternated with the black gradation and the white gradation in a period of one horizontal period is set to be higher than the black gradation and higher than the white gradation Modulating the white tone data included in the problem pattern to a lower first tone value and down-modulating the white tone data included in the problem pattern to a second tone value higher than the first tone value and lower than the white tone value and outputting the video data as the video data; And
And supplying a data voltage of a first polarity to the odd data lines and a data voltage of a second polarity to the odd data lines based on the video data, And changing the polarities of the data voltages supplied to the data lines to each other. 11. The method of claim 10,
Wherein the first tone value is selected in a gradation range that is greater than 0% and less than 5% of the luminance of the white gradation so as not to cause a significant difference due to the upward modulation,
Wherein the second tone value is selected within a range of a gradation range that is greater than 85% and less than 100% of the luminance of the white gradation so as not to cause a significant difference due to the down-modulation. Power reduction method.

Images