KR20120060761A - Method for programming nonvolatile memory device - Google Patents

Method for programming nonvolatile memory device Download PDF

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Publication number
KR20120060761A
KR20120060761A KR1020110127830A KR20110127830A KR20120060761A KR 20120060761 A KR20120060761 A KR 20120060761A KR 1020110127830 A KR1020110127830 A KR 1020110127830A KR 20110127830 A KR20110127830 A KR 20110127830A KR 20120060761 A KR20120060761 A KR 20120060761A
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South Korea
Prior art keywords
program
voltage
pass
bits
bit line
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KR1020110127830A
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Korean (ko)
Inventor
세이이치 아리토메
위수진
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에스케이하이닉스 주식회사
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Priority to KR1020110127830A priority Critical patent/KR20120060761A/en
Priority to US13/309,760 priority patent/US8493792B2/en
Publication of KR20120060761A publication Critical patent/KR20120060761A/en

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/12—Programming voltage switching circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G11C16/3459—Circuits or methods to verify correct programming of nonvolatile memory cells

Abstract

PURPOSE: A method for programming a nonvolatile memory device is provided to improve a threshold voltage distribution margin of a memory cell by decreasing a threshold voltage distribution width. CONSTITUTION: A bit line potential of a memory cell block is set(S410). It is checked whether memory cells of a selected page is programmed over a target threshold voltage value(S430). If a program operation is failed, the number of memory cells where the program passes is counted(S440). It is determined whether the counted number of pass bits is larger or smaller than the number of pass allowable bits(S450). If the number of pass bits is smaller than or equal to the pass allowable number, a program operation is executed by increasing a program voltage(S460).

Description

Method for programming nonvolatile memory device

The present invention relates to a method of programming a nonvolatile memory device, and more particularly, to a method of programming a nonvolatile memory device capable of reducing a threshold voltage distribution width.

Recently, there is an increasing demand for a nonvolatile memory device that can be electrically programmed and erased and that does not require a refresh function to rewrite data at regular intervals.

As a method of programming a nonvolatile memory device, an incremental step pulse programming (ISPP) method is known. That is, the program operation is performed while constantly increasing the step voltage with respect to the program start voltage.

1 is a flowchart illustrating a program method of a nonvolatile memory device using an ISPP scheme according to the prior art.

Referring to FIG. 1, a program operation is performed by applying a program voltage to a word line connected to memory cells of a memory cell block to be programmed (S11). Next, the memory cells are programmed using a page buffer connected to the memory cell block. A program verifying operation is performed to verify whether the program has been programmed above the target threshold voltage value by verifying the state. (S12) If all memory cells are programmed above the target threshold voltage value as a result of the program verifying operation, the program is determined to be a program verifying operation pass. If the operation ends, otherwise, it is determined that the program verify operation fails, and the program voltage is increased by the step voltage to set a new program voltage. (S13) The process starts again from step S11 using the newly set program voltage.

2 is a threshold voltage distribution diagram illustrating a threshold voltage distribution of memory cells according to a conventional program method.

Referring to FIG. 2, in the above-described conventional program method, the threshold voltage distribution of memory cells increases according to a new program voltage that is sequentially increased from the program start voltage, and is programmed above a desired target threshold voltage value PV. In this case, as the number of program pulses applied during the ISPP operation increases, the write tail A portion of the threshold voltage distribution gradually increases. This is because a plurality of memory cells have different amounts of electrons injected into the floating gate during a program operation, and some memory cells increase a threshold voltage greatly according to a program pulse. As such, when the light tail A of the threshold voltage distribution is increased, the threshold voltage distribution width is increased. In the case of a multi-level cell having a plurality of threshold voltage distributions, the threshold voltage distribution margin is reduced, thereby causing a malfunction.

The technical problem to be achieved by the present invention is to count the number of memory cells programmed above the target threshold voltage value after application of the program voltage, and when the counted number is greater than the set number, the threshold of rising according to the program voltage by increasing the bit line voltage. The present invention provides a method of programming a nonvolatile memory device capable of improving a threshold voltage distribution margin of a memory cell by reducing a voltage distribution width.

According to an embodiment of the present disclosure, a method of programming a nonvolatile memory device may include setting a potential of a bit line connected to a memory cell block including a plurality of pages, and programming a voltage to a word line of a selected page among the plurality of pages. Performing a program operation by applying a program, applying a program verify voltage to a word line of the selected page, and performing a program verify operation; and when it is determined that the program verify operation is a fail, the passed memory cell Counting the number of bits to determine whether the number of pass bits is greater than the first pass permission bit, and if the number of pass bits is greater than the first pass permission bit, increasing the potential of the bit line connected to the failed memory cell. Steps.

According to another aspect of the present invention, a method of programming a nonvolatile memory device includes setting a potential of a bit line connected to a memory cell block including a plurality of pages, and programming a voltage to a word line of a selected page among the plurality of pages. Performing a program operation by applying a first step, sequentially applying first to third program verification voltages to a word line of the selected page, and performing first to third program verification operations, and performing the first program verification. If it is determined that the operation is a fail, determining whether the number of the first pass bits counting the number of the passed memory cells is greater than the number of the first pass allowable bits and the number of the first pass bits is greater than the number of the second pass allowable bits. If less than or equal to, the potential of the bit line connected to the failed memory cell is raised to a first bit line potential. And raising.

According to another aspect of the present invention, there is provided a method of programming a nonvolatile memory device, the method comprising: setting a potential of a bit line connected to a memory cell block including a plurality of pages, and programming a word line of a selected page among the plurality of pages. Performing a program operation by applying a voltage; applying a program verify voltage to a word line of the selected page; and performing a program verify operation; when it is determined that the program verify operation is a fail, the program voltage Determining whether a voltage value is between the first program setting voltage and the second program setting voltage, and when the program voltage is a voltage value between the first program setting voltage and the second program setting voltage, Raising the potential of the bit line.

According to an embodiment of the present invention, after application of a program voltage, the number of memory cells programmed above a target threshold voltage value is counted, and when the counted number is greater than the set number, the threshold is increased by increasing the bit line voltage according to the program voltage. By reducing the voltage distribution width, the threshold voltage distribution margin of the memory cell may be improved.

1 is a flowchart illustrating a program method of a nonvolatile memory device using a conventional ISPP scheme.
2 is a threshold voltage distribution diagram illustrating a threshold voltage distribution of memory cells for explaining a problem of a program method according to the related art.
3 is a configuration diagram of a nonvolatile memory device.
4 is a flowchart illustrating a program method of a nonvolatile memory device according to a first embodiment of the present invention.
5 is a flowchart illustrating a program method of a nonvolatile memory device according to a second exemplary embodiment of the present invention.
6 is a flowchart illustrating a program method of a nonvolatile memory device according to a third embodiment of the present invention.
7 is a threshold voltage distribution diagram of memory cells for explaining the program method of FIG. 6.
8 is a flowchart illustrating a program method of a nonvolatile memory device according to a fourth embodiment of the present invention.

Hereinafter, with reference to the accompanying drawings will be described a preferred embodiment of the present invention. However, the present invention is not limited to the embodiments described below, but may be implemented in various forms, and the scope of the present invention is not limited to the embodiments described below. Only this embodiment is provided to complete the disclosure of the present invention and to fully inform those skilled in the art, the scope of the present invention should be understood by the claims of the present application.

3 is a configuration diagram of a nonvolatile memory device.

Referring to FIG. 3, a nonvolatile memory device may include a memory cell block 110, a page buffer unit 120, a pass / fail detector 130, a pass bit counter 140, a controller 150, and a voltage generator ( 160, X decoder 170.

The memory cell block 110 includes a plurality of memory cells for storing or outputting the stored data.

The page buffer unit 120 controls the potential of the bit lines of the memory cell block during the program operation and detects whether the memory cell is programmed by sensing the potential of the bit line during the program verify operation.

The pass / fail detector 130 detects a path or a fail of the program operation according to the threshold voltage state of the memory cells detected by the page buffer 120 during the program verify operation, and outputs the path or fail to the controller 150.

The pass bit counter 140 counts the number of memory cells passed through the program operation during the program verify operation and outputs the counted number to the pass bit to the controller 150.

The controller 150 controls the operations of the voltage generator 160 and the page buffer unit 120 during the program operation, and the detection signal and the pass bit counter 140 output from the pass / fail detector 130 during the program verify operation. Using the pass bit output from the control panel) controls the voltage generator 160 to adjust the program voltage and the page buffer 120 to adjust the bit line voltage.

The voltage generator 160 generates a program voltage during a program operation, and the program voltage is sequentially raised by the step voltage and output. In addition, the voltage generator 160 generates and outputs verification voltages PV1, PV2, and PV3 during a program verification operation.

The X decoder outputs a program voltage to a selected word line of the memory cell block 110 during a program operation, and outputs verification voltages PV1, PV2, and PV3 to the selected word line during a program verify operation.

4 is a flowchart illustrating a program method of a nonvolatile memory device according to a first embodiment of the present invention.

A program method of a nonvolatile memory device according to a first embodiment of the present invention will be described with reference to FIGS. 3 and 4 as follows.

1) Bit line voltage setting (S410)

The bit line potential of the memory cell block 110 is set using the page buffer unit 120 to program a selected page of the memory cell block 110. In this case, when the corresponding memory cell is a program cell, the bit line voltage is set to the ground voltage level. When the corresponding memory cell is the erase cell, the bit line voltage is set to the power supply voltage VCC for prohibiting program.

2) Program operation (S420)

The voltage generator 160 generates a program voltage Vpgm, and the generated program voltage Vpgm is applied to a word line connected to the selected page of the memory cell block 110 through the X decoder 170. At this time, the program voltage Vpgm is a start program voltage of the ISPP method. As a result, the memory cells of the selected page are programmed with a higher threshold voltage.

3) Program Verification (S430)

The program verify operation is performed to check whether all the memory cells of the selected page are programmed to the target threshold voltage value or more. When all memory cells are programmed to the target threshold voltage value or more as a result of the program verifying operation, the program operation is determined to be passed and the program operation is terminated. When one or more memory cells have a threshold voltage value lower than the target threshold voltage value, the program operation is performed. It is determined that this has failed.

4) Pass Bit Count (S440)

When it is determined that the program operation is failed as a result of the above-described program verifying operation S430, the pass bit counter 140 may increase the threshold voltage value of the selected page above the target threshold voltage value, that is, the memory cell to which the program has passed. Count the number of passes (pass bits).

5) Comparison of the Number of Pass Bits and the Number of Pass Allowed Bits (S450)

The pass bit counter 140 determines whether the number of pass bits counted by the pass bit counter 140 is greater than or less than or equal to the pass allowable bit number N. FIG. It is preferable to set the pass permission bit number N to 1% or less of all the bits of the selected page. For example, in the case of a memory cell block in which one page is 8 KB, the number of pass allowable bits N is preferably 80 bytes or 640 bits or less.

6) Increase the program voltage to program (S460)

When the number of pass bits is less than or equal to the number of pass allowable bits (N) as a result of the comparison of the number of pass bits and the pass allowable bits (S450), the program voltage is increased to perform a program operation. In this case, it is preferable to set the new program voltage by increasing the step voltage Vstep from the previously used program voltage. After that, the program is re-run from the program verification (S430).

7) Reset the Bit Line Voltage Associated with the Failed Memory Cell (S470)

When the number of pass bits is greater than the number of pass allowable bits (N) as a result of the comparison of the number of pass bits and the pass permission bits (S450), the ground voltage level is set from the value at which the bit line voltage connected to the failed memory cell is set as the initial ground voltage level. Reset to a new higher voltage. In this case, the new bit line voltage is preferably set to a voltage higher by an ax step voltage (Vstep) than the existing bit line voltage, and preferably set to a level lower than the power supply voltage applied for program prohibition. Where a has a value between 0 and 1. The step voltage Vstep uses a step voltage for raising the program voltage in the ISPP method. Thereafter, the program voltage is increased to perform the program again from the program step S460.

According to the first exemplary embodiment of the present invention, when it is determined that a program is failing, a pass bit is counted to transfer the bit line voltage connected to the failed memory cell when the number of pass bits is greater than the number of pass allowable bits (N). By increasing the bit line voltage and then using the ISPP program method, the rising threshold voltage value per program pulse is reduced, thereby reducing the threshold voltage distribution width. This can achieve the same effect as reducing the step voltage value by reducing the step voltage value in the ISPP method, and at the same time, does not increase the program time.

5 is a flowchart illustrating a program method of a nonvolatile memory device according to a second exemplary embodiment of the present invention.

A method of programming a nonvolatile memory device according to a second exemplary embodiment of the present invention will be described with reference to FIGS. 3 and 5 as follows.

1) Bit line voltage setting (S510)

The bit line potential of the memory cell block 110 is set using the page buffer unit 120 to program a selected page of the memory cell block 110. In this case, when the corresponding memory cell is a program cell, the bit line voltage is set to the ground voltage level. When the corresponding memory cell is the erase cell, the bit line voltage is set to the power supply voltage VCC for prohibiting program.

2) Program operation (S520)

The voltage generator 160 generates a program voltage Vpgm, and the generated program voltage Vpgm is applied to a word line connected to the selected page of the memory cell block 110 through the X decoder 170. At this time, the program voltage Vpgm is a start program voltage of the ISPP method. As a result, the memory cells of the selected page are programmed with a higher threshold voltage.

3) Program Verification (S530)

The program verify operation is performed to check whether all the memory cells of the selected page are programmed to the target threshold voltage value or more. When all memory cells are programmed to the target threshold voltage value or more as a result of the program verifying operation, the program operation is determined to be passed and the program operation is terminated. When one or more memory cells have a threshold voltage value lower than the target threshold voltage value, the program operation is performed. It is determined that this has failed.

4) Pass Bit Count (S540)

When it is determined that the program operation is failed as a result of the above-described program verifying operation S430, the pass bit counter 140 may increase the threshold voltage value of the selected page above the target threshold voltage value, that is, the memory cell to which the program has passed. Count the number of passes (pass bits).

5) Comparison of the Number of Pass Bits and the Number of First Pass Allowed Bits (S550)

The pass bit counter 140 determines whether the number of pass bits counted by the pass bit counter 140 is greater than or less than or equal to the first pass allowable bit number N. FIG. It is preferable to set the first pass permission bit number N to 1% or less of all the bits of the selected page. For example, in the case of a memory cell block having one page of 8 KB, the first pass allowable number N is preferably 80 bytes, that is, 640 bits or less.

6) Increase the program voltage to program (S560)

When the number of pass bits is less than or equal to the first pass allowed bit number N as a result of the comparison of the number of pass bits with the first pass allowed bit (S550), the program voltage is increased to perform a program operation. In this case, it is preferable to set the new program voltage by increasing the step voltage Vstep from the previously used program voltage. After that, the program is re-run from the program verification step S430 by using the new program voltage.

7) Comparison of the Number of Pass Bits and the Number of Second Pass Allowed Bits (S570)

When the number of pass bits is greater than the first pass allowable bit number N as a result of the comparison of the number of pass bits with the first pass allowable bit (S550), the number of pass bits counted by the pass bit counter 140 is the second pass. It is determined whether it is greater than, less than or equal to the allowed number of bits (M). The second pass permission bit number M may be set to 99% or more of all bits of the selected page. For example, in the case of a memory cell block having one page of 8 KB, the second pass allowable bit number M is preferably 7.92 KB or 64880 bits or more. If the result of the comparison between the number of pass bits and the number of second pass allowable bits M is greater than the number of second pass allowable bits M, the program voltage is increased and programmed again (S560).

8) Reset Bitline Voltage Associated with Failed Memory Cell (S580)

When the number of pass bits is less than or equal to the second pass allowed bit number M, the voltage of the bit line connected to the failed memory cell is greater than the ground voltage level. Reset to new high voltage. In this case, the new bit line voltage is preferably set to a voltage higher by an ax step voltage (Vstep) than the existing bit line voltage, and preferably set to a level lower than the power supply voltage applied for program prohibition. Where a has a value between 0 and 1. The step voltage Vstep uses a step voltage for raising the program voltage in the ISPP method. Thereafter, the program voltage is increased to perform the above-described step (S560).

According to the second exemplary embodiment of the present invention, a memory cell that is failed when the number of pass bits is counted between the first allowable bit number N and the second allowable bit number by counting pass bits when it is determined to fail during a program verify operation. After increasing the bit line voltage connected to the previous bit line voltage by using the ISPP method, the rising threshold voltage value per program pulse is reduced, thereby reducing the threshold voltage distribution width. This can achieve the same effect as reducing the step voltage value by reducing the step voltage value in the ISPP method, and at the same time, does not increase the program time.

6 is a flowchart illustrating a program method of a nonvolatile memory device according to a third embodiment of the present invention. A third embodiment of the present invention is an embodiment of a program method of a multi-level cell capable of storing two bits of data.

7 is a threshold voltage distribution diagram of memory cells for explaining the program method of FIG. 5.

A program method of a nonvolatile memory device according to a third embodiment of the present invention will be described with reference to FIGS. 3, 6, and 7 as follows.

1) Bit line voltage setting (S610)

The bit line potential of the memory cell block 110 is set using the page buffer unit 120 to program a selected page of the memory cell block 110. In this case, when the corresponding memory cell is a program cell, the initial bit line voltage is set to the ground voltage level, and when the corresponding memory cell is the erase cell, the bit line voltage is set to the power supply voltage VCC for prohibiting program. The subsequent first to third bit line voltages are initially set to the ground voltage level.

2) Program operation (S620)

The voltage generator 160 generates a program voltage Vpgm, and the generated program voltage Vpgm is applied to a word line connected to the selected page of the memory cell block 110 through the X decoder 170. At this time, the program voltage Vpgm is a start program voltage of the ISPP method. As a result, the memory cells of the selected page are programmed with a higher threshold voltage.

3) First program verifying operation (S630).

The first program verify operation is performed to check whether all memory cells of the selected page are programmed to be equal to or greater than the first target threshold voltage value PV1. If all memory cells are programmed to be greater than or equal to the first target threshold voltage value PV1 as a result of the first program verify operation, the program operation is determined to be passed, and one or more memory cells receive a threshold voltage value lower than the first target threshold voltage value. If so, it is determined that the program operation is failed.

4) second program verifying operation (S640).

When it is determined that the result of the first program verifying operation S630 is a pass, the second program verifying operation is performed to check whether all of the memory cells of the selected page are programmed to be greater than or equal to the second target threshold voltage value PV2. If all memory cells are programmed to be greater than or equal to the second target threshold voltage value PV2 as a result of the second program verify operation, the program operation is determined to be passed, and one or more memory cells are configured to have a threshold voltage value lower than the second target threshold voltage value. If so, it is determined that the program operation is failed.

5) Pass Bit Count Count (S650)

When it is determined that the program operation is failed as a result of the above-described first program verifying operation S630, the pass bit counter 140 may increase the threshold voltage value of the selected page above the first target threshold voltage value. Count the number of memory cells that are passed (the number of pass bits).

6) Comparison of the Number of Pass Bits and the Number of First Pass Allowed Bits (S660)

It is determined whether the number of pass bits counted by the pass bit counter 140 is greater than or less than or equal to the first pass permission bit number NPV1. The first pass allowable bit number N is preferably set to be larger than 10 bits and 20% or less of all the bits of the selected page. As a result of comparing the number of pass bits and the number of first pass allowed bits, when the number of pass bits is less than or equal to the first pass allowed bit number NPV1, the above-described second program verification operation S640 is performed.

7) Comparison of the Number of Pass Bits and the Number of Second Pass Allowed Bits (S680)

If the number of pass bits counted by the pass bit counter unit 140 is greater than the first pass permission bit number NPV1, the number of pass bits counted by the pass bit counter unit 140 is the second pass permission bit number MPV1. Determine if greater than or less than or equal The second pass permission bit number MPV1 is preferably greater than 80% of the total number of bits of the selected page and smaller than the number of bits 10 bits smaller than the total number of bits of the selected page. When the number of pass bits is greater than the second pass allowed bits MPV1 as a result of the comparison between the number of pass bits and the second pass allowed bits, the above-described second program verification operation S640 is performed.

8) Bitline Voltage Reset (S690)

When the number of pass bits is less than or equal to the second pass allowed bit number M, as a result of comparing the number of pass bits with the second pass allowed bit (S680), the bit line voltage connected to the failed memory cell is higher than the ground voltage. Reset to one bit line voltage VBL1. The first bit line voltage VBL1 is preferably set to a voltage higher by a × step voltage Vstep than the existing first bit line voltage VBL1, and is set to a level lower than a power supply voltage applied for program prohibition. It is preferable. Where a has a value between 0 and 1. The step voltage Vstep uses a step voltage for raising the program voltage in the ISPP method. Thereafter, the above-described second program verification operation S640 is performed.

9) Third Program Verification Operation (S700)

When it is determined that the result of the second program verifying operation S640 is a pass, the third program verifying operation is performed to check whether all memory cells of the selected page are programmed to the third target threshold voltage value PV3 or more. If all memory cells are programmed to be greater than or equal to the third target threshold voltage value PV2 as a result of the third program verify operation, the program operation is determined to be passed and the program operation is terminated, and one or more memory cells are smaller than the third target threshold voltage value. If it has a low threshold voltage value, it is determined that the program operation is failed.

10) Pass Bit Count (S710)

When it is determined that the program operation is failed as a result of the above-described second program verifying operation S640, the pass bit counter 140 may increase the threshold voltage value of the selected page beyond the second target threshold voltage value, that is, the program may be executed. Count the number of memory cells passed (pass bit).

11) Comparison of the Number of Pass Bits and the Number of First Pass Allowed Bits (S720)

It is determined whether the number of pass bits counted by the pass bit counter unit 140 is greater than or less than or equal to the first pass permission bit number NPV2. The first pass permission bit number NPV2 is preferably greater than 10 bits and less than 20% of the total number of bits of the selected page. When the number of pass bits is equal to or smaller than the first pass allowed bits NPV2 as a result of the comparison between the number of pass bits and the first pass allowed bits, the above-described third program verification operation is performed.

12) Comparison of the number of pass bits and the number of second pass allowable bits (S730)

If the number of pass bits counted by the pass bit counter 140 is greater than the number of first pass allowed bits NPV2, the number of pass bits counted by the pass bit counter 140 is the second pass allowed bits MPV2. Determine if greater than or less than or equal The second pass permission bit number MPV2 is preferably larger than 80% of the total number of bits of the selected page and smaller than the number of bits 10 bits smaller than the total number of bits of the selected page. When the number of pass bits is greater than the second pass allowed bits MPV2 as a result of the comparison between the number of pass bits and the second pass allowed bits, the above-described third program verification operation is performed.

13) Bitline Voltage Reset (S740)

When the number of pass bits is less than or equal to the second pass allowed bit number MPV2 as a result of the comparison between the number of pass bits and the second pass allowed bit (S730), the potential of the bit line connected to the failed memory cell is higher than the ground voltage. Reset to the second bit line voltage VBL2 having. The second bit line voltage VBL2 is preferably set to a voltage higher by a × step voltage Vstep than the initial second bit line voltage VBL2, and is set to a level lower than the power supply voltage applied for prohibiting the program. It is preferable. Where a has a value between 0 and 1. The step voltage Vstep uses a step voltage for raising the program voltage in the ISPP method. Thereafter, the above-described third program verifying operation is performed.

14) Pass Bit Count (S750)

When it is determined that the program operation is failed as a result of the third program verifying operation S700 described above, the pass bit counter 140 may increase the threshold voltage value of the selected page above the third target threshold voltage value. Count the number of memory cells passed (pass bit).

15) Comparison of the Number of Pass Bits and the Number of First Pass Allowed Bits (S760)

It is determined whether the number of pass bits counted by the pass bit counter 140 is greater than or less than or equal to the first pass permission bit number NPV3. The first pass permission bit number NPV3 is preferably greater than 10 bits and less than 20% of the total number of bits of the selected page. When the number of pass bits is equal to or smaller than the first pass allowed bit number NPV3 as a result of the comparison between the number of pass bits and the first pass allowed bit, the process is performed again at step S670 in which the program voltage is increased.

16) Increase the program voltage to program (S670).

As a result of comparing the number of pass bits with the number of first pass allowed bits, if the number of pass bits is less than or equal to the number of first pass allow bits NPV3, the program voltage is increased. In this case, it is preferable to set the new program voltage by increasing the step voltage Vstep from the previously used program voltage. Subsequently, the first program verification step S630 is repeated using the new program voltage.

17) Comparison of the Number of Pass Bits and the Number of Second Pass Allowed Bits (S770)

If the number of pass bits counted by the pass bit counter 140 is greater than the number of first pass permission bits NPV3, the number of pass bits counted by the pass bit counter 140 is the second number of pass permission MPV3. Determine if greater than or less than or equal The first pass permission bit number NPV3 is preferably greater than 80% of the total number of bits of the selected page and smaller than the number of bits that is 10 bits smaller than the total number of bits of the selected page. When the number of pass bits is greater than the number of second pass allow bits MPV3 as a result of the comparison between the number of pass bits and the number of second pass allow bits, the program voltage is raised and programmed again (S670).

18) Bitline Voltage Reset (S780)

When the number of pass bits is less than or equal to the second pass allowed bit number MPV3 as a result of the comparison between the number of pass bits and the second pass allowed bit (S730), the voltage of the bit line connected to the failed memory cell is higher than the ground voltage. The third bit line voltage VBL3 having the potential is reset. It is preferable to set the third bit line voltage VBL3 to a voltage higher by a × step voltage Vstep than the previous third bit line voltage VBL2, and set to a level lower than a power supply voltage applied for program prohibition. It is preferable. Where a has a value between 0 and 1. The step voltage Vstep uses a step voltage for raising the program voltage in the ISPP method. Thereafter, the program voltage is raised and reprogrammed from the step S670.

According to the third embodiment of the present invention, when it is determined as a fail during the program verify operation, the pass bits are counted so that the number of pass bits is a bit between the number of first pass allowable bits N and the number of second pass allowable bits. After the bit line voltage is raised above the previous bit line voltage, the threshold voltage value rising per program pulse is reduced by using the ISPP method of programming, thereby reducing the threshold voltage distribution width. This can achieve the same effect as reducing the step voltage value by reducing the step voltage value in the ISPP method, and at the same time, does not increase the program time.

8 is a flowchart illustrating a program method of a nonvolatile memory device according to a fourth embodiment of the present invention.

A program method of a nonvolatile memory device according to a fourth embodiment of the present invention will be described with reference to FIGS. 3 and 8 as follows.

1) Bit line voltage setting (S810)

The bit line potential of the memory cell block 110 is set using the page buffer unit 120 to program a selected page of the memory cell block 110. In this case, when the corresponding memory cell is a program cell, the bit line voltage is set to the ground voltage level, which is a program allowable voltage, and when the corresponding memory cell is an erase cell, the bit line voltage is set to a power source voltage VCC, which is a program inhibit voltage, for program prohibition. Set it.

2) Program operation (S820)

The voltage generator 160 generates a program voltage Vpgm, and the generated program voltage Vpgm is applied to a word line connected to the selected page of the memory cell block 110 through the X decoder 170. At this time, the program voltage Vpgm is a start program voltage of the ISPP method. As a result, the memory cells of the selected page are programmed with a higher threshold voltage.

3) Program Verification (S830)

The program verify operation is performed to check whether all the memory cells of the selected page are programmed to the target threshold voltage value or more. When all memory cells are programmed to the target threshold voltage value or more as a result of the program verifying operation, the program operation is determined to be passed and the program operation is terminated. When one or more memory cells have a threshold voltage value lower than the target threshold voltage value, the program operation is performed. It is determined that this has failed.

4) Comparison of Program Voltage and First Program Set Voltage (S840)

The program voltage Vpgm used in the above-described program voltage application S820 is compared with the first program set voltage VpgmX. The first program setting voltage VpgmX is preferably a voltage larger than the start program voltage of the ISPP method. For example, the first program setting voltage VpgmX may be set to 16V.

5) Program by raising the program voltage (S850)

When the program voltage is less than or equal to the first program setting voltage as a result of comparing the program voltage with the first program setting voltage (S840), the program voltage is increased to perform the program operation. In this case, it is preferable to set the new program voltage by increasing the step voltage Vstep from the previously used program voltage. After that, the program is rerun from the program verification (S830).

 6) Comparison of Program Voltage and Second Program Set Voltage (S860)

When the program voltage is greater than the first program setting voltage as a result of comparing the program voltage with the first program setting voltage S840, the program voltage Vpgm and the second program setting voltage VpgmY are compared. The second program setting voltage VpgmY is preferably a voltage smaller than the last program voltage of the ISPP method. The second program set voltage VpgmY may be set to 17.5V. When the program voltage is greater than the second program setting voltage as a result of the comparison between the program voltage and the second program setting voltage, the program voltage is raised and programmed again (S850).

7) Bitline Voltage Reset (S870)

When the program voltage is greater than or equal to the second program setting voltage as a result of comparing the program voltage with the second program setting voltage (S860), the bit line voltage connected to the failed memory cell is reset to a new voltage higher than the ground voltage level. In this case, the new bit line voltage is preferably set to a voltage higher by an ax step voltage (Vstep) than the existing bit line voltage, and preferably set to a level lower than the power supply voltage applied for program prohibition. Where a has a value between 0 and 1. The step voltage Vstep uses a step voltage for raising the program voltage in the ISPP method. Thereafter, the program voltage is raised and re-executed from the step S850 of programming.

According to the fourth embodiment of the present disclosure, when the program voltage is determined to be a failure during the program verifying operation, when the program voltage is between the first program setting voltage and the second program setting voltage, the bit line voltage is increased after the previous bit line voltage. By using the ISPP type program method, the rising threshold voltage value per program pulse is reduced, and the threshold voltage distribution width is reduced. This can achieve the same effect as reducing the step voltage value by reducing the step voltage value in the ISPP method, and at the same time, does not increase the program time.

110: memory cell block 120: page buffer unit
130: pass / fail detector 140: pass bit counter
150: control unit 160: voltage generator
170: X decoder

Claims (28)

Setting a potential of a bit line connected to a memory cell block including a plurality of pages;
Performing a program operation by applying a program voltage to a word line of a selected page of the plurality of pages;
Performing a program verify operation by applying a program verify voltage to a word line of the selected page;
Determining that the number of pass bits is greater than the number of first pass allowable bits by counting the number of memory cells that have passed, as a result of the determination of the program verification operation; And
If the number of pass bits is greater than the number of first pass allow bits, increasing a potential of the bit line connected to the failed memory cell.
The method of claim 1,
The setting of the potential of the bit line may include setting a potential of a bit line to which a memory cell to be programmed among the bit lines is connected to a ground voltage level, and a potential of a bit line to which a non-programmed memory cell is connected to a power supply voltage level. Program method of a nonvolatile memory device.
The method of claim 1,
And setting the number of first pass permission bits to be less than or equal to 1% of the total number of bits of the selected page.
The method of claim 1,
The raising of the potential of the bit line connected to the failed memory cell may include increasing the set bit line potential by a program step voltage that is increased by a set constant multiple.
The method of claim 4, wherein
And said set constant is a value between 0 and 1.
The method of claim 1,
And if the number of pass bits is less than or equal to the number of first pass allowable bits, increasing the program voltage by a step voltage and performing the program operation again from the program operation.
The method of claim 1,
And after the raising of the bit line voltage, increasing the program voltage by a step voltage to re-execute the program operation from the program operation.
The method of claim 1,
And if it is determined that the program verification operation is a pass, the program operation is terminated.
The method of claim 1,
Prior to resetting the potential of the bit line connected to the failed memory cell,
Determining whether the number of pass bits is greater than a second number of pass permission bits; And
And raising the potential of the bit line connected to the failed memory cell when the number of pass bits is greater than the number of second pass allowable bits.
The method of claim 9,
If the number of pass bits is less than or equal to the number of the second pass allowable bits, increasing the program voltage by a step voltage and performing the program operation from the program operation.
The method of claim 9,
And setting the second pass permission bit to be greater than or equal to 99% of the total number of bits of the selected page.
Setting a potential of a bit line connected to a memory cell block including a plurality of pages;
Performing a program operation by applying a program voltage to a word line of a selected page of the plurality of pages;
Performing first to third program verify operations by sequentially applying first to third program verify voltages to a word line of the selected page;
If it is determined that the first program verify operation is a fail, determining whether the number of first pass bits counting the number of the passed memory cells is greater than the number of first pass allowable bits;
Determining whether the first pass bit number is greater than the second pass permission bit if the first pass bit number is greater than the first pass permission bit; And
If the number of the first pass bits is less than or equal to the number of the second pass allowable bits, raising a potential of the bit line connected to the failed memory cell to a first bit line potential. Way.
13. The method of claim 12,
The setting of the potential of the bit line may include setting a potential of a bit line to which a memory cell to be programmed among the bit lines is connected to a ground voltage level, and a potential of a bit line to which a non-programmed memory cell is connected to a power supply voltage level. Program method of a nonvolatile memory device.
The method of claim 12,
The performing of the first to third program verifying operations may include performing the second program verifying operation if it is determined that the first program verifying operation result is a pass, and if determining the second program verifying operation result pass, the third program. A program method for a nonvolatile memory device that performs a verify operation.
The method of claim 13,
When it is determined that the second program verify operation is a fail, the number of second pass bits counting the number of memory cells passed is greater than the number of the first pass allowable bits, and the number of the second pass bits is the second pass bit. And if less than or equal to a number, raises the potential of the bit line connected to the failed memory cell to a second bit line potential.
The method of claim 13,
When it is determined that the third program verify operation is a fail, the number of third pass bits counting the number of memory cells passed is greater than the number of first pass allowable bits, and the number of third pass bits is the second pass bit. And if less than or equal to a number, increases the potential of the bit line connected to the failed memory cell to a third bit line potential.
Following the claim 12,
The raising of the potential of the bit line connected to the failed memory cell may include increasing the set bit line potential by a program step voltage that is increased by a set constant multiple.
The method of claim 17,
And said set constant is a value between 0 and 1.
The method of claim 12,
And performing a next program verify operation when the first pass bit number is less than or equal to the first pass allowable bit number.
The method of claim 12,
And performing a next program verify operation when the first pass bit number is greater than the second pass allowable bit number.
The method of claim 12,
And after the raising of the bit line voltage, increasing the program voltage by the step voltage to re-execute the program operation from the program operation.
Setting a potential of a bit line connected to a memory cell block including a plurality of pages;
Performing a program operation by applying a program voltage to a word line of a selected page of the plurality of pages;
Performing a program verify operation by applying a program verify voltage to a word line of the selected page;
Determining whether the program voltage is a voltage value between a first program setting voltage and the second program setting voltage when it is determined that the program is verified as a fail; And
If the program voltage is a voltage value between the first program set voltage and the second program set voltage, increasing the potential of the bit line connected to the failed memory cell.
The method of claim 22,
And if the program voltage is less than the first program set voltage, increases the program voltage by a step voltage and restarts the program operation from the program operation.
The method of claim 22,
And if the program voltage is greater than the second program set voltage, increases the program voltage by a step voltage and restarts the program operation from the program operation.
The method of claim 22,
The raising of the potential of the bit line connected to the failed memory cell may include increasing the set bit line potential by a program step voltage that is increased by a set constant multiple.
The method of claim 25,
And said set constant is a value between 0 and 1.
The method of claim 22,
The first program setting voltage is a voltage larger than the start program voltage of the ISPP method, and the second program setting voltage is a voltage smaller than the last program voltage of the ISPP method.
The method of claim 22,
And after the raising of the bit line voltage, increasing the program voltage by the step voltage to re-execute the program operation from the program operation.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20140028714A (en) * 2012-08-30 2014-03-10 에스케이하이닉스 주식회사 Semiconductor memory device and method of operating the same
KR20140074552A (en) * 2012-12-10 2014-06-18 에스케이하이닉스 주식회사 Semiconductor device and operating method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20140028714A (en) * 2012-08-30 2014-03-10 에스케이하이닉스 주식회사 Semiconductor memory device and method of operating the same
KR20140074552A (en) * 2012-12-10 2014-06-18 에스케이하이닉스 주식회사 Semiconductor device and operating method thereof

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