KR20120037708A - Light emitting device - Google Patents

Abstract

PURPOSE: A light emitting device is provided to uniformly emit light guided by a light guide plate in a liquid crystal display panel direction by including an optical member on the upper side of the light guide plate. CONSTITUTION: A light emitting structure(120) includes a first conductive semiconductor layer(122), an active layer(124), and a second conductive semiconductor layer(126). A second electrode is formed on a first region of the second conductive semiconductor layer. A conductive oxide layer(150) is formed on the second electrode and a second region of the second conductive semiconductor layer. A diffusion preventing layer(160) is formed on the conductive oxide layer. A combination layer(170) and a conductive support substrate(180) are formed on the diffusion preventing layer.

Description

Light emitting device

The embodiment relates to a light emitting device and a method of manufacturing the same.

A light emitting device such as a light emitting diode or a laser diode using a group 3-5 or 2-6 compound semiconductor material of a semiconductor can realize various colors such as red, green, blue, and ultraviolet rays by developing thin film growth technology and device materials. Efficient white light can be realized by using fluorescent materials or combining colors.

With the development of these technologies, LED backlights, fluorescent lamps or incandescent bulbs, which replace not only display elements but also cold cathode fluorescent lamps (CCFLs), which form the backlight of optical communication means, transmission modules, and liquid crystal display (LCD) displays. Applications are expanding to white light emitting diode lighting devices, automotive headlights and traffic lights that can be substituted for them.

Here, in the structure of the LED, since the P electrode, the active layer, and the N electrode are sequentially stacked on the substrate, and the substrate and the N electrode are wire bonded, currents may be energized with each other.

At this time, when a current is applied to the substrate, since current is supplied to the P electrode and the N electrode, holes (+) are emitted from the P electrode to the active layer, and electrons (-) are emitted from the N electrode to the active layer. Therefore, as the holes and electrons are combined in the active layer, the energy level is lowered, and the energy emitted at the same time as the energy level is lowered is emitted in the form of light.

The embodiment is intended to prevent the short of the side in the chip separation process of the light emitting device.

Embodiments include a light emitting structure including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer; A first electrode on the first conductive semiconductor layer; A second electrode on the first region of the second conductive semiconductor layer; A conductive oxide layer on the second region and the second electrode of the second conductive semiconductor layer; And a conductive support substrate on the conductive oxide layer.

Here, the second electrode may include an ohmic layer or a reflective layer.

The second region may include an outer periphery on the second conductivity type semiconductor layer.

The second region may further include a region corresponding to the first electrode.

The second region may be a current blocking region and may have a lower electrical conductivity than the first region.

The conductive oxide layer may have a thickness of about 1 nanometer to about 5 micrometers.

In addition, the conductive oxide layer may be any one of ITO, IZO, and AZO.

In the light emitting device according to the embodiment, since the diffusion preventing layer made of metal is not directly exposed in the channel region and the conductive oxide layer is exposed, the short side of the side can be prevented in the etching process when the device is separated into each chip. .

1A to 1I are views illustrating a light emitting device and a method of manufacturing the same according to an embodiment;
2 is a cross-sectional view of an embodiment of a light emitting device package,
3 is an exploded perspective view of an embodiment of a lighting device including a light emitting device package,
4A and 4B are diagrams illustrating a backlight including a light emitting device package.

Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.

In the description of the above embodiments, each layer (region), region, pattern or structures may be "on" or "under" the substrate, each layer (layer), region, pad or pattern. In the case of what is described as being formed, "on" and "under" include both being formed "directly" or "indirectly" through another layer. In addition, the criteria for the top or bottom of each layer will be described with reference to the drawings.

In the drawings, the thickness or size of each layer is exaggerated, omitted, or schematically illustrated for convenience and clarity of description. In addition, the size of each component does not necessarily reflect the actual size.

1A to 1I are views illustrating a light emitting device and a method of manufacturing the same according to the embodiment. Hereinafter, a light emitting device and a method of manufacturing the same according to an embodiment will be described with reference to FIGS. 1A to 1I.

First, the substrate 100 is prepared as shown in FIG. 1A. The substrate 100 may include a conductive substrate or an insulating substrate, for example, at least one of sapphire (Al ₂ O ₃ ), SiC, Si, GaAs, GaN, ZnO, Si, GaP, InP, Ge, and Ga ₂ 0 ₃ . Can be used. An uneven structure may be formed on the substrate 100, but is not limited thereto. Impurities on the surface may be removed by wet cleaning the substrate 100.

In addition, the light emitting structure 120 including the first conductive semiconductor layer 122, the active layer 124, and the second conductive semiconductor layer 126 may be formed on the substrate 100.

In this case, a buffer layer (not shown) may be grown between the light emitting structure 110 and the substrate 100 to mitigate the difference in lattice mismatch and thermal expansion coefficient of the material. The material of the buffer layer may be formed of at least one of Group III-V compound semiconductors such as GaN, InN, AlN, InGaN, AlGaN, InAlGaN, and AlInN. An undoped semiconductor layer may be formed on the buffer layer, but is not limited thereto.

In addition, the light emitting structure 110 may be grown by vapor deposition such as metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), and hydraulic vapor phase epitaxy (HVPE).

The first conductive semiconductor layer 122 may be implemented as a group III-V compound semiconductor doped with a first conductive dopant, and the first conductive semiconductor layer 112 is an N-type semiconductor layer. The first conductive dopant may be an N-type dopant and may include Si, Ge, Sn, Se, or Te, but is not limited thereto.

The first conductive semiconductor layer 122 may be formed of a semiconductor material having a composition formula of Al _x In _y Ga _(1-xy) N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1). It may include. The first conductive semiconductor layer 112 may be formed of any one or more of GaN, InN, AlN, InGaN, AlGaN, InAlGaN, AlInN, AlGaAs, InGaAs, AlInGaAs, GaP, AlGaP, InGaP, AlInGaP, InP. have.

The first conductivity type semiconductor layer 122 may form an N-type GaN layer using a chemical vapor deposition method (CVD), molecular beam epitaxy (MBE), sputtering, or hydroxide vapor phase epitaxy (HVPE). . In addition, the first conductivity type semiconductor layer 122 includes a silane containing n-type impurities such as trimethyl gallium gas (TMGa), ammonia gas (NH ₃ ), nitrogen gas (N ₂ ), and silicon (Si) in the chamber. The gas SiH ₄ may be injected and formed.

The active layer 124 has an energy band inherent in the active layer (light emitting layer) material because electrons injected through the first conductive semiconductor layer 122 and holes injected through the second conductive semiconductor layer 126 formed thereafter meet each other. It is a layer that emits light with energy determined by.

The active layer 124 may be formed of at least one of a single quantum well structure, a multi quantum well structure (MQW), a quantum-wire structure, or a quantum dot structure. For example, the active layer 114 may be formed by injecting trimethyl gallium gas (TMGa), ammonia gas (NH ₃ ), nitrogen gas (N ₂ ), and trimethyl indium gas (TMIn) to form a multi-quantum well structure. It is not limited to this.

The well layer / barrier layer of the active layer 124 is formed of one or more pair structures of InGaN / GaN, InGaN / InGaN, GaN / AlGaN, InAlGaN / GaN, GaAs (InGaAs) / AlGaAs, GaP (InGaP) / AlGaP. But it is not limited thereto. The well layer may be formed of a material having a lower band gap than the band gap of the barrier layer.

A conductive cladding layer (not shown) may be formed on or under the active layer 124. The conductive clad layer may be formed of an AlGaN-based semiconductor, and may have a higher band gap than the band gap of the active layer 124.

The second conductive type semiconductor layer 126 is a second conductive type dopant is doped III-V compound semiconductor, for example _{-5, In x Al y Ga 1 -x-} y N (0≤x≤1, 0≤y≤ And 1, 0 ≦ x + y ≦ 1). When the second conductive semiconductor layer 116 is a P-type semiconductor layer, the second conductive dopant may include Mg, Zn, Ca, Sr, Ba, or the like as a P-type dopant.

The second conductivity type semiconductor layer 126 is a bicetyl cyclone containing p-type impurities such as trimethyl gallium gas (TMGa), ammonia gas (NH ₃ ), nitrogen gas (N ₂ ), and magnesium (Mg) in the chamber. Pentadienyl magnesium (EtCp ₂ Mg) {Mg (C ₂ H ₅ C ₅ H ₄ ) ₂ } may be injected to form a p-type GaN layer, but is not limited thereto.

In an embodiment, the first conductive semiconductor layer 122 may be a P-type semiconductor layer, and the second conductive semiconductor layer 126 may be an N-type semiconductor layer. In addition, an N-type semiconductor layer (not shown) may be formed on the second conductive semiconductor layer 126 when the semiconductor having a polarity opposite to that of the second conductive type, for example, the second conductive semiconductor layer is a P-type semiconductor layer. have. Accordingly, the light emitting structure 110 may be implemented as any one of an N-P junction structure, a P-N junction structure, an N-P-N junction structure, and a P-N-P junction structure.

As shown in FIG. 1B, the ohmic layer 130 and the reflective layer 140 are patterned on the second conductive semiconductor layer 126. In this case, a mask 200 may be provided on the second conductive semiconductor layer 126 to facilitate patterning of the ohmic layer 130 and the reflective layer 140. In addition to the present process, a mask may be used at the time of separating an element and forming a first electrode, which will be described later. The ohmic layer 130 and the reflective layer 140 may function as a second electrode.

The ohmic layer 130 may be formed of indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IAZO), indium gallium zinc oxide (IGZO), and indium gallium tin (IGTO). oxide), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO), IZO (IZO Nitride), AGZO (Al-Ga ZnO), IGZO (In-Ga ZnO), ZnO, IrOx, RuOx, NiO, RuOx / ITO, Ni / IrOx / Au, and Ni / IrOx / Au / ITO, Ag, Ni, Cr, Ti, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, Hf It may be formed to include at least one of, and is not limited to these materials. The ohmic layer 130 may be formed by sputtering or electron beam deposition.

The reflective layer 140 may be formed of a metal layer including aluminum (Al), silver (Ag), platinum (Pt), rhodium (Rh), or an alloy containing Al, Ag, Pt, or Rh. Aluminum or silver may effectively reflect light generated from the active layer 154 to greatly improve light extraction efficiency of the light emitting device.

As illustrated, the ohmic layer 130 and the reflective layer 140 are patterned to expose the second conductive semiconductor layer 126 near the center and the edge portion thereof. Hereinafter, the exposed portion near the center is called a first opening 127a and the exposed portion near the edge is called a second opening 127b. The first opening 127a may be formed at a position corresponding to the first electrode 128 to be described later.

As illustrated in FIG. 1C, the conductive oxide layer 150 is formed on the reflective layer 140 by sputtering or the like. The conductive oxide layer 150 may be made of conductive oxide such as ITO, AZO, or IZO. Here, ITO should be used to prevent the plasma damage (damp) during the process should use a low temperature ITO deposited at 400 ~ 500 ℃, the ITO used for the ohmic layer 130 is a high temperature ITO deposited in about 640 ℃ It differs in that point.

The conductive oxide layer 150 is provided on the reflective layer 140, but is provided on the second conductive semiconductor layer 126 in the first opening 127a and the second opening 127b described above. The ohmic layer 130 and the reflective layer 140 may be surrounded and provided. In addition, as described below, the conductive oxide layer 150 may serve as an etching stop layer when the current blocking layer and the device are separated.

As shown in FIG. 1D, a diffusion barrier layer 160 may be formed on the conductive oxide layer 150. The diffusion barrier layer 160 may be made of a material selected from the group consisting of Ti, Ni, Pt, Pd, Rh, Ir, and W. In particular, an alloy of titanium and nickel or an alloy of titanium and platinum may be used as the alloy. have.

In particular, the diffusion barrier layer 160 is formed to cover a portion of the nitride semiconductor, and the above-described material may be deposited by sputtering or electron beam deposition.

In addition, as illustrated in FIG. 1E, the bonding layer 170 and the conductive support substrate 180 may be formed on the diffusion barrier layer 160. The conductive support substrate 180 may be made of a material selected from the group consisting of molybdenum (Mo), silicon (Si), tungsten (W), copper (Cu), and aluminum (Al) or alloys thereof. , Gold (Au), copper alloy (Cu Alloy), nickel (Ni-nickel), copper-tungsten (Cu-W), carrier wafers (e.g. GaN, Si, Ge, GaAs, ZnO, SiGe, SiC, SiGe, Ga ₂ O _3, etc.) may be optionally included. The conductive support substrate 168 may be formed using an electrochemical metal deposition method or a bonding method using a eutectic metal.

Here, in order to bond the reflective layer 140 and the conductive support substrate 168, the reflective layer 140 functions as a bonding layer, or composed of Sn, Ag, Nb, Ni, Au, and Cu. The bonding layer 170 may be formed of a material selected from the group consisting of or alloys thereof.

Then, the substrate 100 is removed as shown in FIG. 1F. Here, the substrate 100 may be removed by a laser lift off (LLO) method using an excimer laser or the like, or may be a dry or wet etching method.

For example, when the laser lift-off method focuses and irradiates excimer laser light having a predetermined wavelength toward the substrate 100, thermal energy is applied to the interface between the substrate 100 and the light emitting structure 120. As the interface is concentrated and separated into gallium and nitrogen molecules, separation of the substrate 100 occurs at a portion where the laser light passes.

As shown in FIG. 1G, irregularities are formed on the surface of the first conductivity-type semiconductor layer 122. The uneven shape of the surface of the first conductivity type semiconductor layer 122 may be formed by etching after forming a PEC method or a mask. Here, by adjusting the amount of the etchant (eg, KOH), the intensity and exposure time of UV (ultraviolet), the difference in etching rates of Gallium-polar, Nitrogen-polar, and the difference in etching rates due to GaN crystallinity, The shape can be adjusted.

In the etching process using a mask, a photoresist is coated on the first conductive semiconductor layer 122, and then an exposure process is performed using a mask. When the exposure process is performed, the pattern is developed to form an etching pattern. According to the above-described process, an etching pattern is formed on the first conductivity-type semiconductor layer 122, and an etching process is performed to form an uneven structure on the first conductivity-type semiconductor layer 122. Since the uneven structure is to increase the surface area of the first conductivity type semiconductor layer 122, the number of floors and valleys is generally better.

Then, a passivation layer 190 is deposited as shown in FIG. 1H. Here, the passivation layer 190 may be formed on the side of the light emitting structure 120 as shown.

The passivation layer 190 may be made of an insulating material, and the insulating material may be made of an oxide or nitride that is non-conductive. As an example, the passivation layer 190 may be formed of a silicon oxide (SiO ₂ ) layer, an oxynitride layer, and an aluminum oxide layer.

In addition, as shown in FIG. 1I, a first electrode 128 is formed on the first conductivity-type semiconductor layer 122, and the first electrode 220 is formed of chromium (Cr), nickel (Ni), and gold. (Au), aluminum (Al), titanium (Ti), platinum (Pt) of any one selected from metals or alloys of the metals.

In the light emitting device according to the exemplary embodiment illustrated in FIG. 1I, the ohmic layer 130 and the reflective layer 140 are not provided on the entire surface of the second conductivity-type semiconductor layer 126, and may correspond to the first electrode 128. The ohmic layer 130 and the reflective layer 140 are not formed in the opening 127a and the second opening 127b of the channel region of the edge. The first opening 127a may serve as a current blocking layer, and the second opening 127b may act as a barrier to prevent current leakage.

That is, the ohmic layer 130 and the reflective layer 140 may be provided to correspond to the first region (first opening) of the light emitting structure, and the conductive oxide layer 150 may correspond to the second region (the second opening). Is formed. Here, the second region may include an outer periphery of the second conductivity type semiconductor layer 126 and may further include a region corresponding to the first electrode 128. The second region may serve as a current blocking region, and may have a lower electrical conductivity than the first region.

The conductive oxide layer 150 on the first opening 127a may be formed to have a thickness of at least 1 nanometer or more in order to act as a current blocking layer. Can be.

In addition, since the diffusion preventing layer 160 made of a metal is not directly exposed in the channel region and the conductive oxide layer 150 is exposed, the short side of the side may be prevented in the etching process when the device is separated into each chip. .

2 is a cross-sectional view of an embodiment of a light emitting device package. Hereinafter, an embodiment of a light emitting device package will be described with reference to FIG. 2.

As shown, the light emitting device package according to the embodiment has a package body 320, the first electrode layer 311 and the second electrode layer 312 provided on the package body 320, and the package body 320 The light emitting device 300 includes a light emitting device 300 according to an embodiment, and is electrically connected to the first electrode layer 311 and the second electrode layer 312, and a filler 340 surrounding the light emitting device 300.

The package body 320 may include a silicon material, a synthetic resin material, or a metal material. An inclined surface may be formed around the light emitting device 300 to increase light extraction efficiency.

The first electrode layer 311 and the second electrode layer 312 are electrically separated from each other, and provide power to the light emitting device 300. In addition, the first electrode layer 311 and the second electrode layer 312 can increase the light efficiency by reflecting the light generated from the light emitting device 300, the outside of the heat generated from the light emitting device 300 May also act as a drain.

The light emitting device 300 may be installed on the package body 320 or on the first electrode layer 311 or the second electrode layer 312.

The light emitting device 300 may be electrically connected to the first electrode layer 311 and the second electrode layer 312 by any one of a wire method, a flip chip method, or a die bonding method.

The filler 340 may surround and protect the light emitting device 300. In addition, the filler 340 may include a phosphor to change the wavelength of light emitted from the light emitting device 300.

The light emitting device package may mount at least one of the light emitting devices of the above-described embodiments as one or more, but is not limited thereto.

A plurality of light emitting device packages may be arranged on a substrate, and a light guide plate, a prism sheet, a diffusion sheet, or the like, which is an optical member, may be disposed on an optical path of the light emitting device package. The light emitting device package, the substrate, and the optical member may function as a light unit. Another embodiment may be implemented as a display device, an indicator device, or a lighting system including the semiconductor light emitting device or the light emitting device package described in the above embodiments, and for example, the lighting system may include a lamp or a street lamp. .

3 is an exploded perspective view of an embodiment of a lighting apparatus including a light emitting device package.

The lighting apparatus according to the embodiment includes a light source 600 for projecting light, a housing 400 in which the light source 600 is embedded, a heat dissipation part 500 for dissipating heat from the light source 600, and the light source 600. And a holder 700 for coupling the heat dissipation part 500 to the housing 400.

The housing 400 includes a socket coupling portion 410 coupled to an electrical socket (not shown), and a body portion 420 connected to the socket coupling portion 410 and having a light source 600 built therein. One air flow port 430 may be formed in the body portion 420.

A plurality of air flow port 430 is provided on the body portion 420 of the housing 400, wherein the air flow port 430 is composed of one air flow port, or a plurality of flow ports as shown in the radial arrangement Various other arrangements are also possible.

In addition, the light source 600 includes a plurality of light emitting device packages 650 on the substrate 610. Here, the substrate 610 may be a shape that can be inserted into the opening of the housing 400, it may be made of a material having a high thermal conductivity in order to transfer heat to the heat dissipation unit 500, as will be described later.

In addition, a holder 700 is provided below the light source, and the holder 700 may include a frame and another air flow port. In addition, although not shown, an optical member may be provided under the light source 100 to diffuse, scatter, or converge light projected from the light emitting device package 150 of the light source 100.

4A and 4B are diagrams illustrating a backlight including a light emitting device package.

As illustrated, the backlight includes a bottom cover 810, a light emitting device package module (not shown) provided at one side of the bottom cover, and a reflector disposed on the front of the bottom cover 810. 820, a light guide plate 830 disposed in front of the reflective plate 820, and guiding light emitted from the light emitting module to the front of the display device, and an optical member 840 disposed in front of the light guide plate 30. Include. In addition to the above-described configuration, the display device including the backlight may include a liquid crystal display panel 860 disposed in front of the optical member 840 and a top cover provided in front of the liquid crystal display panel 860. 870 and a fixing member 850 disposed between the bottom cover 810 and the top cover 870 to fix the bottom cover 810 and the top cover 870 together.

The light guide plate 830 serves to guide the light emitted from the light emitting module (not shown) to be emitted in the form of a surface light source, and the reflective plate 820 disposed behind the light guide plate 30 is the light emitting device package module. The light emitted from (not shown) is reflected in the light guide plate 830 to improve light efficiency.

However, the reflecting plate 820 may be provided as a separate component as shown in the figure, is provided in the form of a high reflectivity coating on the back of the light guide plate 830, or the front of the bottom cover 810. It is also possible.

Here, the reflection plate 820 can be made of a material having a high reflectance and can be used in an ultra-thin shape, and polyethylene terephthalate (PET) can be used.

The light guide plate 830 scatters the light emitted from the light emitting device package module so that the light is uniformly distributed over the entire screen of the liquid crystal display. Accordingly, the light guide plate 830 is made of a material having good refractive index and high transmittance, and may be formed of polymethyl methacrylate (PMMA), polycarbonate (PC), polyethylene (PE), or the like.

An optical member 840 is provided on the light guide plate 830 to diffuse light emitted from the light guide plate 830 at a predetermined angle. The optical member 840 uniformly irradiates the light guided by the light guide plate 830 toward the liquid crystal display panel 860.

As the optical member 840, an optical sheet such as a diffusion sheet, a prism sheet, or a protective sheet may be selectively laminated, or a micro lens array may be used. In this case, a plurality of optical sheets may be used, and the optical sheets may be made of a transparent resin such as acrylic resin, polyurethane resin, or silicone resin. The fluorescent sheet may be included in the above-described prism sheet as described above.

A liquid crystal display panel 860 may be provided on the front surface of the optical member 840. Here, it is obvious that other types of display devices requiring a light source besides the liquid crystal display panel 860 may be provided.

4B is a cross-sectional view of the light source portion of the backlight.

As shown, the reflective plate 820 is placed on the bottom cover 810, and the light guide plate 830 is placed on the reflective plate 820. Thus, the reflective plate 820 may be in direct contact with the heat radiating member (not shown).

The printed circuit board 881 to which each light emitting device package 882 is fixed may be bonded to the bracket 812. Here, the bracket 812 is made of a material having high thermal conductivity for heat dissipation in addition to the fixing of the light emitting device package 882, and although not shown, a thermal pad is disposed between the bracket 812 and the light emitting device package 882. It can be provided to facilitate heat transfer.

In addition, the bracket 812 is provided as a 'b' type as shown, the horizontal portion 812a is supported by the bottom cover 810, the vertical portion 812b to the printed circuit board 881 Can be fixed

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, It will be understood that various modifications and applications are possible. For example, each component specifically shown in the embodiment can be modified. And differences relating to such modifications and applications will have to be construed as being included in the scope of the invention defined in the appended claims.

100 substrate 120 light emitting structure
122: first conductive semiconductor layer 124: active layer
126: second conductive semiconductor layer 130: ohmic layer
140: reflective layer 150: conductive oxide layer
160: diffusion barrier layer 170: bonding layer
180: conductive support substrate 190: passivation layer
200: mask 300: light emitting element
311: first electrode 312: second electrode
320: body 340: filler
400 housing 500 heat dissipation unit
600: light source 700: holder

Claims (7)

A light emitting structure including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer;
A first electrode on the first conductive semiconductor layer;
A second electrode on the first region of the second conductive semiconductor layer;
A conductive oxide layer on the second region and the second electrode of the second conductive semiconductor layer; And
A light emitting device comprising a conductive support substrate on the conductive oxide layer. The method of claim 1,
The second electrode includes a ohmic layer or a reflective layer. The method of claim 1,
And the second region includes an outer periphery on the second conductivity type semiconductor layer. The method of claim 3, wherein
The second region further includes a region corresponding to the first electrode. The method of claim 1,
The second region is a current blocking region, the light emitting device having a lower electrical conductivity than the first region. The method of claim 1,
The conductive oxide layer has a thickness of 1 nanometer to 5 micrometers. The method of claim 1,
The conductive oxide layer is any one of ITO, IZO, AZO light emitting device.

Images