KR20120019307A - Liquid crystal display device - Google Patents

Abstract

PURPOSE: A liquid crystal display device of a GIP mode is provided to reduce optical leakage current of a gate driver due to high brightness backlight. CONSTITUTION: An array panel is classified into a GIP(Gate In Panel) in which an active area and a gate driver is mounted. A color filter substrate is faced with the array substrate. A thin film transistor is formed in the array panel of an active area. The thin film transistor is formed in the array panel of the GIP. An optical blocking layer(127) is formed in the upper part of the thin film transistor. The optical blocking layer includes ITO(Indium Tin Oxide).

Description

[0001] LIQUID CRYSTAL DISPLAY DEVICE [0002]

The present invention relates to a liquid crystal display device, and more particularly, to a gate in panel (GIP) type liquid crystal display device in which a gate driver using an amorphous silicon thin film transistor is directly mounted on an array substrate.

In general, a liquid crystal display device is a display device that displays a desired image by separately supplying data signals according to image information to pixels arranged in a matrix form, and adjusting light transmittance of the pixels.

To this end, the liquid crystal display device includes a liquid crystal display panel in which pixels are arranged in a matrix and a driving circuit unit for driving the pixels.

The liquid crystal display panel is bonded to an array substrate on which a thin film transistor array is formed and a color filter substrate on which a color filter is formed to maintain a uniform cell gap, and the array substrate and the color filter. The liquid crystal layer is formed in the cell gap between the substrates.

In this case, an alignment layer is formed on the surface of the array substrate and the color filter substrate facing each other, and rubbing is performed to arrange the liquid crystals of the liquid crystal layer in a predetermined direction.

In addition, the array substrate and the color filter substrate are bonded by a seal pattern formed along the outer edge of the pixel portion, and the polarized plate and the phase difference plate are provided on the outer surfaces of the bonded array substrate and the color filter substrate. By selectively configuring the elements, a liquid crystal display panel having high luminance and contrast characteristics is formed by changing the traveling state of the light or changing the refractive index.

Hereinafter, the liquid crystal display device configured as described above will be described in detail with reference to the accompanying drawings.

1 is an exemplary view schematically showing a structure of a general liquid crystal display device.

As shown in the drawing, a general liquid crystal display device includes a liquid crystal display panel 10 and a driving circuit unit 30 for supplying various signals necessary for image realization of the liquid crystal display panel 10.

In this case, the liquid crystal display panel 10 includes a liquid crystal layer and a first substrate and a second substrate bonded side by side with the liquid crystal layer interposed therebetween, and an array element for driving a liquid crystal on an inner surface of the first substrate called an array substrate. Is provided. That is, a plurality of gate lines 16 and data lines 17 are arranged in the array substrate to define pixels having a matrix form, and thin film transistors are provided at each intersection thereof to form a pixel electrode formed at each pixel. One-to-one correspondence is connected.

In addition, the inner surface of the second substrate, called a color filter substrate, is provided with color filter elements such as a color filter for color realization, a common electrode facing the pixel electrode with a liquid crystal layer interposed therebetween, and as a result, a pixel including a liquid crystal layer. The electrode and the common electrode form a liquid crystal capacitor.

Next, the driving circuit unit 30 includes a timing controller 35, a gate driver 31, and a data driver 32, in addition to an interface and a reference voltage. A generation unit and a power supply voltage generation unit are provided.

In this case, the interface relays an external drive system such as a personal computer and the timing controller 35, and the timing controller 35 supplies a frame control signal supplied to the gate driver 31 using an image and a control signal transmitted from the interface. And image data and image control signals transmitted to the data driver 32, respectively.

The gate driver 31 and the data driver 32 are adjacent to each other of the liquid crystal display panel 10 through a tape carrier package (TCP) to connect the gate line 16 and the data line 17, respectively. Attached to two edges, the dual gate driver 31 generates a gate signal for sequentially enabling the gate line 16 for each frame in response to the frame control signal of the timing controller 35. By controlling the on / off of the thin film transistor for each gate line 16, the data driver 32 corresponds to the image data in response to the image data and the image control signal input from the timing controller 35. The reference voltages are selected and then supplied to the data line 17.

Accordingly, when the thin film transistor selected for each gate line 16 is turned on by the gate signal of the gate driver 31, the data signal of the data driver 32 is transferred to the pixel through the thin film transistor. The liquid crystal is driven by the electric field between the electrode and the common electrode. During this process, the reference voltage generation unit generates a digital to analog converter (DAC) reference voltage of the data driver 32, and the power supply voltage generation unit generates an operating power for each element of the driving circuit unit 35 and the liquid crystal display panel 10. Supply a common voltage delivered to the common electrode.

On the other hand, a thin film transistor for a general liquid crystal display device may be classified into an amorphous silicon thin film transistor and a polycrystalline silicon thin film transistor according to the material type of the semiconductor layer serving as a conductive channel. In the case of using double amorphous silicon, the gate driver 31 and the data driver 32 are manufactured separately from the liquid crystal display panel 10 as shown in the drawing, and the gate line 16 is formed through a tape automated bonding (TAB) method. It is common to connect to and data line 17, respectively.

As described above, in the liquid crystal display device having the amorphous silicon thin film transistor, a gate driver and a data driver must be separately manufactured and attached to the liquid crystal display panel through the TAB method, thereby increasing the cost and process.

Recently, as the demand for bezel reduction and cost reduction of high resolution models is increased, a gate in panel (GIP) type liquid crystal display device in which the gate driver is embedded in the liquid crystal display panel has been developed.

In this case, the thin film transistors included in the embedded gate driver occupy a huge area, unlike the thin film transistors included in the liquid crystal display panel, and the liquid crystal display device having the gate driver is configured by adding a plurality of thin film transistors to ensure reliability. In this structure, when a high brightness backlight is applied, a light leakage current is generated in the thin film transistor of the gate driver by the backlight light reflected by the black matrix formed on the upper color filter substrate.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object thereof is to provide a gate in panel (GIP) type liquid crystal display device in which a gate driver using an amorphous silicon thin film transistor is directly mounted in a thin film transistor array substrate. .

Another object of the present invention is to provide a liquid crystal display device in which a light leakage current is reduced in a gate driver by a backlight having high brightness in the GIP type liquid crystal display device.

Other objects and features of the present invention will be described in the configuration and claims of the invention described below.

In order to achieve the above object, the liquid crystal display device of the present invention comprises: an array substrate divided into an active region in which an image is displayed and a GIP circuit portion in which a gate driver is mounted; A color filter substrate bonded to the array substrate; A thin film transistor formed on the array substrate of the active region; A thin film transistor formed on the array substrate of the GIP circuit part; And a light blocking layer formed on the thin film transistor of the GIP circuit part and formed of indium tin oxide (ITO) that blocks light in a short wavelength region.

In this case, the thin film transistor of the GIP circuit part may include an active layer made of amorphous silicon.

The light blocking layer may block light in a short wavelength region relatively absorbed by an active layer made of amorphous silicon.

The light blocking layer is formed through a Vcom mask.

As described above, the liquid crystal display according to the present invention provides an effect of reducing the cost and the process by directly mounting the gate driver in the thin film transistor array substrate.

In the liquid crystal display according to the present invention, as the light blocking layer is formed on the amorphous silicon thin film transistor included in the embedded gate driver, the light leakage current in the gate driver due to the backlight having high brightness can be reduced, and in particular, the light blocking layer is formed. This eliminates the need for an additional mask process, resulting in cost savings.

1 is an exemplary view schematically showing a structure of a general liquid crystal display device.
2 is an exemplary view schematically illustrating a structure of a GIP type liquid crystal display device according to an exemplary embodiment of the present invention.
FIG. 3 is a view schematically showing a cutting plane along the line A-A 'in the GIP type liquid crystal display shown in FIG.
Fig. 4 is a cross-sectional view showing a thin film transistor structure of a gate driver in the GIP circuit section shown in Fig. 3, for example.
FIG. 5 is a graph showing the transmittance relationship for each wavelength band for amorphous silicon; FIG.
6 is a graph showing the transmittance relationship for each wavelength band for ITO.

Hereinafter, exemplary embodiments of a liquid crystal display according to the present invention will be described in detail with reference to the accompanying drawings.

FIG. 2 is an exemplary view schematically illustrating a structure of a liquid crystal display according to an exemplary embodiment of the present invention, and a gate in panel (GIP) type liquid crystal display device in which a gate driver using an amorphous silicon thin film transistor is directly mounted. Indicates.

As shown in the figure, the GIP type liquid crystal display device according to an embodiment of the present invention is composed of a liquid crystal display panel 100 and a driving circuit unit 130 for supplying various signals necessary for image implementation thereof.

In this case, the liquid crystal display panel 100 includes a liquid crystal layer and first and second substrates bonded side by side with each other, and an array element and a color filter element are provided on an inner surface of each substrate. On the inner surface of the first substrate, a horizontal gate line 116 and a vertical data line 117 intersect vertically and horizontally to define pixels in a matrix form, and the gate line 116 and the data line 117 are arranged as an array element. Thin film transistors are provided at the intersections of the transistors and correspond to the pixel electrodes formed in each pixel in one-to-one correspondence.

In addition, for example, red (R), green (G), and blue (B), which selectively transmit only light of a specific wavelength band, as a color filter element, are formed on an inner surface of the second substrate called a color filter substrate. A color filter element including a color filter composed of color sub-color filters and a common electrode facing the pixel electrode is disposed between the liquid crystal layer. As a result, the pixel electrode and the common electrode including the liquid crystal layer form a liquid crystal capacitor. do.

Next, the driving circuit unit 130 includes a timing controller 135, a gate driver 131, and a data driver 132. In addition, an interface for relaying an external driving system and the timing controller 135, the data driver 132. Reference voltage generation unit for generating a reference voltage used in the), operating voltage for each component of the driving circuit unit 130 and power supply voltage generation for supplying a common voltage delivered to the common electrode of the liquid crystal display panel 100 Is provided.

Accordingly, the image and control signals transmitted from the external driving system are relayed to the timing controller 135 by the interface, wherein the image signals contain luminance information of the image to be displayed through the pixels of the liquid crystal display panel 100. The control signal includes a vertical synchronous signal (Vsync) indicating the start or end of the frame screen, a horizontal synchronous signal (Hsync) indicating the start or end of the horizontal pixel column, and a valid signal in the horizontal pixel column. It includes a DE (Data Enable) indicating a data section and a Data Clock (DCLK) indicating a period of valid data.

These images and control signals are transformed into appropriate shapes by the timing controller 135 and supplied to the gate driver 131 and the data driver 132, whereby the gate driver 131 sequentially processes the horizontal pixels in each frame. By generating a gate signal to enable the scan to pass to the gate line 116, the data driver 132 generates a data signal to charge the pixel opened by the gate signal to pass to each data line 117.

Therefore, in the liquid crystal display according to the exemplary embodiment of the present invention, when a pixel selected for each gate line 116 is opened by the gate signal of the gate line 116, the data signal of the data line 117 is transferred to the pixel. As a result, the liquid crystal is driven by the electric field between the pixel electrode and the common electrode, thereby realizing the transmittance difference.

To this end, the timing controller 135 may include a gate shift clock (GSC) that specifies a time when the thin film transistor is turned on, a gate output enable (GOE) that controls the output of the gate driver 121, and a start line of the screen among one vertical signal. Generates a frame control signal including a gate start pulse (GSP) indicating the signal to the gate driver 131, arranges the data, and latches the data of each horizontal pixel column at the same time. The polarity of the data signal is determined as an SOE, which is a data latch signal that indicates the time of transmission of data latched by the SSC, an SSP (Source start pulse) that indicates the start point of data among one horizontal signal, and a polarity inversion signal synchronized by the SOE. An image control signal containing a POL or the like alternately indicating positive and negative polarity peaks is transmitted to the data driver 132.

Meanwhile, the liquid crystal display according to the exemplary embodiment of the present invention uses amorphous silicon as the semiconductor layer, which is a conductive channel of the thin film transistor, while a part or all of the gate driver 131 is the first substrate of the liquid crystal display panel 100. In this case, at least a shift resister of the gate driver 131 may be mounted in the first substrate to be completed together during the array element manufacturing process.

That is, the gate driver 131 may include a shift register part including a plurality of flip-flops for outputting a predetermined signal according to an optional input condition of set and reset, and an output signal level thereof. In the conventional GIP method, at least the shift register unit may be mounted on the first substrate. In this case, the shift register unit may be connected to the gate line 116 in a one-to-one correspondence. The form of the group of shift resist elements in which the shift resist unit elements are arranged in a row is shown.

As described above, part or all of the gate driver 131 mounted in the liquid crystal display panel 100 may be completed during the manufacturing process for the array element of the first substrate, thereby reducing the cost and the process. .

In addition, a GIP type liquid crystal display device according to an embodiment of the present invention is characterized by referring to the drawings in detail.

For reference, reference numeral 115 denotes an active region where an image is displayed, and is positioned at one edge of the active region 115 and may define a region in which the gate driver 131 is mounted as a GIP circuit unit.

FIG. 3 is a diagram schematically illustrating a cut plane along a line A-A 'in the GIP type liquid crystal display device shown in FIG. 2, and illustrates a starting point of a GIP circuit part and an active area positioned at a left side of a liquid crystal display panel. For example.

4 is a cross-sectional view illustrating a thin film transistor structure of a gate driver in the GIP circuit unit shown in FIG. 3.

As shown in the figure, the liquid crystal display panel according to the exemplary embodiment of the present invention may be divided into an active region in which an image is displayed and a GIP circuit unit in which a gate driver is mounted, located at one edge of the active region.

The liquid crystal display panel divided as described above includes a color filter substrate 105 and an array substrate 110 bonded together side by side with a liquid crystal layer dropped in the active region, and the color filter substrate 105 and the array substrate. An array element and a color filter element are respectively provided on the inner surface of the 110. Although not shown in detail, the inner surface of the array substrate 110 of the active region is an array element on the inner surface of the active region and a data line in a vertical direction and a gate line in a vertical direction. Pixels having a matrix form are intersected vertically and horizontally, and thin film transistors are provided at intersections of the gate lines and the data lines to correspond to the pixel electrodes 118 formed in each pixel in one-to-one correspondence.

In addition, a common electrode 108 and a pixel electrode 118 are formed on inner surfaces of the color filter substrate 105 and the array substrate 110, respectively, to apply an electric field to the liquid crystal layer. Polarizers 101 and 111 are formed on the outer surfaces of the 105 and the array substrate 110, respectively. In this case, the pixel electrode 118 is formed for each pixel on the array substrate 110, while the common electrode 108 is integrally formed on the entire surface of the color filter substrate 105. Therefore, by controlling the voltage applied to the pixel electrode 118 while the voltage is applied to the common electrode 108, it is possible to individually adjust the light transmittance of the pixels.

In the pixels in which the scan signal is supplied to the gate electrode 121 of the thin film transistor through the gate line, the data line is formed between the source electrode 122 and the drain electrode 123 of the thin film transistor. The data signal supplied to the source electrode 122 of the thin film transistor is supplied to the pixel electrode 118 via the drain electrode 123 of the thin film transistor. In this case, amorphous silicon may be applied to the active layer 124 in which the conductive channel of the thin film transistor is formed.

For reference, reference numerals 115a and 115b denote gate insulating films and protective films, respectively, and reference numerals 109 and 119 denote alignment films.

In addition, a thin film transistor of a gate driver is formed on an inner surface of the array substrate 110 of the GIP circuit part. The thin film transistor of the gate driver includes a GIP circuit part gate electrode 121p, a GIP circuit part source electrode 122p, and a GIP circuit part drain electrode ( 123p). The thin film transistor of the gate driver may include a GIP circuit active layer forming a conductive channel between the GIP circuit source electrode 122p and the GIP circuit drain electrode 123p by a gate voltage supplied to the GIP circuit gate electrode 121p. (124p).

In addition, the color filter substrate 105 includes a color filter 107 including a plurality of sub-color filters for selectively transmitting only light of a specific wavelength band, for example, red, green, and blue, as color filter elements. The black matrix 106 separates the sub-color filters and blocks light passing through the liquid crystal layer, and a transparent common electrode 108 applying a voltage to the liquid crystal layer.

At this time, although not shown in the drawing, a predetermined seal pattern 140 for bonding the color filter substrate 105 and the array substrate 110 to each other is positioned on the right side of the GIP circuit unit.

Meanwhile, the color filter substrate 105 and the array substrate 110 configured as described above form a predetermined column spacer 145 in the active region in order to maintain a cell gap therebetween, and additionally, touch unevenness or deterioration of touch. At least one pressing spacer (not shown) may be formed between the column spacers 145 to prevent the gap.

In the liquid crystal display according to the exemplary embodiment of the present invention configured as described above, indium tin oxide (ITO) is formed on the thin film transistor of the gate driver to reduce the light leakage current in the thin film transistor of the gate driver. Alternatively, as the light blocking layer 127 made of indium zinc oxide (IZO) is formed, light reflected by a high brightness backlight may be blocked.

At this time, for example, although the ITO is a transparent conductive film, the light leakage current can be effectively reduced by blocking light having a high energy (E ∝ 1 / λ) with a short wavelength of 80%, although the transmittance of the short wavelength is 80%.

In addition, the light blocking layer 127 may be formed by depositing ITO only in a minimum region considering process variation.

FIG. 5 is a graph showing the transmittance relationship for each wavelength band for amorphous silicon, and FIG. 6 is a graph showing the transmittance relationship for each wavelength band for ITO.

As described above, the active layer formed in the thin film transistor of the gate driver is composed of amorphous silicon. Referring to FIG. 5, it can be seen that the transmittance for each wavelength band of the amorphous silicon has a double pass and the transmittance increases toward the long wavelength region. have.

In this case, for example, the average transmittance in the entire wavelength range is low as 26.7%, and in particular, the average transmittance in the short wavelength region of 380nm to 480nm with relatively high energy is only about 0.8%. In other words, it can be seen that in the short wavelength region, the transmittance is low and almost no light is absorbed.

Meanwhile, the light of the short wavelength region having high energy in the amorphous silicon and absorbing most of the energy shows a transmittance of 80% or less in ITO, and in particular, the transmittance rapidly decreases toward the short wavelength region. Can be.

As such, ITO is deposited on top of the thin film transistor of the gate driver to form a light blocking film 127 by reducing ITO, which has a relatively low transmittance of high energy, to reduce the light leakage current in the gate driver due to the high brightness backlight. Since it can be applied through a change of the Vcom mask, an additional mask process is not required to form the light blocking layer 127, thereby providing a cost reduction effect.

The present invention can be used not only in liquid crystal display devices but also in other display devices manufactured using thin film transistors, for example, organic light emitting display devices in which organic light emitting diodes (OLEDs) are connected to driving transistors. .

Many details are set forth in the foregoing description but should be construed as illustrative of preferred embodiments rather than to limit the scope of the invention. Therefore, the invention should not be defined by the described embodiments, but should be defined by the claims and their equivalents.

105: color filter substrate 110: array substrate
118: pixel electrode 121,121p: gate electrode
122,122p: source electrode 123,123p: drain electrode
124,124p: active layer 127: light blocking film

Claims (4)

An array substrate divided into an active region in which an image is displayed and a gate in panel (GIP) circuit unit in which a gate driver is mounted;
A color filter substrate bonded to the array substrate;
A thin film transistor formed on the array substrate of the active region;
A thin film transistor formed on the array substrate of the GIP circuit part; And
And a light blocking layer formed on the thin film transistor of the GIP circuit part and formed of indium tin oxide (ITO) that blocks light in a short wavelength region. The liquid crystal display of claim 1, wherein the thin film transistor of the GIP circuit part comprises an active layer made of amorphous silicon. The liquid crystal display device of claim 2, wherein the light blocking layer blocks light in a short wavelength region that is relatively absorbed by an active layer made of amorphous silicon. The liquid crystal display of claim 1, wherein the light blocking layer is formed through a Vcom mask.

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