KR20110093621A - Method for manufacturing cof substrate - Google Patents

Abstract

PURPOSE: A method for manufacturing a COF(Chip On Film) substrate is provided to manufacture a fine and high density wiring pattern with low cost by simultaneously dissolving away a substrate metal layer with wiring pattern etching. CONSTITUTION: A metal stacked substrate(10), which forms a copper layer(13) in the surface of a substrate metal layer(12) is prepared. A copper layer is etched in half with the first etching liquid. The rest of the copper layer and a substrate metal layer are dissolved and eliminated with a second etching liquid. The second etching liquid does not contain copper ion and a compound which forms complex and contains a second copper chloride, hydrochloric acid, and hydrogen peroxide liquid.

Description

Method for manufacturing COP substrate {METHOD FOR MANUFACTURING COF SUBSTRATE}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a chip on film (COF) substrate which is a film-shaped substrate for chip mounting. More specifically, a base metal layer is formed on the surface of an insulating film, and a copper layer is formed on the surface of the base metal layer. The present invention relates to a method for producing a COF substrate in which a circuit pattern is formed on a COF substrate by etching the laminated metal layer of the formed metal laminated substrate.

Background Art Conventionally, COF substrates are widely used for applications in which a bare chip is mounted as a film-shaped circuit board to constitute a driver for a liquid crystal. As a COF substrate, a metal laminated substrate having a structure in which a metal layer is directly laminated without using an adhesive on the surface of an insulating film is used. The metal laminated substrate having such a structure is mainly manufactured by forming a base metal layer such as nickel-chromium alloy by dry plating such as sputtering or vapor deposition on the insulating film, and then forming a metal layer such as copper by wet plating. It is becoming. This metal laminated substrate is suitable for producing a COF substrate having a fine wiring pattern such that the pitch size of the wiring pattern of the COF substrate is 40 µm or less because the metal layer is as thin as 5 to 15 µm.

With the recent miniaturization and weight reduction of electronic devices, miniaturization of COF substrates used in electronic devices is progressing, and very fine wiring patterns are required such that the pitch size of the wiring patterns is less than 30 µm. In a fine pitch COF substrate with a pitch size of less than 30 μm, when a direct current voltage is applied between adjacent lead wires in an environment of high temperature and high humidity, there is a problem that discoloration occurs in the insulating film portion to which the lead wires are bonded, or electrical insulation is degraded. There is a case. In order to prevent such a problem, in a metal laminated substrate used for a fine pitch COF substrate, a base metal layer made of a nickel-chromium alloy is formed on the insulating film surface with a film thickness of 3 to 40 nm by a dry plating method, and copper or the like is formed thereon. The thing in which the electroconductive metal layer was formed in 5-15 micrometers is used. Nickel and chromium alloys generally have a chromium content of 5 to 25% by weight. When the chromium content is low, the underlying metal layer tends to corrode, whereas when the chromium content is high, chemical etching cannot be sufficiently performed and insulation failure occurs. Known.

The following method is known as a manufacturing method of a fine pitch COF board | substrate. First, a photoresist layer is formed on a conductive metal layer, this photoresist layer is exposed and developed, and a desired pattern is formed. Next, the exposed conductive metal layer is etched by using the thus formed photoresist pattern as a mask, and a wiring pattern made of a conductive metal layer having a shape substantially similar to the photoresist pattern is formed. Subsequently, after removing the photoresist layer with an alkaline solution or the like, a COF substrate is manufactured by etching away the underlying metal layer remaining between the wiring patterns.

1 is a view showing an example of a method of manufacturing a first conventional COF substrate. 1 (A) is a view showing a metal laminated substrate preparation process for preparing a metal laminated substrate. In the metal lamination substrate preparation process, the metal lamination substrate 110 in which the base metal layer 112 and the copper layer 113 are sequentially stacked on the insulating film 111 is prepared. For example, as the insulating film 111, a polyimide film is used, and as the base metal layer 112, a chromium nickel alloy having a chromium content of 20% by weight is used.

1B is a view showing a photoresist coating step. In the photoresist coating step, the photoresist 120 is formed on the surface of the metal laminated substrate 10, that is, on the surface of the copper layer 113.

1C is a diagram illustrating an exposure process. In the exposure step, in order to form a wiring pattern by forming a groove in the copper layer 113, an ultraviolet ray is irradiated to the photoresist 120 using a photomask (not shown) formed of a predetermined pattern to expose the exposure part 121. To form.

1 (D) is a diagram showing a developing step. In the developing step, the exposure area is dissolved and removed with a developer, and a photoresist pattern having an opening 122 is formed. As the developing solution, for example, an alkaline solution such as an aqueous sodium carbonate solution is used.

1E is a view showing an etching process. In the etching process, the copper layer 113 is etched using a cupric chloride solution. As the composition of the etching solution, for example, cupric chloride of 3.0 to 3.5 mol / l and hydrochloric acid of 1.4 to 1.9 mol / l are used. As processing conditions, temperature is 40-50 degreeC, pressure is 0.1-0.7 Mpa, and processing time is 20-120 second. At this time, the underlying metal layer 112 is also etched away.

Fig. 1F is a view showing a photoresist stripping process. In the photoresist stripping process, the photoresist 120 is dissolved and removed with an alkaline solution such as an aqueous sodium hydroxide solution.

FIG. 1 (G) shows a tin plating process. In the tin plating process, the tin plating layer 140 is formed by plating using tin on the wiring pattern surface of the copper layer 113 formed by etching.

Fig. 1H is a view showing a solder resist printing process. In the solder resist printing process, the solder resist of a predetermined pattern is printed on the wiring pattern by screen printing. As the soldering resist, polyimide-based (SN-9000 manufactured by Hitachi Chemical Co., Ltd.) or urethane-based (NPR-3300 manufactured by Nippon Polytech Co., Ltd.) can be used.

In such a conventional COF substrate manufacturing method, the capacity limit for wiring pattern formation is 27 탆 pitch (Line / Space = 13.5 탆 /13.5 탆). That is, the width | variety required in the part of the groove | channel where the copper layer 113 was etched away and the wiring part in which the copper layer 113 remained is 13.5 micrometers. At this time, the width which the copper layer 113 remains as a flat surface becomes about 6.5 micrometers.

In other words, as shown in Fig. 1E, the etching does not proceed only in the vertical direction, but also in the transverse direction, and an opening 130 is formed under the photoresist pattern to spread out in the transverse direction. It becomes a (bowl) shape. When such a wiring pattern is formed, a portion remaining on the surface of the copper layer 113 with respect to the portion exposed by the insulating film 111 is narrowed, making it difficult to produce a fine pitch COF wiring board. That is, the wiring pattern formed by the etching with such large amount of unintentional lateral etching (side etching) cannot be called a good wiring pattern.

In general, an etching factor is used as an index for determining goodness of wiring patterns. The etching factor can be expressed as follows when the thickness of the copper layer is H, the wiring pattern width on the insulating film side is B, and the wiring pattern width on the copper layer surface side is T.

Etch Factor = 2 × H / (B-T) (1)

In the above formula (1), the closer the value of T is to the value of B, the more the etching is performed in a state close to the vertical. In the case of having the same wiring pitch, the larger the etching factor, the better the wiring pattern is formed. .

According to the conventional COF substrate manufacturing method shown in FIG. 1, the etching factor is about 2.3.

Since a good etching factor cannot be obtained in the conventional method for producing a COF substrate shown in FIG. 1, an etching method for suppressing side etching is proposed as a method for producing a fine pitch COF substrate.

2 is a view showing an example of a method of manufacturing a second conventional COF substrate. In the manufacturing method of the second conventional COF substrate, the manufacturing method of the first conventional COF substrate is the same as the manufacturing method of the first conventional COF substrate described above from the metal lamination substrate preparation step to the developing step. Only the process and other processes are shown.

Fig. 2A is a view showing an etching step of a method of manufacturing a second conventional COF substrate. Before performing the etching process, a polyimide film is used as the insulating film 211, a chromium-nickel alloy having a chromium content of 20% by weight is used as the base metal layer 212, and a metal which is copper 213 as the conductive metal layer. The laminated substrate 210 is prepared, the photoresist layer 220 is formed on the copper layer 213, the photoresist layer 220 is exposed and developed to form a desired pattern, and the photoresist pattern is masked. It is the same as that of the etching process of the said 1st conventional COF board | substrate manufacturing method.

In the etching process of the second prior art, abrupt corrosion is suppressed by using an etching solution containing, as a component, an amine compound that forms a complex with copper by chelate bonding, and the etching proceeds gradually to realize etching with less side etching. do. That is, a film is formed on the surface of copper by a complex, and an etching rate can be lowered and etching can be performed gradually. Further, the pressure is lowered to about 1/10 as compared with the etching process of the first prior art, and etching is performed to lower the etching rate.

Specifically, for example, the composition consists of 0.1 to 15 wt% of ferric chloride, 0.001 to 5 wt% of surfactant, 0.001 to 5 wt% of amine compound, 0.1 to 5 wt% of phosphoric acid, and 0.1 to 10 wt% of hydrochloric acid. Using the etching solution, etching is carried out under the condition that the temperature is 40 to 50 ° C, the pressure is 0.07 to 0.09 MPa, and the processing time is 30 to 120 seconds. As the composition of the etching solution, an amine compound which was not included in the etching solution of the first prior art is included, and the pressure of the processing condition is about 0.07 to 0.09 MPa, which is about 1/10 as compared with 0.1 to 0.7 MPa of the first prior art. There is a big difference in that.

As shown in Fig. 2A, in the etching process of the second prior art, the opening 230 having a shape close to the vertical with less side etching as compared with Fig. 1E of the etching process of the first prior art. Is formed. In this case, the capacity limit is 20 µm pitch (Line / Space = 10 µm / 10 µm), and an etching factor of about 2.0 is obtained. This is 3.0 to 4.0 in terms of the 27-micrometer pitch of the first prior art, and the etching factor is remarkably improved compared to the same pitch.

At this time, as shown in Fig. 2A, in the etching process of the second prior art, the underlying metal layer 212 is left unetched.

2B is a view showing a photoresist stripping process. In the photoresist stripping process, since the photoresist 220 is stripped and removed with an alkaline solution such as an aqueous sodium hydroxide solution, the description thereof will be omitted.

2 (C) is a view showing a base metal layer removing step. In the underlying metal removing step, the wiring pattern is formed by dissolving and removing the underlying metal layer 212 that could not be removed by the etching step. In order to remove the base metal layer 212, a dedicated base metal layer etchant is used. As the base metal layer etching solution, a liquid containing permanganate, hydrochloric acid, sulfuric acid, sulfuric acid, nitric acid, or the like is used.

Thus, the wiring pattern formed by the manufacturing method of the 2nd conventional COF board | substrate is obtained with the shape with few side etching at the time of copper layer etching, and high etching factor. Thus, for example, a fine pitch such that the pattern pitch is 25 µm (line 10 µm / space 15 µm) becomes possible. In the fine etching solution, side etching is suppressed by azole.

In addition, since the tin plating process and the soldering resist printing process after that are the same as the description in FIG. 1 (G), (H), illustration and description are abbreviate | omitted.

In addition, it corresponds to the manufacturing method of the COF substrate of the 1st prior art mentioned above, It etches by the solution which added hydrogen peroxide to cupric chloride and hydrochloric acid, and peels off all the photoresist by alkali (NaOH) after etching. The manufacturing method of the removed chip-on-film board | substrate is known (for example, refer patent document 1).

Moreover, it corresponds to the manufacturing method of the 2nd prior art COF board | substrate mentioned above, The oxidizing metal ion source is 14-155g / liter in a copper ion concentration, 7-180g / liter in hydrochloric acid, the binary atom in a ring. As a method of producing a copper wiring, a wiring is formed by etching a portion which is not covered with an etching resist by using an etchant consisting of an aqueous solution containing an azole having only nitrogen atoms in the range of 0.1 to 50 g / liter. For example, refer patent document 2).

Japanese Laid-Open Patent Publication No. 2002-110749 Japanese Laid-Open Patent Publication No. 2005-330572

However, in the etching method using the fine etching solution as described in the above-mentioned second prior art, there is a problem that it is difficult to dissolve and remove the base metal layer made of nickel-chromium alloy only by the fine etching solution. Therefore, as described above, an underlying metal layer etching step of dissolving and removing the underlying metal layer after etching the wiring pattern is required.

The base metal layer etching solution contains a copper corrosion inhibitor to suppress the dissolution of copper forming the wiring pattern. When the treatment is performed using such a base metal etching solution, the surface of the wiring pattern is likely to remain adsorbed with a copper corrosion inhibitor, a complexing agent, an amine compound, and the like, and a surface cleaning treatment such as degreasing treatment and pickling treatment is required later.

As described above, the method for producing a COF substrate using fine etching solution requires a large number of processes, resulting in a complicated process control and an increase in chemical cost. In particular, the base metal layer etchant for dissolving and removing the base metal layer is expensive, and may be several times as large as the etchant used in the first conventional method for producing a COF substrate, causing a significant increase in cost.

Therefore, an object of the present invention is to provide a method for producing a COF substrate capable of forming a good wiring pattern without significantly increasing the number of processes and chemicals.

In order to achieve the above object, a manufacturing method of a COF substrate according to the first invention is a manufacturing method of a COF substrate which is a film-shaped substrate for chip mounting,

A metal laminated substrate preparation step of preparing a metal laminated substrate on which a base metal layer containing chromium is formed on the surface of the insulating film, and a copper layer formed on the surface of the underlying metal layer;

A first etching step of half-etching the copper layer with a first etching solution containing any one of ferric chloride or cupric chloride, any one of azole, glycol ether, glycol or cationic surfactant, and hydrochloric acid; And

And a second etching step of dissolving and removing the remainder of the copper layer and the underlying metal layer with a second etching solution containing cupric chloride, hydrochloric acid, and hydrogen peroxide solution, substantially free of a compound forming a complex with copper ions. Characterized in that.

As a result, while forming a good wiring pattern having a high etching factor in the first etching step, and finally dissolving and removing the underlying metal in the second etching step, a good wiring pattern can be formed only by switching in the etching step.

2nd invention is a manufacturing method of the COF board | substrate which concerns on 1st invention,

In the first etching step, the copper layer is half-etched in a range of 20 to 60% of the thickness of the copper layer.

Thereby, half etching is performed within the range from which a good etching factor is obtained, and a good wiring pattern can be reliably obtained.

3rd invention is a manufacturing method of the COF board | substrate which concerns on a 1st or 2nd invention,

The first etching step and the second etching step are performed by spraying the first etching solution or the second etching solution on the copper layer by spraying,

The spray injection pressure in the first etching step is smaller than the spray injection pressure in the second etching step.

Thereby, the etching factor of half etching in a 1st etching process can be improved, and the etching rate in a 2nd etching process can be improved, and a base metal layer can be removed reliably.

In a fourth aspect of the invention, there is provided a method for producing a COF substrate according to any one of the first to third aspects, wherein the base metal layer has a chromium content of 5 to 25% by weight.

This makes it possible to set the chromium content in an appropriate range, making it difficult to corrode the underlying metal layer, and at the same time preventing insulation defects caused by insufficient etching.

5th invention is a manufacturing method of the COF board | substrate which concerns on any one of 1st-4th invention,

The base metal layer is characterized in that the nickel chromium alloy.

As a result, a good wiring pattern can be formed on a metal laminated substrate using a base metal layer containing chromium and nickel having good compatibility, and a wiring pattern for a wide range of applications can be formed.

6th invention is a manufacturing method of the COF board | substrate which concerns on any one of 1st-5th invention,

The insulating film is characterized in that the polyimide film.

As a result, a good wiring pattern can be formed on a metal laminate substrate that is widely used, and a COF substrate can be manufactured corresponding to a wide use at low cost.

7th invention is a manufacturing method of the COF board | substrate which concerns on any one of 1st-6th invention,

And a photoresist pattern forming step of forming a photoresist pattern having an opening on the surface of the copper layer between the metal layer laminated substrate preparation step and the first etching step.

Thereby, a desired wiring pattern can be easily formed.

According to the present invention, since the side etching at the time of etching the wiring pattern is small and the underlying metal layer can be dissolved and removed at the same time as the etching of the wiring pattern, the wiring pattern with high electrical reliability and fine and high density can be manufactured at low cost.

1 is a view showing an example of a method of manufacturing a first conventional COF substrate.
1 (A) is a view showing a metal laminate substrate preparation process.
1B is a view showing a photoresist coating step.
1C is a diagram illustrating an exposure process.
1 (D) is a diagram showing a developing step.
1E is a view showing an etching process.
Fig. 1F is a view showing a photoresist stripping process.
FIG. 1 (G) shows a tin plating process.
2 is a view showing an example of a method of manufacturing a second conventional COF substrate.
Fig. 2A is a view showing an etching step of a method of manufacturing a second conventional COF substrate.
2B is a view showing a photoresist stripping process.
2 (C) is a view showing a base metal layer removing step.
3A is a view showing an example of a metal laminated substrate preparation step of the method for manufacturing a COF substrate according to the present embodiment.
3B is a view showing an example of a photoresist coating step of the method for manufacturing a COF substrate according to the present embodiment.
3C is a view showing an example of an exposure step of the method of manufacturing a COF substrate according to the present embodiment.
3D is a view showing an example of a developing step of the method of manufacturing a COF substrate according to the present embodiment.
3E is a view showing an example of a first etching step of the method of manufacturing a COF substrate according to the present embodiment.
3F is a view showing an example of a second etching step of the method of manufacturing a COF substrate according to the present embodiment.
3G is a view showing an example of a photoresist stripping step of the method of manufacturing a COF substrate according to the present embodiment.
3H is a view showing an example of the tin plating step of the method for manufacturing a COF substrate according to the present embodiment.
3I is a view showing an example of a solder resist printing step of the method of manufacturing a COF substrate according to the present embodiment.
It is a figure which shows typically the state which copper and azole chelate-bonded.
5 is a diagram illustrating a comparative example of wiring patterns of a COF substrate according to the present embodiment and a conventional COF substrate.
Fig. 5A is a diagram showing the wiring pattern of the COF substrate according to the first prior art.
Fig. 5B is a diagram showing the wiring pattern of the COF substrate according to the second prior art.
Fig. 5C is a diagram showing the wiring pattern of the COF substrate according to the present embodiment.
FIG. 6 is a view showing a result of carrying out the method for manufacturing a COF substrate according to the present embodiment by changing the embodiment conditions. FIG.

EMBODIMENT OF THE INVENTION Hereinafter, the form for implementing this invention with reference to drawings is demonstrated.

3A to 3I are views showing an example of a series of steps of a method for producing a COF substrate according to an embodiment of the present invention.

3A is a view showing an example of a metal laminated substrate preparation step of the method for manufacturing a COF substrate according to the present embodiment. In the metal lamination substrate preparation process, the metal lamination substrate 10 on which the wiring pattern is formed is prepared. The metal laminated substrate 10 includes an insulating film 11, a base metal layer 12, and a copper layer 13. In the metal laminate substrate 10, the insulating film 11 is disposed at the lowermost layer, the base metal layer 12 is formed and laminated on the surface of the insulating film 11, and the copper layer is formed on the surface of the base metal layer 12. 13 is formed and laminated | stacked.

Although the insulating film 11 may use various insulating films, for example, polyimide which is resin may be used. Although the thickness of the insulating film 11 is determined according to a use, the thickness of about 25 micrometers-80 micrometers may be sufficient, for example.

The base metal layer 12 is a metal layer containing chromium. Since copper has the property of being easy to diffuse by electromigration, it is necessary to prevent ingress of copper ions from the copper layer 13 to the insulating film 11 side. Since chromium can suppress the diffusion of copper, the diffusion of copper ions to the insulating film 11 can be suppressed by disposing between the copper layer 13 and the insulating layer 11. The base metal layer 12 may be made of a chrome nickel alloy. In general, the base metal layer 12 is often composed of a chrome nickel alloy.

5-25 weight% of the chromium content of the base metal layer 12 may be sufficient. When the chromium content is large, diffusion of the copper layer 13 can be reliably prevented, but since it becomes difficult to remove the base metal layer 12 by etching, consideration is given to a balance between preventing diffusion of copper ions and ease of etching. As a result, the chromium content of the base metal layer 12 is determined.

The base metal layer 12 may be formed on the insulating film 11 by dry plating such as sputtering or vapor deposition. The film thickness of the base metal layer 12 may be formed, for example at 3-40 nm.

The copper layer 13 is a conductive metal layer for forming a wiring pattern. Copper is preferably used as a wiring material because of its high conductivity and low price. However, as described above, since copper ions have a property of diffusing, they are used together with the underlying metal layer 12 functioning as a barrier layer.

The copper layer 13 is formed by various methods, for example, may be formed by wet plating methods such as electroplating. The inexpensive facility can be used to easily form the copper layer 13 of the required film thickness. Although the film thickness of the copper layer 13 is determined by various thicknesses according to a use, it may be formed, for example in the range of 5-15 micrometers.

The metal laminated substrate 10 is not necessarily manufactured and can also be obtained as a product. For example, the copper layer 13 has a film thickness of 8 µm, and the insulating film 11 is made of Eupyrex (manufactured by Ube Industries Co., Ltd., for example, a film thickness of 35 µm) or kapton (Toray / A two-layer flexible substrate made of DuPont, for example, a film thickness of 38 μm may be used as the metal laminated substrate 10.

3B is a view showing an example of a photoresist coating step of the method for manufacturing a COF substrate according to the present embodiment. In the photoresist coating step, the photoresist layer 20 is formed on the surface of the metal laminated substrate 10, that is, on the surface of the copper layer 13. Although the photoresist layer 20 may be formed by various methods, for example, a liquid photoresist may be uniformly applied to the surface of the copper layer 13 with a roll coater and dried to form it.

3C is a view showing an example of an exposure step of the method of manufacturing a COF substrate according to the present embodiment. In the exposure step, ultraviolet rays are irradiated to the photoresist layer 20 through a photomask (not shown) having a predetermined pattern. In the manufacturing method of the COF substrate which concerns on this embodiment, ultraviolet-ray is irradiated to the part which forms the groove | channel in the copper layer 13, and the exposure part 21 is formed.

3D is a view showing an example of a developing step of the method of manufacturing a COF substrate according to the present embodiment. In the developing step, the exposed metal laminated substrate 10 is immersed in the developer, and the exposed portion 21 of the photoresist layer 20 is dissolved and removed. Thereby, the opening part 22 is formed in the photoresist layer 20, and the photoresist pattern is formed.

As the developing solution, an alkaline solution may be used, for example, an aqueous sodium carbonate solution or the like is used.

3B to 3D are a step of forming a series of photoresist patterns, all of which may be referred to as a photoresist pattern forming step.

3E is a view showing an example of a first etching step of the method of manufacturing a COF substrate according to the present embodiment. In the 1st etching process, the copper layer 13 is half-etched using the 1st etching liquid of the composition containing the compound which forms a complex with copper, and the groove 30 is formed. The 1st etching liquid used at this time may be the fine etching liquid used for manufacture of a fine pitch COF board | substrate. In addition, you may perform etching by the spray type which sprays a 1st etching liquid with a spray through a photoresist pattern.

The composition of the first etching solution is a composition containing any one of ferric chloride or cupric chloride, any one of azole, glycol ether, glycol or cationic surfactant, and hydrochloric acid.

Here, as the azole, any compound may be used as long as it is a hetero five-membered cyclic compound containing one or more nitrogen. The azole chelates with copper to form a complex with copper ions.

It is a figure which shows typically the state which copper and azole chelate-bonded. As shown in FIG. 4, the azole 60 containing nitrogen chelate-bonds on the surface of the copper layer 13, and forms a complex. And a film is formed on the surface of the copper layer 13, and etching is suppressed.

Referring back to FIG. 3E, as described above, by using the first etching solution containing a compound that forms a complex with copper, etching may be gradually performed to suppress side etching, and thus high etching factor may be performed. .

The etching treatment of the first etching step is performed under a spray pressure lower than that of the second etching step described later. Thereby, the rapid progress of etching can be suppressed and the etching factor with a high etching factor with a small amount of side etching can be performed.

Half etching is etching which does not etch in the thickness direction of the copper layer 13 to the end, but does not etch to the middle, and stops etching once the copper layer 13 is left. As for half etching amount, 20-60% is preferable with respect to the thickness of copper, and 30-60% is more preferable. If the amount of half etching is too small, the side etching inhibiting effect of the wiring pattern is reduced and the etching factor is lowered. On the other hand, if the amount of half etching is too large, the amount of expensive fine etching solution increases, and the underlying metal layer is partially exposed and passivated, so that the second etching solution cannot be removed. Therefore, half etching is preferably performed within the appropriate range as described above.

The first etching step may be performed by various etching solutions as long as the first etching solution satisfying the above-described composition conditions is used. For example, 0.1 to 15% by weight of ferric chloride and 0.001 to 5% of surfactant are used. Etching liquids having a composition with a weight%, an amine compound of 0.001 to 5% by weight, phosphoric acid of 0.1 to 5% by weight and hydrochloric acid of 0.1 to 10% by weight may be used. What is necessary is just to perform an etching process using such etching liquid by the temperature of 40-50 degreeC, the spray pressure of 0.07-0.09 Mpa, and the processing time of 30-120 second, for example. In this case, a complex is formed by the chelate bond between the amine compound and the copper layer 13, and half etching is performed with a high etching factor.

3F is a view showing an example of a second etching step of the method of manufacturing a COF substrate according to the present embodiment. In the second etching step, the copper layer 13 and the base metal layer 12 remaining in the first etching step are removed by etching. The groove | channel 31 which the insulating film 11 exposed by the 2nd etching process is formed in a COF board | substrate, and a wiring pattern is formed.

In the second etching step, etching is performed using a second etching solution containing hydrochloric acid, which is substantially free of a compound forming a complex with copper, rather than a fine etching solution. In the second etching step, the etching solution is selected for the purpose of dissolving and removing the base metal layer 12 containing chromium rather than realizing a high etching factor. In this case, the etching liquid of the composition containing hydrochloric acid used before performing fine etching may be used. Such an etching solution is much cheaper than the dedicated etching solution of the base metal layer 12 and, for example, is often available at a price of tens of thousands, so that it is chemical compared with the manufacturing method of the second prior art COF substrate. The cost required for the process can be greatly reduced.

Although the etching liquid of the various composition containing hydrochloric acid can be used as a 2nd etching liquid substantially without the compound which forms a complex with copper, For example, a cupric chloride is 3.0-3.5 mol / l, You may use the etching liquid of the composition containing 1.4-1.9 mol / l hydrochloric acid.

Further, the etching treatment conditions can set the spraying pressure of the spray higher than that of the first etching process to promote rapid etching treatment. For example, the conditions of an etching process may be 40-50 degreeC, 0.1-0.7 Mpa of spray pressures, and 20-120 second of processing time. In the example of the processing conditions of the first etching process, the spray pressure was 0.07 to 0.09 MPa, so the etching process was performed at a spray pressure of about 10 times in the second etching process.

As described above, the wiring pattern formed by the etching in the two stages has an etching factor of 2.0 having a high capacity limit of 25 占 퐉 pitch (Line / Space = 12.5 占 퐉 / 12.5 占 퐉). It can be seen that a fine pitch and a high etching factor are realized using a low cost chemical without complicating the process.

3G is a view showing an example of a photoresist stripping step of the method of manufacturing a COF substrate according to the present embodiment. In the photoresist stripping step, the metal laminated substrate 1 is immersed in an alkaline solution such as an aqueous sodium hydroxide solution to remove the photoresist. Thereby, the wiring pattern which comprises the groove | channel 31 and the copper layer 13 which comprise the insulating part by exposing the insulating film 11, and which comprises the wiring part is completed.

3H is a view showing an example of the tin plating step of the method for manufacturing a COF substrate according to the present embodiment. In the tin plating process, tin plating is performed on the surface of the copper layer 13 of a wiring pattern, and the tin plating layer 40 is formed.

3I is a view showing an example of a solder resist printing step of the method of manufacturing a COF substrate according to the present embodiment. In the solder resist printing process, the solder resist 50 of a predetermined pattern is formed on the wiring pattern by screen printing. Although various materials may be used as the soldering resist 50, For example, polyimide type (SN-9000 by Hitachi Chemical Co., Ltd.) and urethane type (NPR-3300 by Nippon Polytech Co., Ltd.) can be used.

Thus, according to the manufacturing method of the COF board | substrate which concerns on this embodiment, a fine pitch COF board | substrate can be manufactured by a simple and inexpensive process.

5 is a diagram showing an example in which the wiring pattern of the COF substrate manufactured by the manufacturing method of the COF substrate according to the present embodiment is compared with the wiring pattern of the COF substrate manufactured by the conventional manufacturing method of the COF substrate. In addition, in FIG. 5, since the shape of a groove is paying attention, the base metal layers 12, 112, and 212 are abbreviate | omitted and shown.

Fig. 5A is a diagram showing a wiring pattern of a COF substrate manufactured by the method of manufacturing a COF substrate according to the first conventional art. In FIG. 5A, it can be seen that the inclination of the side surface of the groove 130 is gentle and is not suitable for manufacturing a fine pitch COF substrate.

Fig. 5B is a diagram showing a wiring pattern of a COF substrate manufactured by the method for producing a COF substrate according to the second prior art. In FIG. 5B, the side surface of the groove 231 is in a state close to vertical, and it can be seen that it is a manufacturing method suitable for manufacturing a COF substrate. However, in order to form a wiring pattern having the same shape as the groove 231, it is necessary to remove the base metal 212 alone, and the process is complicated and the cost increases, making it difficult to apply to the actual manufacturing process.

FIG. 5C is a diagram showing a wiring pattern of a COF substrate manufactured by the method of manufacturing a COF substrate according to the present embodiment. In FIG. 5C, the upper side of the groove 31 is close to vertical, while the vicinity of the bottom is inclined. Since the area in the vicinity of the bottom surface having a gentle inclination has a small area, the overall shape of the groove 31 has many vertical portions, and thus has a shape of a wiring pattern suitable for manufacturing a fine pitch COF substrate. Considering the number of steps, cost, etc., it can be seen that it is a method of producing a COF substrate that is easy to apply to an actual manufacturing process.

Thus, according to the manufacturing method of the COF board | substrate which concerns on this embodiment, a fine pitch COF board | substrate can be manufactured by a simple and inexpensive process. In particular, in the case of mass production, a greater effect can be obtained.

Next, the specific example of the manufacturing method of the COF board | substrate which concerns on this embodiment is demonstrated using FIG. FIG. 6 is a view showing a result of carrying out the method for manufacturing a COF substrate according to the present embodiment by changing the embodiment conditions. FIG.

In Fig. 6, for Examples 1 to 5 and Comparative Examples 1 to 3, the items of half etching amount, upper wiring width, bottom wiring width, etching factor, base metal layer residue, and provisional determination are shown in a table. In addition, about the component same as embodiment described so far, the same code | symbol as the previous embodiment is attached | subjected and the description is abbreviate | omitted.

Example 1

On the one side of the polyimide film (manufactured by Toray DuPont: Kafton 150EN), which is an insulating film 11 having a film thickness of 38 µm, a 20 wt% chromium-nickel alloy layer having a thickness of 20 nm as a base metal layer 12 was sputtered. A copper layer 13 having a thickness of 10 nm was formed on the base metal layer 12 by the sputtering method. Furthermore, the copper layer 13 of thickness 8micrometer was formed by the wet plating method on the said copper layer. In addition, the thin film of the copper layer 13 formed by the sputtering method is a seed layer for wet electroplating.

With respect to the obtained copper clad laminated substrate 10, using a first etchant, 0.03 mol / L of ferric chloride, 0.003 mol / L of benzotriazole, 0.02 mol / L of propylene glycol, and 0.1 mol / L of hydrochloric acid were used. Etching is carried out so that the etching amount is 20% of the copper thickness, and then etching is performed such that the bottom wiring width is about 15 μm using 3 mol / L cupric chloride and 1.5 mol / L of copper chloride in the second etching solution. , A wiring pattern having a pitch of 25 μm (line / space = 10 μm / 15 μm) was produced. As shown in Table 1, as shown in Table 1, a good wiring was formed with an upper wiring width of 7 µm or more, an etching factor of 2.00 or more, and no residue of the underlying metal layer 12. In addition, the results are shown in the table of FIG. 6.

[Example 2]

Wiring was formed in the same manner as in Example 1 except that the half etching amount in the first etching solution was set to 30% of the thickness of the copper layer 13.

As shown in the table of FIG. 6, the wiring formed on the upper surface had a width of 7 μm or more, an etching factor of 2.00 or more, and no residue of the underlying metal layer 12.

Example 3

The wirings were formed in the same manner as in Example 1 except that the half etching amount in the first etching solution was 40% of the thickness of the copper layer 13.

As shown in the table of FIG. 6, the formed wiring had an upper wiring width of 7 µm or more, an etching factor of 2.00 or more, and no residue of the underlying metal layer 12, and good wiring was formed.

Example 4

Wiring was formed in the same manner as in Example 1 except that the half etching amount in the first etching solution was 50% of the thickness of the copper layer 13.

As shown in the table of FIG. 6, the formed wiring had an upper wiring width of 7 µm or more, an etching factor of 2.00 or more, and no residue of the underlying metal layer 12, and good wiring was formed.

Example 5

The wirings were formed in the same manner as in Example 1 except that the half etching amount in the first etching solution was 60% of the thickness of the copper layer 13.

As shown in the table of FIG. 6, the formed wiring had an upper wiring width of 7 µm or more, an etching factor of 2.00 or more, and no residue of the underlying metal layer 12, and good wiring was formed.

Next, the comparative example of the manufacturing method of the COF board | substrate which concerns on a present Example is demonstrated similarly using the table of FIG.

Comparative Example 1

The wiring was formed by etching with only the second etching liquid without using the first etching liquid.

As shown in the table of FIG. 6, the formed wiring had an upper surface wiring width of less than 7 µm and an etching factor of less than 2.00, and thus could not be used as a substrate for COF.

Comparative Example 2

Wiring was formed in the same manner as in Example 1 except that the half etching amount in the first etching solution was set to 10% of the thickness of the copper layer 13.

As shown in the table of FIG. 6, the formed wiring had an upper surface wiring width of less than 7 µm and an etching factor of less than 2.00, and thus could not be used as a substrate for COF.

Comparative Example 3

The wirings were formed in the same manner as in Example 1 except that the half etching amount in the first etching solution was set to be 70% of the thickness of the copper layer 13.

As shown in the table of FIG. 6, the formed wiring had a top wiring width of 7 μm or more and an etching factor of 2.00 or more, but residues of the base metal layer 12 were generated and could not be used as a COF substrate.

Thus, it can be seen from the manufacturing method and comparative example of the COF substrate according to the present example that the half etching amount in the first etching step is preferably in the range of 20 to 60%.

In the fine pitch COF substrate, considering the tolerance and the deviation of the chip mount, it is preferable that the flat width of the top of the lead wiring is at least 7 µm. The wiring width can be realized to meet such a request.

In addition, although the fine etching solution for realizing a high etching factor is high in cost, there is a demand to reduce the amount of use thereof. However, according to the present embodiment and the manufacturing method of the COF substrate according to the present embodiment, the fine etching solution is used only in the first etching step. The usage-amount of fine etching liquid can be reduced.

Furthermore, when the fine etching solution is used, the underlying metal layer 12 is not removed and it is necessary to use the underlying metal layer removal solution. However, since the underlying metal layer removal solution is very expensive, there is a demand to reduce the amount of use thereof. According to this embodiment and the manufacturing method of the COF board | substrate which concerns on a present Example, since it becomes unnecessary to use a base metal layer removal liquid, it can satisfy such a request.

As mentioned above, although preferred embodiment of this invention was described in detail, this invention is not limited to embodiment mentioned above, A various deformation | transformation and substitution can be added to embodiment mentioned above in the range which does not deviate from the range of this invention. Can be.

This application claims priority based on Japanese Patent Application No. 2010-029342 for which it applied on February 12, 2010, and uses all the content of the said Japanese patent application as a reference here.

This invention can be used for the manufacturing process of a COF board | substrate, The manufactured COF board | substrate can be used for various apparatuses, such as a driver of a liquid crystal panel.

10 Metal Laminated Substrate
11 insulating film
12 base metal layer
13 copper layers
20 photoresist layer
21 Exposure section
22 opening
30, 31 home
40 tin plated layer
50 solder resist layer

Claims (7)

As a manufacturing method of a COF substrate which is a film-shaped substrate for chip mounting,
A metal lamination substrate preparation step of preparing a metal lamination substrate on which a base metal layer containing chromium is formed on the surface of the insulating film and a copper layer is formed on the surface of the base metal layer;
A first etching step of half-etching the copper layer with a first etching solution containing at least one of ferric chloride or cupric chloride, at least one of azole, glycol ether, glycol, or cationic surfactant, and hydrochloric acid; And
A second etching step of dissolving and removing the remainder of the copper layer and the base metal layer with a second etching solution containing substantially no compound forming a complex with copper ions and containing cupric chloride, hydrochloric acid and hydrogen peroxide solution;
Method for producing a COF substrate comprising a. The method of claim 1,
The first etching process is a method of producing a COF substrate, characterized in that the copper layer half-etched in the range of 20 to 60% of the thickness of the copper layer. The method according to claim 1 or 2,
The first etching step and the second etching step are performed by spraying the first etching solution or the second etching solution on the copper layer by spraying,
A spray injection pressure in the first etching step is smaller than the spray injection pressure in the second etching step. The method according to any one of claims 1 to 3,
The base metal layer has a chromium content of 5 to 25% by weight. The method according to any one of claims 1 to 4,
The base metal layer is a nickel-chromium alloy manufacturing method of the COF substrate. 6. The method according to any one of claims 1 to 5,
The insulating film is a method for producing a COF substrate, characterized in that the polyimide film. The method according to any one of claims 1 to 6,
And a photoresist pattern forming step of forming a photoresist pattern having an opening on the surface of the copper layer between the metal layer laminated substrate preparation step and the first etching step.

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