KR20110087249A - Semiconductor device for emitting light and method for fabricating the same - Google Patents

Abstract

PURPOSE: A semiconductor light emitting device and a manufacturing method thereof are provided to supply excellent thermal stability by actuating a contact layer on a diffusion barrier layer, processing a semiconductor light emitting device by heat in a nitrogen atmosphere, and controlling the deterioration by the heat generated in the implantation condition with high current and high temperature. CONSTITUTION: A semiconductor layer(120) has a light emitting structure. An ohmic electrode comprises a nano dot layer, formed on a semiconductor layer, a contact layer, a diffusion stop layer, and a capping layer A nano dot layer is formed on the nitrogen pole surface of the semiconductor layer with a least one of Ag, Al, and Au. A contact layer is formed with at least one of Ti, Ti-Al Alloy, Ti-Ni Alloy, and Ta, Al, W, W-Ti Alloy. A diffusion stop layer is formed with at least one metal layer of Cr, Ru, Pt, Ni, Pd, Ir, Rh, Nb and at least one oxide film of RuOx, NiOx, IrOx, RhOx,NbOx, TiOx, TaOx, CrOx. A capping layer is formed with at least one of Au and Al.

Description

Semiconductor light emitting device and method of manufacturing the same {SEMICONDUCTOR DEVICE FOR EMITTING LIGHT AND METHOD FOR FABRICATING THE SAME}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device and a method of manufacturing the same, and more particularly, to a semiconductor light emitting device having an ohmic electrode formed on a semiconductor layer of a light emitting structure for applying an external driving power source, and a manufacturing method thereof.

A light emitting diode (LED) has a long life, can be miniaturized and light in weight, has a strong light directivity and can be driven at low voltage. In addition, it is resistant to shock and vibration, requires no preheating time and complicated driving circuits, and can be packaged in various forms. In particular, the nitride-based semiconductor light emitting device has a large energy band gap, which enables light output in a wide wavelength band from the ultraviolet region to blue / red, and can achieve high efficiency and high output due to its excellent physical and chemical stability. It is getting a lot of attention. Such nitride semiconductor light emitting devices are capable of emitting white light when combined with existing red and green light emitting devices, and are expected to replace incandescent lamps, fluorescent lamps, mercury lamps and existing white lighting means in the coming years.

However, the nitride semiconductor light emitting devices developed to date are not satisfactory in terms of light output, luminous efficiency, and price, and require further performance improvement. In particular, there is still a need to further increase the low light output compared to the conventional white light source, and thus must overcome the problem of thermal stability.

Meanwhile, a general nitride semiconductor light emitting device is manufactured by forming a nitride based n-type layer, a nitride based active layer, and a nitride based p-type layer on a sapphire substrate, and placing two electrodes horizontally to apply power to the n-type layer and the p-type layer. . Such a light emitting device having a horizontal structure has an advantage of low manufacturing cost due to a relatively simple manufacturing process. However, since a sapphire substrate is used as a non-conductor and has poor thermal conductivity, high power is realized by applying a large current and thermal stability due to heat accumulation. This had the disadvantage of being degraded.

In order to overcome this disadvantage, vertical semiconductor light emitting devices and flip chip type semiconductor light emitting devices have been proposed. In this case, a reflective layer is formed on the p-type electrode so that light generated from the active layer is emitted to the outside through the n-type electrode, and a large-area current can be applied and rapid heat dissipation is possible by using a metal substrate having good thermal conductivity instead of the sapphire substrate. High output and thermal stability can be achieved. The semiconductor light emitting device having a vertical structure can increase the maximum applied current several times more than the semiconductor light emitting device having a horizontal structure, and thus, it is evaluated that high power is possible and can replace the existing white lighting means.

On the other hand, in order to improve driving voltage characteristics in a vertical semiconductor light emitting device, the n-type electrode must have low resistance characteristics. The vertical semiconductor light emitting device uses a metal substrate or a semiconductor substrate such as Si or Ge as a supporting substrate and removes the sapphire substrate through a laser lift-off (LLO) process. There is a problem that high temperature heat treatment is not easy after the laser lift-off process due to problems such as large coefficient of thermal expansion and wafer bonding temperature. Therefore, conventionally, Cr / Au and Ti / Al n-type ohmic electrodes capable of forming ohmic at room temperature without heat treatment have been used. However, such an ohmic electrode has a problem in that the ohmic characteristics are easily degraded due to heat generated during heat treatment for forming a SiO ₂ protective film or high current injection in a large area light emitting diode after electrode formation, thereby increasing driving voltage. In addition, Al is easily oxidized in the Ti / Al electrode, there is a problem that is easily etched in various solutions. Therefore, there is an urgent need for the development of an n-type ohmic electrode that exhibits low contact resistance immediately after deposition and simultaneously satisfies excellent thermal stability characteristics that can maintain low contact resistance even after heat treatment.

In the semiconductor light emitting device having a vertical structure, after forming a nitride semiconductor layer on a mother substrate, a p-type electrode is formed on an upper surface of the nitride semiconductor layer, that is, a gallium polarity (Ga-face), and on a p-type electrode. After attaching the auxiliary substrate, the mother substrate is separated to form an n-type electrode on the lower surface of the nitride semiconductor layer, that is, the N-face. However, unlike the Ga-face, the N-face cannot expect good ohmic properties without heat treatment, and the heat treatment itself is due to the difference in the coefficient of thermal expansion between the auxiliary substrate (metal substrate) and the nitride semiconductor layer. Nor is it easy. As described above, the conventional Cr / Au or Ti / Al structure electrode formed on the conventional nitrogen polarity (N-face) has not only poor ohmic characteristics, but also low thermal stability.

The present invention has been made to solve the above problems, and has excellent thermal stability and less degradation of ohmic characteristics even in a high temperature environment, and an ohmic electrode having excellent ohmic characteristics in terms of nitrogen polarity as well as gallium polarity of the nitride semiconductor layer. Provided are a semiconductor light emitting device and a method of manufacturing the same.

A semiconductor light emitting device according to an aspect of the present invention, a semiconductor layer having a light emitting structure; An ohmic electrode having a nano dot layer, a contact layer, a diffusion barrier layer, and a capping layer formed on the semiconductor layer; The nano dot layer is formed on the nitrogen polarity surface of the semiconductor layer, and formed of at least one material of Ag, Al, Au, and the contact layer is Ti, Ti-Al alloy, Ti-Ni alloy , Ta, Al, W, W-Ti alloy is formed of at least one material, the diffusion barrier layer is at least one metal layer of Cr, Ru, Pt, Ni, Pd, Ir, Rh, Nb, or RuOx, NiOx, At least one oxide film of IrOx, RhOx, NbOx, TiOx, TaOx, CrOx is formed, and the capping layer is formed of at least one material of Au and Al.

The nano dot layer is preferably made of nano-size Ag dots formed by depositing Ag and heat treatment in a nitrogen atmosphere. At this time, it is preferable that the nano dot layer is formed to a thickness of 5 GPa to 50 GPa.

Preferably, the contact layer is formed of Ti, the diffusion barrier layer is made of Cr, and the capping layer is made of Au. At this time, it is preferable that the contact layer is formed to a thickness of 1 kPa to 1000 kPa, and the diffusion barrier layer is formed to a thickness of 1000 kPa to 3000 kPa.

The semiconductor layer includes an n-type layer, an active layer and a p-type layer, and the ohmic electrode is preferably formed on the nitrogen polarity surface of the n-type layer.

According to another aspect of the present invention, a method of manufacturing a semiconductor light emitting device includes: forming a semiconductor layer having a light emitting structure; Forming a nano dot layer on the nitrogen polarity surface of the semiconductor layer; And forming an ohmic electrode having a contact layer, a reflective layer, a diffusion barrier layer, and a capping layer on the nano dot layer. The nano dot layer is formed of at least one material of Ag, Al, Au, and the contact layer of Ti, Ti-Al alloys, Ti-Ni alloys, Ta, Al, W, W-Ti alloys It is formed of at least one material, and the diffusion barrier layer is at least one metal layer of Cr, Ru, Pt, Ni, Pd, Ir, Rh, Nb, or RuOx, NiOx, IrOx, RhOx, NbOx, TiOx, TaOx, CrOx At least one oxide film is formed, and the capping layer is formed of at least one of Au and Al.

The nano dot layer is preferably formed by depositing Ag on the nitrogen polarity surface of the semiconductor layer and heat-treating it in a nitrogen atmosphere.

Preferably, the contact layer is formed of Ti, the diffusion barrier layer is made of Cr, and the capping layer is made of Au.

It is preferable to further include performing a surface treatment on the semiconductor layer before the formation of the ohmic electrode. At this time, the surface treatment step, it is preferable to include the step of immersing the semiconductor surface in an aqueous solution of aqua regia, washing with deionized water and drying the semiconductor surface with nitrogen.

In the multi-layered ohmic electrode including the nano dot layer / contact layer / diffusion prevention layer / capping layer according to the present invention, the nano dot layer may improve the charge injection characteristics to the nitrogen polarity surface of the nitride semiconductor, thereby obtaining excellent ohmic characteristics. Since the contact layer acts as a diffusion barrier layer to suppress deterioration due to heat generated under nitrogen atmosphere heat treatment and high temperature and high current injection conditions, the thermal stability is excellent.

In particular, the multi-layered ohmic electrode including the nano dot layer / contact layer / diffusion prevention layer / capping layer according to the present invention is formed on the nitrogen polarity surface of the nitride semiconductor and has a low ohmic resistance even though no additional heat treatment is performed. And high light reflectivity. Therefore, the n-type electrode (or n-type pad) is formed on the nitrogen polarity surface of the nitride semiconductor, so that the ohmic characteristics are not good, and due to the difference in thermal expansion coefficient between the metal substrate and the nitride semiconductor, it is difficult to improve the ohmic characteristics even through heat treatment. It can be used more suitably for a semiconductor light emitting element.

1 is a cross-sectional view showing a semiconductor light emitting device according to a first embodiment of the present invention.
2 to 5 are sectional views showing the manufacturing process of the light emitting device according to the first embodiment of the present invention.
Figure 6 is a graph showing the current-voltage characteristics of the ohmic electrode according to the experimental example and the comparative example of the present invention.
7 is a graph showing a change in contact resistance of the ohmic electrode according to the experimental example and the comparative example of the present invention.
8 is a graph showing current-voltage characteristics of a semiconductor light emitting device to which an ohmic electrode according to an experimental example and a comparative example of the present invention are applied.
9 is a cross-sectional view showing a semiconductor light emitting device according to a second embodiment of the present invention.
10 to 12 are cross-sectional views illustrating a process of manufacturing a semiconductor light emitting device according to a second embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various forms, and only the embodiments are intended to complete the disclosure of the present invention, and to those skilled in the art the scope of the invention. It is provided for complete information.

In the drawings, the thickness of layers, films, panels, regions, etc., may be exaggerated for clarity, and like reference numerals designate like elements. In addition, when a part such as a layer, a film, an area, or a plate is expressed as “above” or “above” another part, each part is not only when the part is “right above” or “just above” the other part, This includes the case where there is another part between other parts.

<First Embodiment>

1 is a cross-sectional view illustrating a semiconductor light emitting device according to a first exemplary embodiment of the present invention.

Referring to FIG. 1, the semiconductor light emitting device includes a semiconductor layer 120 including an n-type layer 121, an active layer 122, and a p-type layer 123, and an n-type electrode formed on an upper surface of the n-type layer 121. 180 and a p-type electrode 130 formed on the bottom surface of the p-type layer 123, and may further include a support substrate 170 attached to the bottom surface of the p-type electrode 130. Here, the n-type electrode 180 includes a nano dot-type layer 181, a contact layer 182, a diffusion barrier layer 183, and a capping layer 184 formed on the semiconductor layer 120. The multi-layered ohmic electrode is in ohmic contact with the semiconductor layer 120.

The semiconductor layer 120 includes an n-type layer 121, an active layer 122, and a p-type layer 123. The n-type layer 121, the active layer 122, and the p-type layer 123 may be a Si film, a GaN film, It may be formed of at least one of an AlN film, an InGaN film, an AlGaN film, an AlInGaN film, and a film containing the same. For example, in this embodiment, the n-type layer 121 and the p-type layer 123 are formed of a GaN film, and the active layer 122 is formed of an InGaN film.

Here, the n-type layer 121 is a layer for providing electrons, it may be composed of an n-type semiconductor layer and an n-type cladding layer. The n-type semiconductor layer and the n-type cladding layer may be formed by injecting an n-type dopant, for example, Si, Ge, Se, Te, C, or the like into the semiconductor thin film. The p-type layer 123 is a layer for providing holes, and may be composed of a p-type semiconductor layer and a p-type cladding layer. The p-type semiconductor layer and the p-type cladding layer may be formed by injecting a p-type dopant, for example, Mg, Zn, Be, Ca, Sr, or Ba into the semiconductor thin film.

In addition, the active layer 220 is a layer that outputs light having a predetermined wavelength while electrons provided from the n-type layer 210 and holes provided from the p-type layer 230 are recombined, and include a well layer and a barrier layer. By alternately stacking to form a multi-layer semiconductor thin film having a single or multiple quantum well structure. Since the wavelength of light to be output varies according to the semiconductor material constituting the active layer 220, it is preferable to select an appropriate semiconductor material according to the target output wavelength. For example, in the present embodiment, after depositing a GaN thin film, an n-type impurity is implanted to form an n-type layer 121, and a multi-well structure is formed by alternately depositing a GaN thin film as a barrier layer and an InGaN thin film as a well layer. The active layer 122 was formed, a GaN thin film was deposited thereon, and then a p-type impurity was implanted to form the p-type layer 123, thereby forming a semiconductor layer 120 having a light emitting structure.

The n-type electrode 180 and the p-type electrode 130 are disposed in the vertical direction, and the p-type electrode 130 reflects the light generated by the active layer 122 so that most of the light is directed in the direction of the n-type layer 121. It forms a reflective surface to be emitted to the outside. The n-type electrode 180 is a nano dot layer 181, a contact layer 182, a diffusion barrier layer 183, and a capping layer 184 formed on an N-face of the semiconductor layer 120. It is formed as a multi-layer ohmic electrode comprising a.

In this case, the nano dot layer 181 may be formed by heat-treating at least one material of Ag, Al, and Au in an atmosphere containing nitrogen. In addition, the contact layer 182 may be formed of at least one of Ti, Ti-Al alloys, Ti-Ni alloys, Ta, Al, W, W-Ti alloys, the diffusion barrier layer 183 is Cr, Ru At least one metal layer among Pt, Ni, Pd, Ir, Rh, and Nb, or at least one oxide layer among RuOx, NiOx, IrOx, RhOx, NbOx, TiOx, TaOx, and CrOx. In addition, the capping layer 184 may be formed of at least one material of Au and Al. For example, in the n-type electrode 180 of the present embodiment, the nano dot layer 181 is formed of Ag, the contact layer of Ti, the diffusion barrier layer of Cr, and the capping layer of Au.

The support substrate 170 supports the entire structures 120, 130, and 180 as the growth substrate of the semiconductor layer 120, that is, the base substrate is removed. The capping layer 160, the bonding layer 150, and the diffusion barrier layer 140 are disposed between the supporting substrate 170 and the p-type electrode 130 so that the supporting substrate 170 is attached to the lower surface of the p-type electrode 130. Can be formed. The diffusion barrier layer 140 is used to prevent diffusion of the forming material 120 of the p-type electrode 130 into the adjacent layer by heat during the bonding process of the p-type electrode 130 and the support substrate 170.

A manufacturing process of a semiconductor light emitting device having such a configuration will be described below with reference to FIGS. 2 to 5. 2 to 5 are cross-sectional views illustrating a process of manufacturing the semiconductor light emitting device according to the first embodiment of the present invention.

Referring to FIG. 2, an n-type layer 121, an active layer 122, and a p-type layer 123 are sequentially stacked on the prepared substrate 110 to form a semiconductor layer 120 having a multilayer structure. The substrate 110 may include a sapphire (Al ₂ O ₃ ) substrate, a silicon carbide (SiC) substrate, a silicon (Si) substrate, a zinc oxide (ZnO) substrate, a gallium arsenide (GaAs) substrate, or a gallium phosphide (GaP) substrate. Etc. can be used, and it is more preferable to use a sapphire substrate.

Referring to FIG. 3, a metal film is deposited on the semiconductor layer 120 to form a p-type electrode 130, and a diffusion barrier layer 140, an adhesive layer 150, and a capping layer on the p-type electrode 130. After forming the 160, the support substrate 170 is attached through an adhesion process.

In this embodiment, a heat adhesion process is performed to attach the support substrate 170, and a diffusion barrier layer (p) is formed on the p-type electrode 130 to prevent diffusion of a material of the p-type electrode 130 during the heating process. 140). On the other hand, the p-type electrode 130 is preferably formed of a reflective conductive film having excellent light reflectivity, such as Ag or Au, so that most of the light generated in the active layer 122 is emitted toward the n-type layer 123. The support substrate 170 is preferably a metal substrate or a semiconductor substrate such as Si or Ge.

Referring to FIG. 4, the mother substrate 110 is separated and removed by performing a lift off process using a laser. Subsequently, as shown in FIG. 5, the support substrate 110 is turned upside down, followed by Mesa etching of the semiconductor layer 120 attached to the upper portion of the support substrate 170, and subsequently formed n-type electrode. Surface treatment of the semiconductor layer 120 is performed to improve the interfacial adhesion with the 180. In the present embodiment, the semiconductor surface, that is, n-type layer 123, is immersed in an aqueous solution of aqua regia (HCl: H ₂ O = 3: 1) for about 10 minutes, washed with deionized water, and dried with nitrogen to form a primary surface. The second surface treatment is performed by soaking for about 2 minutes in a solution mixed with hydrochloric acid (HCl) and deionized water 1: 1 before depositing a subsequent layer, that is, the n-type electrode 123. . Of course, such primary and secondary surface treatments can be selectively performed or omitted depending on the desired purpose.

Referring to FIG. 5 again, Ag is formed on the surface of the n-type layer 123 of the exposed semiconductor layer 120 by 5 nm to 50 mm thin and then heat-treated in an atmosphere containing nitrogen. The dot layer 181 is formed. The Ag nano dot layer 181 is formed on the N-face of the n-type layer 123. Subsequently, the Ti contact layer 182, the Cr diffusion barrier layer 183, and the Au capping layer 184 are stacked on the Ag nano dot layer 181 and then patterned to form an Ag nano dot layer / Ti / Cr / Au structure. An n-type electrode 180 is formed.

In this case, when the Ag nano dot layer 181 is less than 5 mW, the dot size is too small, and current injection efficiency is low. It is preferable. The Ti contact layer 182 may not serve as a contact layer when the thickness is less than 1 mm, and the thickness of the Ti contact layer 182 may be reduced to 1 mm by 1000 mm because the adhesive force may decrease due to an increase in stress in the thin film due to an increase in thickness. Do. The Cr diffusion barrier layer 183 is preferably formed to have a thickness of 1000 kV to 3000 kV because the role of diffusion prevention is insufficient when the thickness is less than 1000 kV and the electrical properties may decrease due to an increase in resistivity. The Au capping layer 184 is not suitable for wire bonding when the thickness is less than 1000 kPa, and when the Au capping layer 184 exceeds 10000 kW, the manufacturing cost increases, and thus, the Au capping layer 184 may be formed to have a thickness of 1000 kPa to 10000 kPa. In addition, the total thickness of the n-type electrode 180 is preferably formed to be 1000 kPa to 10000 kPa. For example, in the present embodiment, an Ag nano dot layer, a Ti contact layer, a Cr diffusion barrier layer, and an Au capping layer are sequentially disposed on the semiconductor layer 120 using an e-beam evaporator. It was formed to a thickness of 1000 Å / 5000 Å.

Then, after the formation of the n-type electrode 180 and the p-type electrode 130 to improve the adhesion, ohmic characteristics and secure the thermal reliability after the addition of heat treatment in the range of 150 ℃ to 600 ℃ in the atmosphere containing nitrogen and oxygen It can also be carried out.

On the other hand, in order to determine the characteristics of the n-type electrode 180 in ohmic contact with the semiconductor layer 120 in the semiconductor light emitting device according to the first embodiment will be described as follows. In the experimental example, the Ag nano dot layer / Ti / Cr / Au ohmic electrode according to the first embodiment of the present invention was used, and the comparative example used a conventional general Cr / Au ohmic electrode.

FIG. 6 is a graph showing current-voltage characteristics of an ohmic electrode according to an experimental example and a comparative example of the present invention, and is a graph showing current-voltage characteristics measured immediately after deposition and after heat treatment for 1 minute in a nitrogen atmosphere at approximately 350 ° C. FIG. .

Referring to FIG. 6, the Ag nano dot layer / Ti / Cr / Au ohmic electrode, which is an experimental example of the present invention, and the Cr / Au ohmic electrode, which is a comparative example of the present invention, show almost similar current-voltage curves immediately after deposition. However, the current-voltage curve of the Cr / Au electrode immediately after the heat treatment is much degraded, while the current-voltage curve immediately after deposition of the Ag nano dot layer / Ti / Cr / Au ohmic electrode is almost maintained. The inverse of the slope (I / V) of the current-voltage curve refers to the resistance (R), through which the Ag nano dot layer / Ti / Cr / Au ohmic electrode, which is an experimental example of the present invention, is a comparative example of the present invention. It can be seen that the thermal stability is better because the resistance change is smaller than that of the Cr / Au ohmic electrode. Therefore, since the Ag nano dot layer / Ti / Cr / Au ohmic electrode, which is an experimental example of the present invention, has high thermal stability and maintains a low resistance ohmic characteristic even in a high temperature environment, a higher current can be applied to the semiconductor layer, thereby providing light in the light emitting device. You can increase the output even more.

FIG. 7 is a graph illustrating a change in contact resistance of an ohmic electrode according to an experimental example and a comparative example of the present invention.

In order to know the electrical characteristics of the ohmic electrode, the contact resistance is calculated by using the TLM method proposed by Professor shottky. The TLM method obtains a resistance R _T at 0V by measuring a current (I) -voltage (V) curve between two metal electrodes whose distances are divided into d ₁ , d ₂ , d ₃ , and d ₄ , respectively. After plotting the measured R _{T according} to the distance and extrapolating, the contact resistance can be calculated by the following equation.

Where R _T is the resistance [Ω] between each of the metal electrodes, R _S is the sheet resistance [Ω] of the semiconductor layer, d is the distance between the metal electrodes, Z is the width of the metal electrode, and ρ _C is the contact resistance. do.)

Referring to FIG. 7, the Ag nano dot layer / Ti / Cr / Au ohmic electrode, which is an experimental example of the present invention immediately after deposition, showed a low contact resistance value of 7.4 × 10 ⁻⁵ Ωcm ² , and Cr / Au ohmic, which is a comparative example of the present invention. The electrode also showed almost the same low contact resistance value of 8.3 x 10 ^-5 Ωcm ² . However, after the nitrogen atmosphere heat treatment at 350 ℃ Cr / Au electrode is 3.53 x 10 ^-1 Ωcm ² Although the contact resistance increased sharply, the Ti / Cr / Au ohmic electrode was 4.7 x 10 ^-4 Ωcm ² The contact resistance was still low. The results also confirmed that the Ag nano dot layer / Ti / Cr / Au ohmic electrode, which is an experimental example of the present invention, has better thermal stability than the conventional Cr / Au ohmic electrode, which is a comparative example of the present invention.

8 is a graph showing current-voltage characteristics of a semiconductor light emitting device to which an ohmic electrode is applied according to an experimental example and a comparative example of the present invention. Ag nano dot layer / Ti / Cr / Au electrode and Cr / Au electrode were used.

Referring to FIG. 8, the current-voltage characteristic of the semiconductor light emitting device using the Ag nano dot layer / Ti / Cr / Au ohmic electrode, which is an experimental example of the present invention, is a semiconductor light emitting device using the Cr / Au ohmic electrode, which is a comparative example It can be seen that it is superior to the current-voltage characteristic, the experimental example of the Ag nano dot layer / Ti / Cr / Au ohmic electrode showed a very good driving voltage characteristics of ~ 2.8V at 20mA injection current conditions.

As described above, the ohmic electrode 180 having the Ag nano dot layer / Ti / Cr / Au structure may improve the charge injection characteristic of the Ag nano dot layer 181 to the semiconductor layer 120, and the Ti contact layer 182 may be Excellent thermal stability because it acts as a diffusion barrier between the n-type layer 121 and the Cr / Au electrodes 183 and 184 to suppress deterioration caused by heat generated under nitrogen atmosphere heat treatment and high temperature and high current injection conditions. Do. Therefore, the semiconductor light emitting device using the Ag nano dot layer / Ti / Cr / Au structured ohmic electrode has lower driving voltage characteristics and thermal stability is improved. In addition, these results show that the nano-dot layer is formed of at least one of Al and Au instead of Ag in an ohmic electrode having an Ag nano dot layer / Ti / Cr / Au structure, and the above-described Ti-Al alloy, Ti, instead of Ti At least one of Ni, Ta, Al, W, and W-Ti alloys, and at least one of Ru, Pt, Ni, Pd, Ir, Rh, and Nb as described above in place of Cr; Similar experiment results could be obtained using Al as described above instead of Au.

&Lt; Embodiment 2 >

Meanwhile, the ohmic electrode of the Ag nano dot layer / Ti / Cr / Au structure applied to the semiconductor light emitting device according to the second embodiment of the present invention may be applied to a semiconductor light emitting device having a horizontal structure. Hereinafter, as an example of such a possibility, a semiconductor light emitting device according to a second embodiment of the present invention in which an n-type electrode and a p-type electrode are arranged in a horizontal structure will be described. In this case, a description overlapping with the above-described embodiment will be omitted or briefly described.

 9 is a cross-sectional view illustrating a semiconductor light emitting device according to a second exemplary embodiment of the present invention.

Referring to FIG. 9, the semiconductor light emitting device may include a semiconductor layer 220 including an n-type layer 221, an active layer 222, and a p-type layer 223 sequentially formed on a substrate 210, and the n-type layer ( And an n-type electrode 230 formed in the exposed region of 221 and a p-type electrode 240 formed on the p-type layer 223. Here, at least one of the n-type electrode 230 and the p-type electrode 240 is a nano dot layer (231/241), a contact layer (232/242), a diffusion barrier layer 233/243 formed on the semiconductor layer 220 ) And a capping layer 234/244 and a multi-layered ohmic electrode in ohmic contact with the semiconductor layer 120.

A manufacturing process of a semiconductor light emitting device having such a configuration will be described below with reference to FIGS. 10 to 12. 10 to 12 are cross-sectional views illustrating a process of manufacturing a semiconductor light emitting device according to a second embodiment of the present invention.

Referring to FIG. 10, an n-type layer 221, an active layer 222, and a p-type layer 223 are stacked on the prepared substrate 210 to form a semiconductor layer 220 having a multilayer structure. As the substrate 210, a sapphire substrate, a silicon carbide substrate, a silicon substrate, a zinc oxide substrate, a gallium arsenide substrate, a gallium phosphide substrate, or the like may be used, and a sapphire substrate is particularly preferable.

As the semiconductor layer 220, it is preferable to use one of a Si film, a GaN film, an AlN film, an InGaN film, an AlGaN film, an AlInGaN film, and a film containing the same. In this embodiment, after depositing a GaN film, an n-type impurity is implanted to form an n-type layer 221, and a GaN film as a barrier layer and an InGaN film as a well layer are alternately deposited to form an active layer 222 having a multi-well structure. After the GaN film was deposited thereon, p-type impurities were implanted to form the p-type layer 223. Although not shown, a buffer layer may be additionally formed between the substrate 210 and the n-type layer 221, and the buffer layer may relieve stress due to lattice mismatch between the substrate 210 and the n-type layer 221. Helps the smooth growth of the n-type layer 221 to be formed.

Referring to FIG. 11, some regions of the p-type layer 223 and the active layer 222 are mesa-etched to expose some regions of the n-type layer 221 on which the n-type electrode 230 is to be formed. Subsequently, in order to improve the interfacial properties with the subsequent layer, it is preferable to perform surface treatment on the semiconductor layer 220. For example, in the present embodiment, the semiconductor surface, that is, the n-type layer 223, is immersed in an aqueous solution of aqua regia (HCl: H ₂ O = 3: 1) for about 10 minutes, washed with deionized water, and dried with nitrogen. After the first surface treatment, and soaked in a solution of hydrochloric acid (HCl) and deionized water 1: 1 for about 2 minutes before depositing the next layer, that is, n-type electrode 230 and p-type electrode 240 The secondary surface treatment is carried out by drying. Of course, such primary and secondary surface treatments can be selectively performed or omitted depending on the desired purpose.

Referring to FIG. 12, Ag nanoparticles made of nano-sized dots are formed by forming Ag thinly on the exposed n-type layer 221 and p-type layer 223 by about 5 to about 50 μs and then heat-treating in an atmosphere containing nitrogen. The dot layer 231/241 is formed. At this time, the Ag nano dot layer 231/241 is formed on the gallium polarity (Ga-face) of the n-type layer 221 and the p-type layer 223. Subsequently, the Ti contact layer 232/242, the Cr diffusion barrier layer 233/243, and the Au capping layer 234/244 are stacked on the Ag nano dot layer 231/241 and then patterned to form the Ag nano dot layer. The n-type electrode 230 and the p-type electrode 240 having a / Ti / Cr / Au structure are formed. In this case, the nano dot layer may be formed of at least one of Al and Au instead of Ag. Instead of Ti, at least one of Ti-Al alloy, Ti-Ni alloy, Ta, Al, W, W-Ti alloy is used, and instead of Cr, Ru, Pt, Ni, Pd, Ir, Rh, Nb At least one of the materials may be used, and Al described above may be used instead of Au.

Thereafter, after the formation of the n-type electrode 230 and the p-type electrode 240 to improve adhesion, ohmic characteristics and secure thermal reliability, heat treatment is performed in a range of 150 ° C. to 600 ° C. in an atmosphere containing nitrogen and oxygen. It is desirable to.

The ohmic electrodes 230/240 having the Ag nano dot layer / Ti / Cr / Au structure improve the charge injection characteristics of the Ag nano dot layer 231/241 to the semiconductor layer 220, and the Ti contact layer. Excellent thermal stability because (232/242) acts as a diffusion barrier between the n-type layer and the Cr / Au electrodes (233 / 243,234 / 244) to suppress deterioration due to heat generated under nitrogen atmosphere heat treatment and high temperature and high current injection conditions. . Therefore, the semiconductor light emitting device using the Ag nano dot layer / Ti / Cr / Au structured ohmic electrodes 230/240 has lower driving voltage characteristics and thermal stability is improved.

As mentioned above, although this invention was demonstrated with reference to the above-mentioned Example and an accompanying drawing, this invention is not limited to this, It is limited by the following claims. Therefore, it will be apparent to those skilled in the art that the present invention may be variously modified and modified without departing from the technical spirit of the following claims.

110, 210: base material substrate 170: support substrate
120 and 220: semiconductor layers 121 and 221: n-type layers
122, 222: active layer 123, 223: p-type layer
130, 240 p-type electrode 180, 230: n-type electrode

Claims (12)

A semiconductor layer having a light emitting structure;
An ohmic electrode having a nano dot layer, a contact layer, a diffusion barrier layer, and a capping layer formed on the semiconductor layer; Including,
The nano dot layer is formed on the nitrogen polarity surface of the semiconductor layer, is formed of at least one material of Ag, Al, Au,
The contact layer is formed of at least one of Ti, Ti-Al alloy, Ti-Ni alloy, Ta, Al, W, W-Ti alloy,
The diffusion barrier layer is formed of at least one metal layer of Cr, Ru, Pt, Ni, Pd, Ir, Rh, Nb, or at least one oxide layer of RuOx, NiOx, IrOx, RhOx, NbOx, TiOx, TaOx, CrOx,
The capping layer is a semiconductor light emitting device formed of at least one material of Au, Al. The method according to claim 1,
The nano dot layer is a semiconductor light emitting device consisting of nano-size Ag dots formed by depositing Ag and heat treatment in a nitrogen atmosphere. The method according to claim 1,
The nano dot layer is a semiconductor light emitting device formed to a thickness of 5 ~ 50Å. The method according to claim 1,
And the contact layer is formed of Ti, the diffusion barrier layer is formed of Cr, and the capping layer is formed of Au. The method according to claim 1,
The contact layer is a semiconductor light emitting device formed to a thickness of 1Å to 1000Å. The method according to claim 1,
The diffusion barrier layer is a semiconductor light emitting device formed to a thickness of 1000 ~ 3000Å. The method according to any one of claims 1 to 5,
The semiconductor layer includes an n-type layer, an active layer and a p-type layer,
And the ohmic electrode is formed on the nitrogen polarity surface of the n-type layer. Forming a semiconductor layer having a light emitting structure;
Forming a nano dot layer on the nitrogen polarity surface of the semiconductor layer; And
Forming an ohmic electrode having a contact layer, a diffusion barrier layer, and a capping layer on the nano dot layer; Including,
The nano dot layer is formed of at least one material of Ag, Al, Au,
The contact layer is formed of at least one of Ti, Ti-Al alloy, Ti-Ni alloy, Ta, Al, W, W-Ti alloy,
The diffusion barrier layer is formed of at least one metal layer of Cr, Ru, Pt, Ni, Pd, Ir, Rh, Nb, or at least one oxide layer of RuOx, NiOx, IrOx, RhOx, NbOx, TiOx, TaOx, CrOx,
The capping layer is a method of manufacturing a semiconductor light emitting device formed of at least one material of Au, Al. The method according to claim 8,
The nano dot layer is a method of manufacturing a semiconductor light emitting device is formed by depositing Ag on the nitrogen polar surface of the semiconductor layer and then heat-treating it in a nitrogen atmosphere. The method according to claim 8,
And the contact layer is formed of Ti, the diffusion barrier layer is formed of Cr, and the capping layer is formed of Au. The method according to claim 8,
Performing surface treatment on the semiconductor layer before forming the ohmic electrode; Method of manufacturing a semiconductor light emitting device further comprising. The method of claim 11,
The surface treatment step,
Dipping the semiconductor surface in an aqueous solution of aqua regia and washing with deionized water;
Drying the semiconductor surface with nitrogen; Method for manufacturing a semiconductor light emitting device comprising a.

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