KR20110079328A - Image sensor and manufacturing method of image sensor - Google Patents

Abstract

PURPOSE: An image sensor and a method for manufacturing the image sensor are provided to maximize an area of a photodiode and a transistor though a pixel area is reduced according as a unit pixel is minimized and highly integrated for high resolution. CONSTITUTION: An active layer(110) is formed on an upper part of a semiconductor substrate. An element isolation film(105) defining an active area is formed on the active layer. The first isolation layer(111) is formed at a lower part of the element isolation film. The second isolation layer(112) is formed on a total area of the semiconductor substrate under the first isolation layer. The photodiode is formed on the semiconductor substrate area surrounded by the first isolation layer, the second isolation layer and the active layer. Source areas and drain areas of transistors are formed. A plug layer connected to the photodiode is formed on a part of the source area between a gate of a transfer transistor and the element isolation film.

Description

Image sensor and manufacturing method of image sensor

Embodiments relate to an image sensor and a method for manufacturing the image sensor.

1 is an equivalent circuit diagram of a unit pixel of a 4T (transistor) image sensor.

As shown in FIG. 1, the unit pixel of the 4T image sensor includes four transistors RX, DX, and SX and one photodiode PD.

The photodiode PD performs a photoelectric conversion function, the floating diffusion region FD stores an electrical signal of the photodiode FD, and the transfer transistor TX performs a floating diffusion. The photodiode PD may be reset by transferring a voltage of the region FD, or a switching function of transferring an electrical signal of the photodiode PD to the floating diffusion region FD.

The detection transistor DX amplifies the electrical signal in the floating diffusion region FD, and the select transistor SX selectively transmits the amplified signal to the output terminal Vout. The reset transistor RX receives a voltage from the voltage terminal PVDD, transfers the voltage to the photodiode PD through the floating diffusion region FD, and initializes the photodiode PD.

FIG. 2 is a top view of the unit pixel of the 4T image sensor, and FIG. 3 is a side cross-sectional view of the unit pixel of the 4T image sensor based on the display line A-A 'of FIG. 3.

As shown in FIG. 2, an active region a having a "c" shape is formed from the photodiode PD region, and the transfer transistor TX, the reset transistor RX, and the detection transistor are sequentially formed from the photodiode PD side. (DX) and the gate of the select transistor SX are formed along the active region a.

Referring to FIG. 3, an isolation layer 11 is formed on a substrate 10, and a photodiode PD is formed on one side of the isolation layer 11. Gate insulating films 18, 12, 13, and 14 are formed next to the photodiode PD, and gates 19, 15, 16, and 17 are formed on the gate insulating films 18, 12, 13, and 14, respectively. The transistor TX, the reset transistor RX, the detection transistor DX, and the select transistor SX are formed in this order.

A floating diffusion region FD is formed between the transfer transistor TX and the reset transistor RX, and a pinning conductive layer 21 for reducing signal noise is formed on the photodiode PD.

In addition, a first insulating layer 20 is formed on the substrate 10 including the gates 19, 15, 16, and 17 and the photodiode PD, and the gates 19, 15, 16, and 17 and the gate 19 are formed. A plurality of contact plugs 22 are formed on the first insulating layer 20 to be connected to the active regions between the first and second insulating layers 15, 16, and 17. The metal layer 32 connected to the contact plug 22 is formed on the first insulating layer 20, and the second insulating layer 30 is formed thereon.

4 is a side cross-sectional view showing the structure of a 4T image sensor having a BSI (Back Side Illumination) structure.

After the process described with reference to FIG. 3, the second substrate (not shown) such as a silicon wafer or a glass substrate is adhered to the second insulating layer 30, and the bottom surface of the substrate 10 is facing upwards and the second substrate is bottomed. Turn the substrate 10 upside down.

The bottom surface of the substrate 10 is flattened to a predetermined thickness, for example, near the interface between the epi layer (not shown) and the substrate, and the protective layer 40 is formed on the bottom surface of the substrate 10.

Subsequently, the color filter layer 50 and the microlens 60 are sequentially formed on the protective layer 40.

Currently, the unit pixel of the image sensor is minimized and highly integrated for high resolution, and thus, the utilization efficiency of the pixel area should be increased.

However, the 4T image sensor of the BSI structure is limited because the transistor region and the photodiode region are formed on the same line, thereby limiting the unit pixel region. Accordingly, there is a problem that the amount of incident light is small and the transistor cannot be formed sufficiently large, so that the processing of the electrical signal becomes unstable.

The embodiment provides a method of manufacturing an image sensor and an image sensor having a BSI structure that can maximize the area of a photodiode and a transistor even if the area of a pixel area is reduced as the unit pixel of the image sensor is minimized and integrated for high resolution.

The image sensor according to the embodiment relates to an image sensor having a back side illumination (BSI) structure, comprising: an active layer formed on an upper surface of a semiconductor substrate; An isolation layer formed on the active layer to define an active region; A first isolation layer formed under at least a portion of the device isolation layer; A second isolation layer formed over the entire area of the semiconductor substrate under the first isolation layer; A photodiode formed in the semiconductor substrate region surrounded by the first isolation layer, the second isolation layer, and the active layer; A gate insulating film and a gate of a transfer transistor, a reset transistor, a detection transistor, and a select transistor formed on the active layer between the device isolation layers at predetermined intervals; Source and drain regions of the transistors; And a plug layer formed in a portion of a source region between the gate of the transfer transistor and the device isolation layer to be connected to the photodiode.

The method of manufacturing an image sensor according to the embodiment relates to a method of manufacturing an image sensor having a back side illumination (BSI) structure, and includes: forming an active layer on the semiconductor substrate and defining an active region on the active layer. Forming a; Forming a first isolation layer under at least a portion of the device isolation layer, and forming a second isolation layer in an entire region of the semiconductor substrate under the first isolation layer; Forming a photodiode in the semiconductor substrate region surrounded by the first isolation layer, the second isolation layer and the active layer; Forming a gate insulating film and a gate of a transfer transistor, a reset transistor, a detection transistor, and a select transistor spaced at a predetermined interval on the active layer between the device isolation layers; Forming a source region and a drain region of the transistors; And forming a plug layer connected to the photodiode in a portion of a source region between the gate of the transfer transistor and the device isolation layer.

According to the embodiment, the following effects are obtained.

First, as unit pixels of the image sensor are minimized and highly integrated for high resolution, the area of the photodiode and the transistor may be maximized even if the area of the pixel area is reduced.

Second, since the area of the photodiode in the BSI-structured image sensor can be maximized, the amount of light incident is increased and high resolution can be realized.

Third, in the BSI structure image sensor, the area of the transistor is maximized and the size limit of the transistor can be relaxed because it does not affect the optical path incident on the photodiode.

Fourth, since it is not necessary to form a pinning layer on the surface of the photodiode to minimize signal noise, the switching operation of the tracer transistor can be made easier.

With reference to the accompanying drawings, it will be described in detail with respect to the image sensor and the manufacturing method of the image sensor according to the embodiment.

Hereinafter, in describing the embodiments, detailed descriptions of related well-known functions or configurations are deemed to unnecessarily obscure the subject matter of the present invention, and thus only the essential components directly related to the technical spirit of the present invention will be referred to. .

In the description of an embodiment according to the present invention, each layer (film), region, pattern or structure may be "on" or "under" the substrate, each layer (film), region, pad or pattern. "On" and "under" include both "directly" or "indirectly" formed through another layer, as described in do. Also, the criteria for top, bottom, or bottom of each layer will be described with reference to the drawings.

5 is a top view schematically illustrating a configuration of an image sensor according to an embodiment.

Hereinafter, the image sensor according to the embodiment is assumed to be a 4-T (Transistor) image sensor having a BSI structure.

The equivalent circuit of the image sensor according to the embodiment is the same as that of FIG. 1, and referring to FIGS. 1 and 5, the gate 142 of the gate 142 of the reset transistor RX and the gate of the transfer transistor TX The photodiode 120 is reset by applying and blocking the voltage of 141.

When the signal of the photodiode 120 is read, the voltage of the gate 141 of the transfer transistor TX is applied and cut off while the voltage of the gate 142 of the reset transistor RX is cut off. The signal of the photodiode 120 is transmitted to the detection transistor DX and the select transistor SX.

Referring to FIG. 5, it can be seen that the photodiode 120 is widely formed under the semiconductor substrate 100, and the active layer 110 is formed in a “b” shape thereon.

One side of the active layer 110 is connected to the lower photodiode 120 through a plug layer 151, and from the plug layer 151 along the active layer 110 to the transfer transistor TX. A gate 141, a gate 142 of the reset transistor RX, a gate 143 of the detection transistor DX, and a gate 144 of the select transistor SX are sequentially formed.

The active layer 110 is defined by an isolation layer 105 (see FIG. 6) formed on the semiconductor substrate 100 on the photodiode 120.

The structure of the image sensor according to the embodiment of such a structure will be described in more detail with reference to FIGS. 6 and 7.

FIG. 6 is a side cross-sectional view schematically illustrating a configuration of an image sensor based on the display line A-A 'of FIG. 5.

Referring to FIG. 6, an active layer 110, such as an epi layer or a single crystal layer of SOI, is formed on an upper surface of a semiconductor substrate 100 such as a low resistance semiconductor layer or a silicon on insulator (SOI). An isolation layer 105 defining an active region is formed on the layer 110.

In addition, by implanting the same conductivity type impurities as the active layer 110 at a higher concentration than the active layer 110, the first isolation layer 111 is deeply formed under at least a portion of the device isolation layer 105. The second isolation layer 112 having a predetermined thickness is formed on the entire area of the semiconductor substrate 100 under the isolation layer 111.

The first isolation layer 111 and the second isolation layer 112 may be formed by the same photo process, ion implantation process, photoresist pattern removal process, or different processes.

Subsequently, the photodiode 120 is formed through an ion implantation process in the region of the semiconductor substrate 100 surrounded by the first isolation layer 111, the second isolation layer 112, and the active layer 110.

Thereafter, a third isolation layer 113 is formed at an interface between the photodiode 120 and the active layer 110.

Similar to the first isolation layer 111 and the second isolation layer 112, the third isolation layer 113 has the same conductivity type impurity as the active layer 110, and has a higher concentration than the active layer 110. It can be formed by ion implantation.

The first isolation layer 111, the second isolation layer 112, and the third isolation layer 113 function to electrically isolate the photodiode 120.

Thereafter, four gate insulating layers 131, 132, 133, and 134 are formed on the active layer 110 between the device isolation layers 105 at predetermined intervals, and the gate insulating layers 131, 132, 133, and 134 are formed. By forming the gates 141, 142, 143, and 144 on the upper side of the circuit), the transfer transistor TX, the reset transistor RX, the detection transistor DX, and the select transistor SX are formed from the left side.

Subsequently, ions are implanted into the active layer 110 between the transistors TX, RX, DX, and SX to form source and drain regions of the transistors TX, RX, DX, and SX.

In this case, the source / drain region between the transfer transistor TX and the reset transistor RX functions as a floating diffusion region FD.

The source region and the drain region may be formed by doping conductive impurity ions opposite to the active layer 110.

Next, a portion of a region between the gate 141 of the transfer transistor TX and the device isolation layer 105, that is, a portion of the source region of the transfer transistor TX is doped with ions to be connected to the photodiode 120. The plug layer 151 is formed.

The plug layer 151 may be formed by implanting the same conductivity type impurity ions as the source region of the transfer transistor TX at a high concentration.

Subsequently, a first insulating layer 160 is formed on the semiconductor substrate 100 including the gates 141, 142, 143, and 144, and the gates 141, 142, 143, and 144 and the gates are formed. A plurality of contact plugs 162 connected to the source / drain regions of 141, 142, 143, and 144 are formed on the first insulating layer 160.

A metal layer 172 connected to the contact plug 162 is formed on the first insulating layer 160, and a second insulating layer 170 is formed thereon.

7 is a side cross-sectional view schematically illustrating a form in which an image sensor according to the embodiment is completed with a BSI structure.

After the process described with reference to FIG. 6, the second substrate 180, such as a silicon wafer or a glass substrate, is adhered to the second insulating layer 170, and the bottom surface of the semiconductor substrate 100 faces upwards. The semiconductor substrate 100 is turned upside down with the substrate 180 facing downward.

Subsequently, the bottom surface of the semiconductor substrate 100 is flattened to a predetermined thickness, for example, to the vicinity of the second isolation layer 112, and a protective layer 180 is formed on the bottom surface of the inverted semiconductor substrate 100.

Subsequently, the color filter layer 190 and the microlens 200 are sequentially formed on the passivation layer 180.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, It will be understood that various modifications and applications other than those described above are possible. For example, each component specifically shown in the embodiment of the present invention can be modified. And differences relating to such modifications and applications will have to be construed as being included in the scope of the invention defined in the appended claims.

1 is an equivalent circuit diagram of a unit pixel of a 4T (transistor) image sensor.

2 is a top view of a unit pixel of a 4T image sensor.

3 is a side cross-sectional view of a unit pixel of a 4T image sensor based on the display line A-A 'of FIG.

4 is a side cross-sectional view showing the structure of a 4T image sensor of a BSI structure.

5 is a top view schematically illustrating a configuration of an image sensor according to an embodiment.

6 is a side cross-sectional view schematically illustrating a configuration of an image sensor based on the display line A-A 'of FIG. 5.

7 is a side cross-sectional view schematically illustrating a form in which an image sensor according to the embodiment is completed with a BSI structure;

Claims (16)

In the manufacturing method of the image sensor of the back side illumination (BSI) structure, Forming an active layer on the semiconductor substrate, and forming an isolation layer defining an active region on the active layer; Forming a first isolation layer under at least a portion of the device isolation layer, and forming a second isolation layer in an entire region of the semiconductor substrate under the first isolation layer; Forming a photodiode in the semiconductor substrate region surrounded by the first isolation layer, the second isolation layer and the active layer; Forming a gate insulating film and a gate of a transfer transistor, a reset transistor, a detection transistor, and a select transistor spaced at a predetermined interval on the active layer between the device isolation layers; Forming a source region and a drain region of the transistors; And And forming a plug layer connected to the photodiode in a portion of a source region between the gate of the transfer transistor and the device isolation layer. The method of claim 1, wherein after the second isolation layer is formed, And forming a third isolation layer at an interface between the photodiode and the active layer. The method of claim 1, The semiconductor substrate includes a low resistance semiconductor layer or a silicon on insulator (SOI), The active layer comprises an epi layer or a single crystal layer of SOI. The method of claim 2, At least one layer of the first isolation layer, the second isolation layer, and the third isolation layer may be formed by ion implantation of the same conductivity type impurity as the active layer at a higher concentration than the active layer. . The method of claim 1, And the source region and the drain region are formed by doping conductive impurity ions opposite to the active layer. The method of claim 1, And the plug layer is formed by implanting the same conductivity type impurity ions as the source region of the transfer transistor at a high concentration. The method of claim 1, Forming a first insulating layer on the semiconductor substrate including the gate; Forming a plurality of contact plugs connected to the gate, the source region and the drain region on the first insulating layer; And And forming a metal layer connected to the contact plug on the first insulating layer, and forming a second insulating layer thereon. The method of claim 7, wherein Adhering a second substrate on the second insulating layer; Inverting the semiconductor substrate with the bottom facing upwards, and flattening the bottom of the semiconductor substrate to a predetermined thickness; Forming a protective layer on a bottom surface of the inverted semiconductor substrate; And And sequentially forming a color filter layer and a micro lens on the protective layer. In the image sensor of the back side illumination (BSI) structure, An active layer formed on the semiconductor substrate; An isolation layer formed on the active layer to define an active region; A first isolation layer formed under at least a portion of the device isolation layer; A second isolation layer formed over the entire area of the semiconductor substrate under the first isolation layer; A photodiode formed in the semiconductor substrate region surrounded by the first isolation layer, the second isolation layer, and the active layer; A gate insulating film and a gate of a transfer transistor, a reset transistor, a detection transistor, and a select transistor formed on the active layer between the device isolation layers at predetermined intervals; Source and drain regions of the transistors; And And a plug layer formed on a portion of a source region between the gate of the transfer transistor and the device isolation layer and connected to the photodiode. 10. The method of claim 9, And a third isolation layer formed at an interface between the photodiode and the active layer. 10. The method of claim 9, The semiconductor substrate includes a low resistance semiconductor layer or a silicon on insulator (SOI), The active layer comprises an epi layer or a single crystal layer of SOI. The method of claim 10, The at least one layer of the first isolation layer, the second isolation layer, and the third isolation layer includes the same conductivity type impurity as the active layer. 10. The method of claim 9, And the source region and the drain region include conductive impurity ions opposite to the active layer. 10. The method of claim 9, And the plug layer includes the same conductive impurity ions as the source region of the transfer transistor. 10. The method of claim 9, A first insulating layer formed on the semiconductor substrate including the gate; A plurality of contact plugs connected to the gate, the source region and the drain region and formed on the first insulating layer; A metal layer formed on the first insulating layer and connected to the contact plug; And And a second insulating layer formed on the metal layer and the first insulating layer. The method of claim 15, A second substrate formed on the second insulating layer; A protective layer formed on the bottom surface of the semiconductor substrate turned upside down; And An image sensor comprising a color filter layer and a micro lens sequentially formed on the protective layer.

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