KR100720507B1 - Transistor and method for manufacturing the same in CMOS image sensor - Google Patents

Abstract

The present invention relates to a transistor of a CMOS image sensor which prevents punch through by implanting P-type impurities into an N-type diffusion region of a reset transistor, and a method of manufacturing the same. A unit pixel of a CMOS image sensor comprising a sensing element, a reset transistor, a drive transistor, and a select transistor, the reset transistor comprising: a gate electrode; And an N-type diffusion region formed on the semiconductor substrate on both sides of the gate electrode, and a P-type diffusion region below the N-type diffusion region on one side of the gate electrode.

CMOS image sensor, punch-through, indium

Description

Transistor of CMOS image sensor and its manufacturing method {Transistor and method for manufacturing the same in CMOS image sensor}

1 is a layout of a unit pixel circuit of a CMOS image sensor composed of three transistors and a photosensitive device according to the related art.

FIG. 2 is a cross-sectional view taken along line AA ′ of the layout of a pixel circuit of a CMOS image sensor including three transistors and a photosensitive device of the prior art of FIG. 1;

3 is a unit pixel circuit of a CMOS image sensor composed of three transistors and a photosensitive device of the prior art of FIG.

4 is a layout of a unit pixel circuit of a CMOS image sensor composed of three transistors and a photosensitive device according to the present invention.

5 is a cross-sectional view taken along line AA of a unit pixel circuit of a CMOS image sensor including three transistors and a photosensitive device according to the present invention.

6 is a layout of a unit pixel circuit of a CMOS image sensor composed of four transistors and a photosensitive device according to the present invention.

FIG. 7 is a cross-sectional view taken along line AA ′ of a unit pixel circuit of a CMOS image sensor including four transistors and a photosensitive device according to the present invention.

Explanation of symbols for the main parts of the drawings

20: photosensitive device 21: reset transistor

22: drive transistor 23: select transistor

24 gate electrode 25 P-type diffusion region

32: low concentration N-type diffusion region 33: high concentration N-type diffusion region

35: spacer

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transistor of a CMOS image sensor and a method of manufacturing the same, and more particularly to a transistor of a CMOS image sensor in which P-type impurities are implanted into an N-type diffusion region of a reset transistor to prevent punch through. It relates to a manufacturing method thereof.

In general, an image sensor is a semiconductor device that converts an optical image into an electrical signal, and charge carriers are stored in the capacitor while individual metal-oxide-silicon (MOS) capacitors are located in close proximity to each other. By using CMOS technology, which uses a charge coupled device (CCD), a control circuit, and a signal processing circuit, which are transferred to peripheral circuits, MOS transistors are made by the number of pixels. There is a complementary MOS (CMOS) image sensor that employs a switching method that sequentially detects the output using this.

The CMOS image sensor, which converts the information of the subject into an electrical signal, is composed of signal processing chips containing a photodiode, and an amplifier, an analog / digital converter, and an internal voltage are included in one chip. Generators such as internal voltage generators, timing generators, and digital logic can also be combined, which greatly reduces space, power, and cost. Although double-coupled devices (CCDs) are manufactured through specialized processes, CMOS image sensors can be mass-produced through etching processes of silicon wafers, which are less expensive than double-coupled devices.

However, in CMOS image sensors, leakage current is a major cause of dark current or noise.

Hereinafter, the transistor of the CMOS image sensor of the related art will be described in detail with reference to the accompanying drawings.

1 is a layout of a unit pixel circuit of a CMOS image sensor composed of three transistors and a photosensitive device according to the prior art.

 As shown in FIG. 1, a photosensitive device 10 that receives light to generate photocharges, and a reset transistor that resets the photocharges generated by the photosensitive device 10 by receiving an Rx signal to a gate electrode. (reset transistor) 11, a drive transistor (12) acting as a source follower buffer amplifier by receiving the Dx signal to the gate, and a select transistor (addressing) (select transistor) 13. In addition, an STI 14 is formed to isolate the devices.

FIG. 2 is a cross-sectional view taken along line AA ′ of the layout of a pixel circuit of a CMOS image sensor including three transistors and a photosensitive device according to the related art of FIG. 1.

As shown in FIG. 2, a low-concentration P-type epitaxial layer 15 is grown on a high-concentration P-type substrate (not shown), and a gate insulating film 16 and a gate insulating film of a reset transistor are formed on the epitaxial layer 15. The gate electrode 17 is formed on the 16.

In addition, spacers 18 are formed on both side surfaces of the gate electrode 17, and a low concentration N-type diffusion region 20 and a gate electrode 17 are formed on the epi layer 15 under the spacer 18. High concentration N-type diffusion regions 19 are formed in the epitaxial layers 15 on both sides.

3 is a unit pixel circuit of a CMOS image sensor including three transistors and a photosensitive device according to the related art of FIG. 1.

As shown in FIG. 3, a reset transistor 11 for resetting the photocharge generated by the photosensitive device 10 by receiving the Rx signal to the photosensitive device 10 and the gate electrode; A driver transistor 12 acts as a source follower buffer amplifier by receiving a Dx signal to the gate, and a select transistor 13 serving as an addressing function. do.

The transistor of the CMOS image sensor of the prior art as described above has the following problems.

That is, in order to increase the output of the CMOS image sensor, the threshold voltage of the reset transistor should be lowered. However, when the threshold voltage is excessively low, punch through occurs in the reset transistor.

 The present invention is to solve the conventional problem as described above, the transistor of the CMOS image sensor to prevent the punch-through by forming a P-type diffusion region in the high concentration N-type diffusion region on one side or both sides of the reset transistor gate electrode and Its purpose is to provide a method for its manufacture.

The transistor of the CMOS image sensor according to the present invention for achieving the above object is a unit pixel of the CMOS image sensor consisting of a light sensing element, a reset transistor, a drive transistor, a select transistor, the reset transistor is a gate electrode and And an N-type diffusion region formed in a surface of the semiconductor substrate on both sides of the gate electrode, and a P-type diffusion region formed under the N-type diffusion region on one side of the gate electrode.

In the transistor of the CMOS image sensor according to the present invention, the N-type diffusion region includes the low concentration N-type diffusion region and the high concentration N-type diffusion region, and the P-type diffusion region includes the low-concentration N-type diffusion region. It is characterized by being formed surrounding the high concentration N-type diffusion region.

In the transistor of the CMOS image sensor according to the present invention, the P-type diffusion region is formed by ion implantation of indium.

The transistor of the CMOS image sensor according to the present invention for achieving the above object is a unit pixel of the CMOS image sensor consisting of a light sensing element, a transfer transistor, a reset transistor, a drive transistor, a select transistor, the reset transistor is And an N-type diffusion region formed in the surface of the semiconductor substrate on both sides of the gate electrode, and a P-type diffusion region formed under the N-type diffusion region on both sides of the gate electrode.

The transistor manufacturing method of the CMOS image sensor for achieving the above object is a unit pixel of the CMOS image sensor consisting of a light sensing element, a reset transistor, a drive transistor, a select transistor, the reset transistor is a gate on a semiconductor substrate Forming an electrode, forming an N-type diffusion region in a semiconductor substrate surface on both sides of the gate electrode, and forming a P-type diffusion region in the semiconductor substrate under the N-type diffusion region on one side of the gate electrode. It characterized in that it comprises a.

The transistor manufacturing method of the CMOS image sensor for achieving the above object is a unit pixel of the CMOS image sensor consisting of a light sensing element, a transfer transistor, a reset transistor, a drive transistor, a select transistor, wherein the reset transistor is a semiconductor Forming a gate electrode on a substrate, forming an N-type diffusion region in a surface of the semiconductor substrate on both sides of the gate electrode, and forming a P-type diffusion region under the N-type diffusion region on both sides of the gate electrode. Characterized by comprising a step.

In addition, in the transistor manufacturing method of the CMOS image sensor according to the present invention, the P-type diffusion region is characterized in that injecting the indium at an injection angle of 20 ~ 40 °.

Hereinafter, a reset transistor and a method of manufacturing the CMOS image sensor according to the present invention will be described in detail with reference to the accompanying drawings.

4 is a layout of a unit pixel circuit of a CMOS image sensor composed of three transistors and a photosensitive device according to the present invention.

 As shown in FIG. 4, a photosensitive device 20 that receives light to generate photocharges, and a reset transistor configured to reset the photocharges generated by the photosensitive device 20 by receiving an Rx signal to a gate electrode. (reset transistor) 21, a drive transistor (22) serving as a source follower buffer amplifier by receiving the Dx signal to the gate, and a select transistor (addressing) (select transistor) 23.

Here, the P-type diffusion region 25 in which indium ions are implanted is formed in the high concentration N-type diffusion region 33 on one side of the gate electrode 24 of the reset transistor 21.

In the CMOS image sensor having three transistors, the P-type diffusion region 25 is not formed in the portion connected to the photosensitive device 20, and the high concentration N-type diffusion region of the reset transistor 24 and the drive transistor 22 ( 33).

5 is a cross-sectional view taken along line AA ′ of a unit pixel circuit of a CMOS image sensor including three transistors and a photosensitive device according to the present invention.

As shown in FIG. 5, a low-concentration P-type epitaxial layer 30 is grown on a high-concentration P-type substrate (not shown), and the gate electrode is interposed on the epitaxial layer 30 via a gate insulating film 31 of a reset transistor. To form (24).

Subsequently, spacers 35 are formed on both side surfaces of the gate electrode 24, and a low concentration N-type diffusion region 32 and a gate electrode 24 are formed in the epi layer 30 on the lower surface of the spacer 35. A high concentration N type diffusion region 33 is formed in the epi layer 30 on both sides.

Indium ions are implanted into the epitaxial layer 30 on the lower surface of the highly concentrated N-type diffusion region 33 on one side of the gate electrode 24 to form the P-type diffusion region 25.

Herein, when the indium ions are implanted, the thickness of the photoresist mask (not shown) is 5000 to 20000 mm, and the inclination angle of the ion implantation is 20 to 40 ° so that the high concentration N type diffusion region 33 and the low concentration N type are used. The P-type diffusion region 25 is formed to surround the diffusion region 32.

6 is a layout of a unit pixel circuit of a CMOS image sensor composed of four transistors and a photosensitive device according to the present invention.

As shown in FIG. 6, the photosensitive device 50 receives light to generate photocharges, and a transfer transistor for transporting the photocharges collected from the photosensitive device 50 by receiving a Tx signal to a gate ( 51), a reset transistor 52 for applying the Rx signal to the gate to reset the photocharges, and a source follower buffer amplifier for receiving the Dx signal to the gate. Driver transistor 53 and a select transistor 54 serving as an addressing function.

Indium ions are implanted into the high concentration N-type diffusion region 56 on both sides of the gate electrode 55 of the reset transistor 52 to form the P-type diffusion region 57.

In the CMOS image sensor having four transistors, the P-type diffusion region 57 is a high concentration N-type diffusion region 56 connected to the transfer transistor 51 and the drive transistor 53. 55) are formed to be symmetrical in between.

FIG. 7 is a cross-sectional view taken along line AA ′ of a unit pixel circuit of a CMOS image sensor including four transistors and a photosensitive device of FIG. 6.

As shown in FIG. 7, a low concentration P-type epitaxial layer 60 is grown on a high concentration P-type substrate (not shown), and the gate electrode is interposed on the epitaxial layer 60 via a gate insulating film 61 of a reset transistor. Form 55.

Subsequently, spacers 62 are formed on both side surfaces of the gate electrode 55, and a low concentration N-type diffusion region 63 and a gate electrode 55 are formed on the epi layer 60 under the spacer 62. A high concentration N type diffusion region 56 is formed in the epi layer 60 on both sides.

Indium ions are implanted into the epitaxial layer 60 on both sides of the gate electrode 55 to form a P-type diffusion region 57.

Here, when the indium ions are implanted, the thickness of the photoresist mask (not shown) is 5000 to 20000 mm, and the inclination angle of the ion implantation is 20 to 40 °, with a high concentration N type diffusion region 33 and a low concentration N type diffusion. The P type diffusion region 25 is formed to surround the region 32.

 Those skilled in the art will appreciate that various changes and modifications can be made without departing from the spirit of the present invention.

Therefore, the technical scope of the present invention should not be limited to the contents described in the embodiments, but should be defined by the claims.

Such a transistor of the CMOS image sensor and a method of manufacturing the same according to the present invention has the following effects.

That is, in the reset transistor of the CMOS image sensor, while the threshold voltage is minimized, the bottom surface of the N-type diffusion region may be wrapped in the P-type diffusion region to prevent punch-through to improve device characteristics.

Claims (7)

In a unit pixel of a CMOS image sensor composed of a light sensing element, a reset transistor, a drive transistor, and a select transistor, The reset transistor A gate electrode, An N-type diffusion region formed in a surface of the semiconductor substrate on both sides of the gate electrode; And a P-type diffusion region formed under the N-type diffusion region on one side of the gate electrode to surround the N-type diffusion region. delete The transistor of claim 1, wherein the P-type diffusion region is formed by implanting indium ions. In the unit pixel of the CMOS image sensor composed of a light sensing element, a transfer transistor, a reset transistor, a drive transistor, a select transistor, The reset transistor A gate electrode, An N-type diffusion region formed in a surface of the semiconductor substrate on both sides of the gate electrode; And a P-type diffusion region formed to surround the N-type diffusion region on both sides of the gate electrode. In a unit pixel of a CMOS image sensor composed of a light sensing element, a reset transistor, a drive transistor, and a select transistor, The reset transistor Forming a gate electrode on the semiconductor substrate; Forming an N-type diffusion region in a surface of the semiconductor substrate on both sides of the gate electrode; And forming a P-type diffusion region in the semiconductor substrate so as to surround the N-type diffusion region on one side of the gate electrode. In the unit pixel of the CMOS image sensor composed of a light sensing element, a transfer transistor, a reset transistor, a drive transistor, a select transistor, The reset transistor Forming a gate electrode on the semiconductor substrate; Forming an N-type diffusion region in a surface of the semiconductor substrate on both sides of the gate electrode; And forming a P-type diffusion region so as to surround the N-type diffusion region on both sides of the gate electrode. The method of claim 6, wherein the P-type diffusion region is formed by implanting indium ions at an implantation angle of 20 to 40 degrees.

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