KR20110078503A - Display panel and display apparatus having the same - Google Patents

Abstract

PURPOSE: A display panel and a display device including the same are provided to improve image quality by enhancing an aperture of a display panel. CONSTITUTION: A plurality of pixels(PX11) include a micro shutter(MS) and are divided into a plurality of groups. A plurality of first electrodes face each micro shutter of pixels which belong to corresponding groups. A plurality of second electrodes are overlapped with one end of the first electrode. An insulation layer electrically insulates the first electrodes from the second electrodes and the micro shutters.

Description

Display panel and display device having same {DISPLAY PANEL AND DISPLAY APPARATUS HAVING THE SAME}

The present invention relates to a display panel and a display device having the same, and more particularly, to a display panel using a micro shutter and a display device having the same.

One of the technologies emerging in the display device is a micro-shutter display device using a microshutter, which is a kind of microelectromechanical systems (MEMS). The micro shutter has a property of being deformed by an electrostatic force depending on whether an electric field is applied. The micro shutter display device directly transmits or blocks light by using the deformation characteristic of the micro shutter. However, since the micro-shutter display device displays an image using a mechanical component integrated on a substrate, it is necessary to improve the integration technology to prevent deterioration of image quality.

Accordingly, an object of the present invention is to provide a display panel for improving the image quality by improving the aperture ratio.

Another object of the present invention is to provide a display device having the display panel.

The display panel according to an exemplary embodiment of the present invention includes a plurality of pixels, a plurality of first electrodes, a plurality of second electrodes, and an insulating layer.

Each of the plurality of pixels includes a micro shutter and is divided into a plurality of groups.

Each of the plurality of first electrodes is formed to face each micro shutter of pixels belonging to a corresponding group.

Each of the plurality of second electrodes overlaps one end of a corresponding first electrode of the first electrodes.

The insulating layer electrically insulates the first electrodes from the second electrodes and the micro shutters.

A display device according to an embodiment of the present invention includes a timing controller, a data driver, a gate driver, and a display panel.

The timing controller receives a signal from an external source and outputs an image signal, a data control signal, and a gate control signal.

The data driver receives the video signal and the data control signal and outputs a data signal.

The gate driver receives the gate signal and outputs a gate signal.

The display panel displays an image in response to the gate signal and the data signal.

The display panel includes a plurality of gate lines for receiving the gate signal, a plurality of data lines for receiving the data signal, a plurality of pixels each including a micro shutter, and divided into a plurality of preset groups. A plurality of first electrodes formed to face microshutters of pixels belonging to a corresponding group, a plurality of second electrodes overlapping one end of each of the first electrodes, and the first electrodes of the second electrodes and the And an insulating layer that electrically insulates the microshutters.

According to such a display panel and a display device having the same, since a group of pixels share the first electrode and the second electrode, the area in which the second electrode is independent of light transmission and shielding is reduced. Therefore, the aperture ratio of the display panel is improved to improve image quality and to reduce power consumption.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

The drawings referred to for the embodiments herein are not intended to be limited to the forms shown, but are intended to include all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the claims. In addition, in the drawings, the scales of some components may be exaggerated or reduced in order to clearly express various layers and regions. Like reference numerals refer to like elements throughout.

1 is a block diagram of a display device 100 according to an exemplary embodiment of the present invention. For simplicity, reference numbers described herein, for example PX (n, m), are abbreviated to PXnm.

Referring to FIG. 1, the display device 100 includes a display panel 110, a data driver 120, and a gate driver 130.

The display panel 110 includes first to mth data lines DL1 to DLm, first to mth gate lines GL1 to GLm + n-1, and eleventh to nmnm pixels. (PX11-PXnm) is included. Here, n and m are integers of 2 or more.

The data lines DL1 to DLm extend in the vertical direction of the display panel 110, and the data lines DL1 to DLm are connected to the data driver 120 to form the pixels PX11 to PXnm. Transmits a data signal.

The gate lines GL1 ˜GLm + n−1 extend in a diagonal direction downward to the right of the display panel 110. The gate lines GL1 to GLm + n-1 are connected to the gate driver 130 to transmit gate signals to the pixels PX11 to PXnm. do. Each of the pixels PX11 to PXnm includes a micro shutter (not shown) and is arranged in a matrix form of n rows and m columns on the display panel 100.

The data driver 120 receives an image signal RGB and a data control signal DCS from an external device (not shown), and corresponds to the image signal RGB in response to the data control signal DCS. The gray voltages are selected and the selected gray voltages are applied to the data lines DL1 to DLm of the display panel 110 as data signals.

The gate driver 130 receives a gate control signal GCS from an external device (not shown), and sequentially gates the gate signals to the gate lines GL1 to GLm + n−1 of the display panel 110. Output

In the display device 100 of FIG. 1, there may be various methods of driving m * n pixels during one frame time T. FIG. One method is to drive the gate lines sequentially for T / (m + n-1) time. Another method is to drive at least two gate lines which are m when the number of connected pixels among the gate lines GL1 to GLm + n-1 are added at the same time to simultaneously drive m pixels for 1 / n frame time. To drive.

The second method will be described in detail with reference to FIG. 1, where m is the number of pixels connected to the first gate line GL1 and the (m + 1) th gate line GLm + 1. Therefore, the pixels connected to the first gate line GL1 and the (m + 1) th gate line GLm + 1 may be simultaneously driven. In addition, the number of pixels connected to the (m-1) th gate line GLm-1 and the (m + n-1) th gate line GLm + n-1 is m. Accordingly, the pixels connected to the (m-1) th gate line GLm-1 and the (m + n-1) th gate line GLm + n-1 may be simultaneously driven. For example, the pixels connected to the first gate line GL1 and the (m + 1) th gate line GLm + 1 are simultaneously driven for 0 to T / n time within one frame time T. The pixels connected to the second gate line GL2 and the (m + 2) th gate line GL (m + 2) are simultaneously driven during the next T / n to 2T / n times. Since the m th gate line GLm is connected to m pixels, only the pixels connected to the m th gate line GLm are simultaneously driven for the T / n time. When sequentially driven in this manner, m pixels may be simultaneously driven for a T / n time, thereby driving the pixels PX11 to PXnm of the display apparatus 100 once for one frame time T. .

The configuration of the display panel 100 illustrated in FIG. 1 is only an example, and a connection type and a driving method may vary depending on the number of pixels arranged. In addition, in FIG. 1, the gate lines GL1 to GLm + n−1 are connected in a right downward direction, but may be connected in a right upward direction according to an embodiment.

FIG. 2 is an equivalent circuit diagram of the eleventh pixel PX11 among the pixels PX11 to PXnm illustrated in FIG. 1.

Referring to FIG. 2, the eleventh pixel PX11 includes a transistor Tr and a micro shutter MS.

The transistor Tr includes a gate electrode connected to the m th gate line GLm, a source electrode connected to the first data line DL1, and a drain electrode connected to the micro shutter MS.

One end of the micro shutter (MS) is connected to the drain electrode of the transistor, and receives the signal output from the drain electrode to perform the opening and closing operation.

3 is a cross-sectional view of the display device 100 of FIG. 1 taken along the line II ′. In FIG. 3, all pixels arranged in each row are set as a group, but all pixels arranged in each column may be set as a group. Therefore, the number of pixels constituting a group and a method of selecting pixels constituting a group may vary according to embodiments.

Referring to FIG. 3, the display device 100 includes a first electrode 210, an insulating layer 220, a second electrode 230, and first to mth microshutters MS1 to MSm.

The first electrode 210 is positioned below the second electrode 230 and the first to m th microshutters MS1 to MSm, and is electrically insulated from the outside by an insulator. The first electrode 210 is formed of a transparent material to transmit light from a light source (not shown) disposed adjacent to the bottom.

The insulating layer 220 is formed on the first electrode 210 to electrically insulate the first electrode 210 from the second electrode 230 and the micro shutters MS1 to MSm.

The second electrode 230 is formed to overlap a portion of the first electrode 210 on the insulating layer 220, and receives a common voltage Vcom from an external device (not shown). Although not shown in the drawing, the second electrode 230 is spaced apart from the first electrode 210 so as not to be electrically connected to the first electrode 210 so as to overlap a portion of the first electrode 210. It may be formed under the first electrode 210.

Each of the first to mth microshutters MS1 to MSm includes three submicroshutters sequentially arranged on the insulating layer 220. Referring to FIG. 3, the sub micro shutters included in the first to m th micro shutters MS1 to MSm are referred to as eleventh to m3 sub micro shutters SMS11 to SMSm3. The eleventh to m1 sub-micro shutters SMS11 to SMSm1 are connected to drain electrodes of transistors of the eleventh to first m pixels PX11 to PX1m, respectively, to respectively transmit data signals DS1 to DSm. Get input.

In FIG. 3, the micro shutters MS1 to MSm include three sub-micro shutters, but may include more micro shutters having different sizes and shapes according to embodiments. In FIG. 3, each of the micro shutters MS1 to MSm defines one pixel, and according to an embodiment, a plurality of micro shutters may define one pixel.

Next, a driving method of the pixels PX11 to PX1m set as a group in FIG. 3 will be described. When the first data signal DS1 is input while the second to m th data signals DS2 to DSm are not input, and the magnitude of the input first data signal DS1 is gradually increased, The eleventh sub-micro shutter SMS11 of the first micro shutter MS1 is closed at one voltage value, and the eleventh sub-micro shutter SMS11 and the twelfth sub-micro shutter SMS12 are connected to each other. Thereafter, if the magnitude of the input first data signal DS1 continues to increase, the twelfth sub-micro shutter SMS12 is closed at a second voltage value greater than the first voltage value, and the twelfth sub-micro shutter (SMS12) and the thirteenth sub micro shutter (SMS13) are connected. Subsequently, if the magnitude of the first data signal DS1 is continuously increased, the thirteenth submicro shutter SMS13 is closed at a third voltage value greater than the second voltage value.

As described above, the gray scale may be expressed by adjusting the opening and closing operations of the sub-micro shutters to adjust the amount of light transmitted from a light source (not shown) disposed adjacent to the lower portion of the first electrode 210 (spatial division driving method). . In addition, although not specifically described in the present invention, gray scales may be expressed by adjusting the opening / closing operation time of the sub-micro shutters (time division driving method), and both methods may be used simultaneously.

Referring to FIG. 3 again, if other micro shutters belonging to the same group are simultaneously driven when the first micro shutter MS1 is driven, the gap between the first micro shutter MS1 and the first electrode 210 may be reduced. Since the capacitance value is different, the voltage value at which the eleventh to thirteenth sub-microshutters SMS11 to SMS13 of the first micro shutter MS1 are driven may have a value different from the first to third voltages. have. In this case, the driving voltage of the first micro shutter MS1 should be changed according to whether the other micro shutter is driven. Therefore, it is preferable that pixels existing in the same column or the same row are not driven at the same time.

Referring back to FIG. 1, in FIG. 1, the gate lines GL1 to GLm + n−1 are not arranged in parallel with the horizontal direction of the display panel 110, but in a diagonal direction of the display panel 110. By disposing, it can be seen that the pixels present in the same row are not driven at the same time.

4 is a block diagram of a display device 300 according to another exemplary embodiment of the present invention. In this case, the description of the same components compared to FIG. 1 will be briefly described or omitted.

Referring to FIG. 4, the display device 300 includes a display panel 310, a data driver 320, a first gate driver 330, and a second gate driver 340.

The display panel 110 includes first to mth data lines DL1 to DLm, eleventh to 1n gate lines GL11 to GL1n, and 21st to second (m-1) gate lines GL21 to GL2 ( m-1)) and the eleventh to nmnm pixels PX11 to PXnm. Here, n and m are integers of 2 or more.

The data lines DL1 to DLm extend in the vertical direction of the display panel 310. The data lines DL1 to DLm are connected to the data driver 320 to transmit data signals to the pixels PX11 to PXnm.

The eleventh through first nth gate lines GL11 through GL1n and the twenty-first through second (m-1) gate lines GL21 through GL2 (m-1) are disposed in a diagonal direction to the lower right of the display panel 310. Extends. The eleventh to 1n gate lines GL11 to GL1n are connected to the first gate driver 330 to gate signals to pixels provided on the eleventh to 1n gate lines GL11 to GL1n. Send it. The twenty-first to second (m-1) gate lines GL21 to GL2 (m-1) are connected to the second gate driver 340, and the twenty-first to second (m-1) gate lines. The gate signal is transmitted to the pixels provided on the fields GL21 to GL2 (m-1).

The first and second gate drivers 330 and 340 receive the gate control signal GCS from an external device (not shown), and the eleventh through 1n gate lines GL11 ˜ of the display panel 310. The gate signals are sequentially output to GL1n and the twenty-first to second (m-1) gate lines GL21 to GL2 (m-1).

In this embodiment, there may be various methods for driving m * n pixels during one frame time T. One method is to add the number of connected pixels among the eleventh through 1n gate lines GL11 through GL1n and the 21st through 2nd (m-1) gate lines GL21 through GL2 (m-1). By driving at least two gate lines, which are m, at the same time, m pixels are simultaneously driven for 1 / n frame time.

The method will be described in detail with reference to FIG. 4. The number of pixels connected to the twenty-first gate line GL21 and the twelfth gate line GL12 is m. Accordingly, the pixels connected to the twenty-first gate line GL21 and the twelfth gate line GL12 may be simultaneously driven. The number of pixels connected to the second gate line GL2 (m-1) and the first n gate line GL1n is equal to m. Accordingly, the pixels connected to the second gate line GL2 (m-1) and the first n gate line GL1n may be simultaneously driven. Since the eleventh gate line GL11 is connected to m pixels, only pixels connected to the eleventh gate line GL11 are simultaneously driven.

The configuration of the display panel 300 illustrated in FIG. 4 is illustrated as an example, and a connection type and a driving method may vary depending on the number of pixels arranged. In addition, in FIG. 4, the eleventh to 1n gate lines GL11 to GL1n and the twenty-first to second (m-1) gate lines GL21 to GL2 (m-1) are connected in a downward direction. According to an exemplary embodiment, it may be connected in a right upward direction.

An equivalent circuit diagram of the pixel illustrated in the display device 300 illustrated in FIG. 4 and a cross-sectional view of the display device 300 may be understood with reference to FIGS. 2 and 3. As can be seen in FIG. 3, when a group of pixels is configured to include all the pixels in one row of the display panel 310, it can be seen that the pixels in the same row are not driven simultaneously. .

Although described with reference to the embodiments above, those skilled in the art will understand that the present invention can be variously modified and changed without departing from the spirit and scope of the invention as set forth in the claims below. Could be. In addition, the embodiments disclosed in the present invention are not intended to limit the technical spirit of the present invention, and all technical ideas which fall within the scope of the following claims and equivalents thereof should be interpreted as being included in the scope of the present invention .

1 is a block diagram of a display device according to an exemplary embodiment of the present invention.

FIG. 2 is an equivalent circuit diagram of an eleventh pixel among the pixels illustrated in FIG. 1.

3 is a cross-sectional view of the display device of FIG. 2 taken along the line II ′.

4 is a block diagram of a display device according to another exemplary embodiment of the present invention.

* Description of the symbols for the main parts of the drawings *

100: display device 110: display panel

120: data driver 130: gate driver

Claims (11)

A plurality of pixels each including a micro shutter and divided into a plurality of groups; A plurality of first electrodes each formed to face each micro shutter of pixels belonging to a corresponding group; A plurality of second electrodes each overlapping one end of a corresponding first electrode of the first electrodes; And And an insulating layer electrically insulating the first electrodes from the second electrodes and the micro shutters. The display panel of claim 1, wherein the pixels are arranged in a matrix, and each of the groups includes pixels in a same row. The micro shutter of claim 2, wherein the micro shutters include a plurality of sub-micro shutters that are sequentially arranged and opened and closed according to the magnitude of an external signal, and electrically connected to each other. The plurality of sub-micro shutters are sequentially connected as the magnitude of the external signal increases. The method of claim 2, further comprising first to (m + n-1) gate lines sequentially arranged. The pixels are arranged in n (n is an integer of 2 or more) rows and m (m is an integer of 2 or more). And each of the first to (m + n-1) gate lines is connected to one pixel and pixels provided on a diagonal extension line of the one pixel. The display panel of claim 4, wherein the sum of the number of pixels connected to at least two gate lines simultaneously driven among the gate lines is m, and m pixels are simultaneously driven for 1 / n frame time. A data driver which receives an image signal and a data control signal from an external device and outputs a data signal; A gate driver for receiving a gate control signal from the outside and outputting a gate signal; And A display panel configured to display an image in response to the gate signal and the data signal; The display panel, A plurality of gate lines receiving the gate signal; A plurality of data lines receiving the data signal; A plurality of pixels each including a micro shutter and divided into a plurality of groups; A plurality of first electrodes each formed to face each micro shutter of pixels belonging to a corresponding group; A plurality of second electrodes each overlapping one end of a corresponding first electrode of the first electrodes; And And an insulating layer electrically insulating the first electrodes from the second electrodes and the micro shutters. The display panel of claim 6, wherein the pixels are arranged in a matrix, and each of the groups includes pixels in a same row. The method of claim 7, wherein the micro-shutter comprises a plurality of sub-micro shutters arranged in sequence and opened and closed according to the magnitude of an external signal, and electrically connected to each other, And a plurality of sub-micro shutters are sequentially connected as the magnitude of the external signal increases or decreases. The method of claim 7, further comprising first to (m + n-1) gate lines sequentially arranged. The pixels are arranged in n (n is an integer of 2 or more) rows and m (m is an integer of 2 or more). And each of the first to (m + n-1) gate lines is connected to one pixel and pixels provided on a diagonal extension line of the one pixel. The display panel of claim 9, wherein the sum of the number of pixels connected to at least two gate lines simultaneously driven among the gate lines is m, and m pixels are simultaneously driven for 1 / n frame time. The display device of claim 6, wherein the gate driver comprises a first gate driver disposed adjacent to a first side of the display panel and a second gate driver disposed adjacent to a second side facing the first side of the display panel. Including, And some of the at least two gate lines simultaneously driven are connected to a first gate driver, and others are connected to a second gate driver.

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