KR20110061413A - Display device and driving method thereof - Google Patents

Abstract

PURPOSE: A display device and a driving method thereof are provided to increase a contrast by analyzing a histogram property at regions applying a weighted value. CONSTITUTION: In a display device and a driving method thereof, a display panel comprises an LCD panel or an organic electro-luminescence display panel. A histogram analysis unit(71) produces a histogram of a data signal supplied from outside. A weighted value determination unit(73) makes the weighted value of the histogram of a homogeneous region and a heterogeneous region different. The histogram changing unit(75) generates a corrected data signal by changing the histogram of a homogeneous region and a heterogeneous region. A data driving unit supplies a data signal to a display panel.

Description

Display device and driving method thereof

The present invention relates to a display device and a driving method thereof.

With the development of information technology, the market for a display device, which is a connection medium between a user and information, is growing. Accordingly, the use of display devices such as organic light emitting display (OLED), liquid crystal display (LCD), plasma display panel (PDP), and the like is increasing.

Such a display device is used for various purposes in a computer field such as a notebook (note book) or an industrial field such as a mobile phone in a home appliance field such as a television (TV) or a video.

As described above, the display device performs image processing such as data correction or data conversion according to the characteristics of the display panel, and displays a desired image on the display panel using the digital data signal supplied from the outside.

Among the image processing methods, there is a histogram processing technique that corrects data according to the frequency of each gray level of an input data signal in order to improve image display quality. In the conventional histogram processing method, a method of calculating a frequency with homogeneous and heterogeneous regions having the same weight is used. Accordingly, when image processing is performed using a conventional histogram processing technique, when the histogram is changed for the homogeneous region, there is a problem in that the original image is different from the original image.

SUMMARY OF THE INVENTION The present invention for solving the above problems of the background art is to provide a display device and a driving method thereof capable of efficiently increasing contrast by a method of reflecting spatial characteristics. The present invention also provides a display device and a driving method thereof capable of improving contrast and minimizing heterogeneity with an original image.

According to the above-mentioned problem solving means, the present invention includes a histogram analyzer for analyzing a homogeneous region and a heterogeneous region by calculating a histogram for an externally supplied data signal; A weight determination unit for varying weights of the histogram for the homogeneous region and the histogram for the heterogeneous region supplied from the histogram analyzer; A histogram changer for generating a corrected data signal by changing a histogram for the homogeneous region and a histogram for the heterogeneous region supplied from the weight determining unit; And a data driver for supplying the corrected data signal to the display panel.

The weight determiner may multiply the frequency by the frequency of the histogram for the homogeneous region and the heterogeneous region supplied from the histogram analyzer.

The weight determining unit may reflect the weight of the histogram with respect to the heterogeneous region to be larger than the weight of the histogram with respect to the homogeneous region.

The display panel may include a liquid crystal display panel or an organic light emitting display panel.

In another aspect, the present invention, the step of calculating the histogram for the data signal supplied from the outside to analyze the homogeneous region and the heterogeneous region; Varying weights of the histogram for the homogeneous region and the histogram for the heterogeneous region; Generating a corrected data signal by changing the histogram for the homogeneous region and the histogram for the heterogeneous region; And supplying the corrected data signal to the display panel.

In the step of varying the weight, the frequency of the histogram for the homogeneous region and the heterogeneous region may be multiplied by the weight.

In the step of varying the weight, the weight of the histogram for the heterogeneous region may be larger than the weight of the histogram for the homogeneous region.

The display panel may include a liquid crystal display panel or an organic light emitting display panel.

The present invention has an effect of providing a display device and a driving method thereof capable of efficiently increasing contrast by analyzing a characteristic of a histogram for each region with respect to an input data signal and reflecting a spatial characteristic having a different weight based on the characteristic. . In addition, the present invention provides a display device capable of improving contrast and minimizing heterogeneity with the original image by giving a large weight to the frequency in the homogeneous region and a small weight to the frequency in the heterogeneous region when counting the frequency of the histogram. It is effective to provide a driving method.

Hereinafter, with reference to the accompanying drawings, the specific content for the practice of the present invention will be described.

<Display device>

1 is a block diagram of a display device according to an exemplary embodiment of the present invention, FIG. 2 is a block diagram of a gate driver, FIG. 3 is a block diagram of a data driver, and FIG. 4 is an exemplary configuration of a subpixel circuit of a liquid crystal display panel. FIG. 5 is a diagram illustrating a subpixel circuit configuration of an organic light emitting display panel.

As shown in FIG. 1, a display device according to an exemplary embodiment of the present invention includes a timing driver TCN, an image compensator HGMP, a gate driver SDRV, a data driver DRV, and a display panel PNL. It includes.

The timing driver TCN receives a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a data enable signal Data Enable (DE), a clock signal CLK, and a data signal DDATA from an external source. The timing driver TCN uses the timing signals such as the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, the data enable signal Data Enable, and the clock signal CLK, and the gate of the data driver DDRN and the gate. The operation timing of the driver SDRV is controlled. Since the timing driver TCN may determine the frame period by counting the data enable signal DE of one horizontal period, the vertical synchronization signal Vsync and the horizontal synchronization signal Hsync supplied from the outside may be omitted. . The control signals generated by the timing driver TCN include a gate timing control signal GDC for controlling the operation timing of the gate driver SDRV and a data timing control signal DDC for controlling the operation timing of the data driver DDR. ) May be included. The gate timing control signal GDC includes a gate start pulse (GSP), a gate shift clock (GSC), a gate output enable signal (Gate Output Enable, GOE), and the like. The gate start pulse GSP is supplied to a gate drive integrated circuit (IC) where the first gate signal is generated. The gate shift clock GSC is a clock signal commonly input to the gate drive ICs and is a clock signal for shifting the gate start pulse GSP. The gate output enable signal GOE controls the output of the gate drive ICs. The data timing control signal DDC includes a source start pulse (Source, Start Pulse, SSP), a source sampling clock (SSC), a source output enable signal (Source Output Enable, SOE), and the like. The source start pulse SSP controls the data sampling start time of the data driver DDRV. The source sampling clock SSC is a clock signal that controls the sampling operation of data in the data driver DDRV based on the rising or falling edge. The source output enable signal SOE controls the output of the data driver DDRV. Meanwhile, the source start pulse SSP supplied to the data driver DVV may be omitted according to the data transmission method.

The HGMP analyzes a homogenous region and a heterogenous region by calculating a histogram of an external data, for example, a data signal (DDATA) supplied from a timing driver (TCN). HGMP generates a corrected data signal (CDATA) by changing the histogram for the homogeneous region and the histogram for the heterogeneous region, and changing the histogram for the homogeneous region and the histogram for the heterogeneous region. do. The image correction unit HGMP supplies the corrected data signal CDATA to the timing driver TCN or the data driver DVV. HGMP is described in more detail below.

The gate driver SDRV is a swing width of the gate driving voltage at which the transistors of the subpixels SP included in the display panel PNL can operate in response to the gate timing control signal GDC supplied from the timing driver TCN. The gate signal is sequentially generated while shifting the signal level. The gate driver SDRV supplies the gate signals generated through the gate lines SL1 to SLm to the subpixels SP included in the display panel PNL. As shown in FIG. 2, the gate driver SDRV includes gate drive ICs. The gate drive ICs each include a shift register 61, a level shifter 63, and a plurality of AND gates (hereinafter referred to as "AND gates") 62 connected between the shift register 61 and the level shifter 63. And an inverter 64 for inverting the gate output enable signal GOE and the like. The shift register 61 sequentially shifts the gate start pulse GSP according to the gate shift clock GSC using a plurality of D-flip flops connected in a cascade manner. The AND gates 62 generate an output by ANDing the output signal of the shift register 61 and the inverted signal of the gate output enable signal GOE, respectively. The inverter 64 inverts the gate output enable signal GOE and supplies it to the AND gates 62. The level shifter 63 shifts the output voltage swing width of the AND gate 62 to the swing width of the gate voltage at which the transistors included in the display panel PNL can operate. The gate signal output from the level shifter 63 is sequentially supplied to the gate lines SL1 to SLm.

The data driver DDRV samples and latches the digital data signal CDATA supplied from the timing driver TCN in response to the data timing control signal DDC supplied from the timing driver TCN, thereby providing data of a parallel data system. Convert to The data driver DVV converts the digital data signal CDATA into a gamma reference voltage and converts it into an analog data signal ADATA. The data driver DDRV supplies the data signal ADATA converted through the data lines DL1 to DLn to the subpixels SP included in the display panel PNL. As shown in FIG. 3, a shift register 51, a data register 52, a first latch 53, a second latch 54, a converter 55, an output circuit 56, and the like are included. The shift register 51 shifts the source sampling clock SSC supplied from the timing driver TCN. The shift register 51 transfers a carry signal CAR to a shift register of a source driver IC of a neighboring next stage. The data register 52 temporarily stores the digital data signal CDATA supplied from the timing driver TCN and supplies it to the first latch 53. The first latch 53 samples and latches a digital data signal CDATA that is serially input according to a clock sequentially supplied from the shift register 51, and simultaneously outputs the latched data. The second latch 54 latches data supplied from the first latch 53 and then latches the data in synchronization with the second latch 54 of the other source drive ICs in response to the source output enable signal SOE. Output them simultaneously. The conversion unit 55 converts the digital data signal CATA input from the second latch 54 to the gamma reference voltages GMA1 to GMAn and converts the data signal ADATA to an analog data signal ADATA. The analog data signal ADATA output from the output circuit 56 is supplied to the data lines DL1 to DLn in response to the source output enable signal SOE.

The display panel PNL includes subpixels SP arranged in a matrix. The display panel PNL may be configured as a liquid crystal display panel or an organic light emitting display panel, but may be applied to other display devices such as a plasma display panel. . When the display panel PNL is configured as a liquid crystal display panel, the subpixel SP may have a circuit configuration as shown in FIG. 4. The switching transistor TFT has a gate connected to the gate line SL1 to which the gate signal is supplied, one end thereof to the data line DL1 to which the data signal is supplied, and the other end thereof to the first node n1. The pixel electrode 1 positioned on one side of the liquid crystal cell Clc is connected to the first node n1 connected to the other end of the switching transistor TFT, and the common electrode 2 positioned on the other side of the liquid crystal cell Clc. ) Is connected to the common voltage wiring (Vcom). One end of the storage capacitor Cst is connected to the first node n1 and the other end thereof is connected to the common voltage wiring Vcom. The liquid crystal display panel having the sub pixel SP structure may be configured to change the liquid crystal layer included in each sub pixel according to the gate signal supplied through the gate line SL1 and the data signal supplied through the data line DL1. The image can be displayed by the transmission of the light.

In contrast, when the display panel PNL is configured of an organic light emitting display panel, the subpixels may have a circuit configuration as shown in FIG. 5. The switching transistor T1 has a gate connected to the gate line SL1 supplied with the gate signal, one end connected to the data line DL1 supplied with the data signal, and the other end connected to the first node n1. The driving transistor T2 has a gate connected to the first node n1 and one end of the driving transistor T2 connected to the second node n2 connected to the first power line VDD supplied with the driving power supply Vdd having a high potential. The other end is connected to the node n3. One end of the storage capacitor Cst is connected to the first node n1 and the other end thereof is connected to the second node n2. In the organic light emitting diode D, an anode is connected to the third node n3 connected to the other end of the driving transistor T2, and a cathode is connected to the second power line VSS to which the driving power Vss of low potential is supplied. . The organic light emitting display panel having the sub pixel SP structure includes a light emitting layer included in each sub pixel according to a gate signal supplied through the gate line SL1 and a data signal supplied through the data line DL1. By emitting light, an image can be displayed.

Hereinafter, a display device according to an exemplary embodiment of the present invention will be described in more detail.

6 is a schematic block diagram of an image compensator according to an exemplary embodiment of the present invention, and FIG. 7 is a schematic block diagram illustrating a display device according to an exemplary embodiment of the present invention.

As shown in FIGS. 6 and 7, the HGMP includes a histogram analyzer 71, a weight determiner 73, and a histogram changer 75.

The histogram analyzer 71 analyzes the homogeneous region and the heterogeneous region by calculating a histogram of the data signal DDATA supplied from an external device, for example, the timing driver TCN. The histogram analyzer 71 extracts the histogram by dividing the luminance component of the data signal DDATA into a plurality of stages, and performs histogram equalization so as to have a uniform distribution with respect to the extracted histogram. The histogram analyzer 71 analyzes the homogeneous region and the heterogeneous region after performing histogram equalization. The homogeneous region means that there are many gray scales in a specific region, and the heterogeneous region means that there is few gray scales in a specific region.

The weight determination unit 73 varies the weight of the histogram for the homogeneous region and the histogram for the heterogeneous region supplied from the histogram analyzer 71. The weight determining unit 73 multiplies the frequency of the histograms for the homogeneous region and the heterogenous region supplied from the histogram analysis unit 71 by the weight to vary the weight of the histogram for each region. The weight determination unit 73 reflects the weight of the histogram with respect to the heterogeneous region more than the weight of the histogram with respect to the homogeneous region. For example, if the input data signal corresponds to the homogeneous region according to the analysis result of the histogram analyzer 71, the weight determiner 73 may reduce the weight to reflect the histogram. On the other hand, if the input data signal corresponding to the heterogeneous region according to the analysis result of the histogram analysis unit 71 is given a large weight to be reflected in the histogram. The weight determination unit 73 determines the weight for each feature among the pixels adjacent to each other. Accordingly, when performing histogram modification in the homogeneous domain, heterogeneity with the original association is reduced.

The histogram changing unit 75 generates a corrected data signal CDATA by changing the histogram for the homogeneous region and the histogram for the heterogeneous region supplied from the weight determining unit 73. The histogram changing unit 75 changes the histogram for each region to generate a corrected data signal CDATA and supplies it to the timing driver TCN.

The timing driver TCN supplies the corrected data signal CDATA to the data driver DDRV. Then, the data driver DDRV converts the corrected data signal CDATA into an analog data signal ADTA and supplies the same to the display panel PNL.

<Method for driving display device>

8 is a flowchart illustrating a method of driving a display device according to an exemplary embodiment of the present invention, and FIG. 9 is a diagram illustrating output image data compared to input image data according to an exemplary embodiment of the present invention.

1 to 8, a method of driving a display device according to an exemplary embodiment of the present invention includes a histogram analysis step S11, a weight determination step S13 according to an area, and a corrected data signal generation step S15. And the corrected data signal supply step (S17).

The histogram analysis step S11 is a step of analyzing a homogeneous region and a heterogeneous region by calculating a histogram for the data signal DDATA supplied from an external device, for example, the timing driver TCN. The histogram analysis step S11 is performed by the histogram analysis unit 71. The histogram analyzer 71 extracts the histogram by dividing the luminance component of the data signal DDATA into a plurality of stages, and performs histogram equalization to have a uniform distribution with respect to the extracted histogram. The histogram analyzer 71 analyzes the homogeneous region and the heterogeneous region after performing histogram equalization. The homogeneous region means that there are many gray scales in a specific region, and the heterogeneous region means that there is few gray scales in a specific region.

The weight determination step S13 according to the region is a step of varying the weight of the histogram for the homogeneous region and the histogram for the heterogeneous region. The weight determination step S13 according to the region is performed by the weight determination unit 73. The weight determination unit 73 varies the weight of the histogram for the homogeneous region and the histogram for the heterogeneous region supplied from the histogram analyzer 71. The weight determining unit 73 multiplies the frequency of the histograms for the homogeneous region and the heterogenous region supplied from the histogram analysis unit 71 by the weight to vary the weight of the histogram for each region. The weight determination unit 73 reflects the weight of the histogram with respect to the heterogeneous region more than the weight of the histogram with respect to the homogeneous region. For example, if the input data signal corresponds to the homogeneous region according to the analysis result of the histogram analyzer 71, the weight determiner 73 may reduce the weight to reflect the histogram. On the other hand, if the input data signal corresponding to the heterogeneous region according to the analysis result of the histogram analysis unit 71 is given a large weight to be reflected in the histogram. The weight determination unit 73 determines the weight for each feature among the pixels adjacent to each other. Accordingly, when performing histogram modification in the homogeneous region, heterogeneity with the original association is reduced.

The corrected data signal generation step S15 is a step of generating a corrected data signal by changing the histogram for the homogeneous region and the histogram for the heterogeneous region. The corrected data signal generating step S15 is performed by the histogram changing unit 75. The histogram changing unit 75 changes the histogram for the homogeneous region and the histogram for the heterogeneous region supplied from the weight determining unit 73 to generate the corrected data signal CDATA. The histogram changing unit 75 changes the histogram for each region to generate a corrected data signal CDATA and supplies it to the timing driver TCN.

The corrected data signal supply step S17 is a step of supplying the corrected data signal CDATA to the display panel PNL. The corrected data signal supply step S17 is performed by the data driver DVV. The data driver DDRV receives the corrected data signal CDATA from the timing driver TCN, converts the data signal CDATA into an analog data signal ADATA, and supplies the same to the display panel PNL.

According to an embodiment of the present invention, as shown in FIG. 9, a method for reflecting spatial characteristics may improve contrast while minimizing heterogeneity between input image data and output image data by changing histogram according to characteristics of each region. Will be.

The present invention has an effect of providing a display device and a driving method thereof that can efficiently increase contrast by analyzing a characteristic of a histogram for each region of an input data signal and reflecting spatial characteristics having different weights based on the histogram. . The present invention also provides a display device capable of improving contrast and minimizing heterogeneity with the original image by giving a large weight to the frequency in the homogeneous region and a small weight to the frequency in the heterogeneous region when counting the frequency of the histogram. It has the effect of providing a method.

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, It will be understood that the invention may be practiced. Therefore, the embodiments described above are to be understood as illustrative and not restrictive in all aspects. In addition, the scope of the present invention is shown by the claims below, rather than the above detailed description. Also, it is to be construed that all changes or modifications derived from the meaning and scope of the claims and their equivalent concepts are included in the scope of the present invention.

1 is a block diagram of a display device according to an exemplary embodiment of the present invention.

2 is a block diagram of a gate driver.

3 is a block diagram of a data driver;

4 is a diagram illustrating a subpixel circuit configuration of a liquid crystal display panel.

5 is a diagram illustrating a subpixel circuit configuration of an organic light emitting display panel.

6 is a schematic block diagram of an image corrector according to an embodiment of the present invention.

7 is a schematic block diagram illustrating a display device according to an exemplary embodiment of the present invention.

8 is a flowchart illustrating a method of driving a display device according to an exemplary embodiment of the present invention.

9 is a diagram illustrating image data output compared to image data input according to an embodiment of the present invention.

<Explanation of symbols on main parts of the drawings>

TCN: Timing Driver HGMP: Video Compensation

SDRV: Gate driver DDRV: Data driver

PNL: display panel 71: histogram analysis unit

73: weight determining unit 75: histogram changing unit

Claims (8)

A histogram analyzer for analyzing a homogeneous region and a heterogeneous region by calculating a histogram of a data signal supplied from the outside; A weight determination unit that varies a weight of the histogram for the homogeneous region and the histogram for the heterogeneous region supplied from the histogram analyzer; A histogram changer for generating a corrected data signal by changing a histogram for the homogeneous region and a histogram for the heterogeneous region supplied from the weight determining unit; And And a data driver for supplying the corrected data signal to a display panel. The method of claim 1, The weight determination unit, And a weight multiplied by the frequency of the histogram for the homogeneous region and the heterogeneous region supplied from the histogram analyzer. The method of claim 1, The weight determination unit, And a weight of the histogram with respect to the heterogeneous region is greater than a weight of the histogram with respect to the homogeneous region. The method of claim 1, The display panel, A display device comprising a liquid crystal display panel or an organic light emitting display panel. Analyzing a homogeneous region and a heterogeneous region by calculating a histogram of an externally supplied data signal; Varying weights of the histogram for the homogeneous region and the histogram for the heterogeneous region; Generating a corrected data signal by changing a histogram for the homogeneous region and a histogram for the heterogeneous region; And And supplying the corrected data signal to a display panel. The method of claim 5, In the step of varying the weight, And multiplying the frequency by the frequency of the histogram for the homogeneous region and the heterogeneous region. The method of claim 5, In the step of varying the weight, And a weight of the histogram with respect to the heterogenous region is greater than a weight of the histogram with respect to the homogeneous region. The method of claim 5, The display panel, A method of driving a display device comprising a liquid crystal display panel or an organic light emitting display panel.

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