KR20110016401A - Solid-state image pickup device and driving method thereof, and electronic apparatus - Google Patents

Abstract

PURPOSE: A charge coupled device and a method for driving the same are provided to obtain a plurality of signals of different sensitivity from one unit pixel. CONSTITUTION: A PD(Photo Diode)(21) accumulates photoelectric charge of received light. A reading gate unit(221) deciphers accumulated signal electric charge of the photo diode. An accumulating unit(222) provisionally accumulates the read signal electric charge. A transmission transistor(22) transmits the accumulated signal charge to the FD(Floating Diffusion) part(27). A reset transistor(23) resets the FD part. A selection transistor(25) converts the amplification transistor(26) into the active state.

Description

SOLID-STATE IMAGE PICKUP DEVICE AND DRIVING METHOD THEREOF, AND ELECTRONIC APPARATUS

The present invention relates to a solid-state imaging device, a method for driving a solid-state imaging device, and an electronic device.

In the solid-state imaging device, an almost linear output signal can be obtained from the unit pixel with respect to the charge amount accumulated by the photoelectric conversion. The dynamic range of the solid-state imaging device is uniquely determined by the amount of charge (saturated charge) and noise level that can be accumulated by the unit pixel. That is, the lower limit of the output level of the solid-state imaging device is limited to the noise level, and the upper limit is limited to the saturation level. As a result, the dynamic range of the solid-state imaging device is uniquely determined by the saturation charge amount and the noise level.

In order to enlarge this dynamic range, the following method is generally used. In other words, by combining a signal having a different sensitivity, such as a relatively clear image of a low luminance portion captured by a long charge accumulation and a relatively clear image of a high luminance portion captured by a short charge accumulation, Lighter dynamic range is being achieved.

As a technique for obtaining signals having different sensitivities, a technique in which a plurality of unit pixels adjacent to each other are set as a group to correspond to one pixel of an output image, and the sensitivity of the plurality of unit pixels in the set is different, respectively. (For example, see Unexamined-Japanese-Patent No. 2005-065082.).

However, in order to obtain a signal having a different sensitivity, in the prior art described in Japanese Patent Laid-Open No. 2005-065082, since a plurality of unit pixels to be paired correspond to one pixel of an output image, the unit pixel and the output image on the imaging surface The resolution of the output image is lower than that in the case where the pixels correspond to one-to-one.

Another technique is a technique in which a plurality of read rows are obtained so that a plurality of signals having different sensitivitys are obtained from the same pixel (one pixel) at different timings in a row scan (for example, in Japan). See Japanese Patent Application Laid-Open No. 2003-198948).

However, in the first embodiment of Japanese Patent Laid-Open No. 2003-198948, since a plurality of signals having different sensitivity are output from one pixel at different timing in row scanning, these signals having different sensitivity are synchronized. As frame memory is needed for this purpose, the size of the device increases and the cost increases. Further, in the second embodiment, since the reset level is output later for the signal outputted first from one pixel, there is a problem that reset noise is put on the signal outputted first.

Therefore, the present invention requires a frame memory or a solid-state imaging device, a method for driving a solid-state imaging device, and an electronic device capable of obtaining a plurality of signals having different sensitivity from one pixel without having a reset level set on a signal output first. It is an object to provide a device.

In order to achieve the above object, the control method of the solid-state imaging device of the present invention reads the first signal corresponding to the accumulation of the signal charge during the first period from the charge accumulation region, and from the charge accumulation region, The second signal corresponding to the other accumulation of the signal charges during the second period is read out, and the first period is a period from the time of performing the first shutter operation to the time of performing the second shutter operation. The second period is characterized by a period from a time of performing the second shutter operation to a time before or during the scanning of the read row.

The solid-state imaging device of the present invention reads out a plurality of pixels including a photoelectric change element and a charge accumulation region, and a first signal corresponding to the accumulation of signal charges during the first period from the charge accumulation region, A scanning portion configured to read from the charge accumulation region a second signal corresponding to another accumulation of signal charges during the period, the first period of time performing the second shutter operation from the time of performing the first shutter operation; And a second period is a period from a time of performing the second shutter operation to a time before or during the period of scanning the read row.

An electronic apparatus having a solid-state imaging device of the present invention reads from a plurality of pixels including a photoelectric change element and a charge accumulation region, and a first signal corresponding to accumulation of signal charges during a first period from the charge accumulation region. And a scanning portion configured to read from the charge accumulation region a second signal corresponding to another accumulation of signal charges during a second period, wherein the first period is second from the time of performing the first shutter operation. The second period is a period from the time of performing the second shutter operation to the time during or before scanning the read row.

In still image pick-up using a mechanical shutter, light is incident on the photoelectric conversion portion through a mechanical shutter, and the photoelectric conversion portions of all the unit pixels are simultaneously reset in the open state of the mechanical shutter, followed by the first transfer mechanism. Transfers the charges of the photoelectric conversion section to all of the unit pixels at the same time to the first charge storage section, and then, in the closed state of the mechanical shutter, each pixel of the pixel array section is sequentially selected in units of rows, The first signal is read into the signal line by the second transmission mechanism and the reading mechanism, followed by the second signal by the first transmission mechanism, the second transmission mechanism and the reading mechanism. Scanning is performed while reading the signal line. At this time, the exposure period of the first signal is a period from simultaneous reset of all the pixels to transfer to the first charge accumulation section at the same time in all the pixels. Further, the exposure period of the second signal continues to be the period until the mechanical shutter is closed. Thus, the first and second signals having different exposure periods, that is, different sensitivity, can be obtained from one unit pixel. In addition, the concurrency of the exposure period of all the pixels is ensured.

According to the present invention, a plurality of signals having different sensitivities can be obtained from one unit pixel without requiring a frame memory or raising the reset level to the signal output first. Further, in the still image pick-up, the concurrency of the exposure periods of all the pixels can be ensured.

[0012]
1 is a system configuration diagram showing an outline of a system configuration of a CMOS image sensor to which the present invention is applied.
2 is a circuit diagram illustrating an example of a configuration of a unit pixel.
3 is a cross-sectional view illustrating an outline of a cross-sectional structure of a unit pixel having a charge storage unit.
4 is a cross-sectional view illustrating an outline of a cross-sectional structure of a unit pixel according to a modification.
5 is a block diagram illustrating an example of a configuration of an imaging device according to the present invention.
6 is a conceptual diagram of row scanning by a rolling shutter.
7 is a timing chart showing driving timing in a 1H period in a moving picture mode;
8 is a block diagram showing an example of a configuration of a signal processing unit that performs a synthesis process for wide dynamic range.
9 is a diagram showing a relationship between light intensity and a signal level relating to an FD signal and a PD signal.
10 is a block diagram showing another example of the configuration of a signal processing unit that performs a synthesis process for wide dynamic range.
11 is a diagram illustrating an example of a relationship between an FD signal and a coefficient β of a weighted average.
12 is an operation explanatory diagram relating to an operation in a still mode.

EMBODIMENT OF THE INVENTION Hereinafter, the form for implementing invention (it describes as "embodiment" hereafter) is demonstrated in detail using drawing. The description will be made in the following order.

1. Solid-state imaging device (example of CMOS image sensor) to which the present invention is applied

 1-1. System configuration

 1-2. Pixel composition

2. Features of the Invention (Embodiment)

3. Electronic device (example of imaging device) by this invention

 3-1. System configuration

 3-2. Fairy tale mode

 3-3. Still picture mode

 3-4. Effects of the present embodiment

<1. Solid-state imaging device to which the present invention is applied>

[1-1. System configuration]

1 is a system configuration diagram showing an outline of a system configuration of a solid-state imaging device to which the present invention is applied, for example, a CMOS image sensor which is a kind of X-Y address type solid-state imaging device. Here, the CMOS image sensor is an image sensor created by applying or partially using a CMOS process.

The CMOS image sensor 10 according to this application example has a pixel array portion 12 formed on the semiconductor substrate 11 and a peripheral circuit portion integrated on the same semiconductor substrate 11 as the pixel array portion 12. It is made up. The peripheral circuit portion includes, for example, a column driver 13, a column processor 14, a row driver 15, and a system controller 16.

The pixel array unit 12 is a unit pixel (hereinafter, simply referred to as a “pixel”) having a photoelectric conversion element that photoelectrically converts incident visible light and generates signal charges (photocharges) corresponding to the luminosity and accumulates therein. May be described), and the unit pixels are two-dimensionally arranged in a matrix form. The specific structure of a unit pixel is mentioned later.

In the pixel array unit 12, the pixel drive line 17 is wired in a row direction (pixel array direction of a pixel row) for each pixel row with respect to the matrix array of pixel arrays, and a vertical signal line 18 is arranged for each pixel column. It is wired in accordance with the direction (pixel array direction of pixel columns). The pixel drive line 17 transmits a drive signal for driving to read a signal from the pixel. In FIG. 1, although the pixel drive line 17 is shown as one wiring, it is not limited to one. One end of the pixel drive line 17 is connected to an output terminal corresponding to each row of the row driver 13.

The row driver 13 is constituted by a shift register, an address decoder, or the like, and is a pixel driver that drives each pixel of the pixel array unit 12 at the same time as all of the above unit pixels, or in units of rows. Although the illustration of the specific structure is abbreviate | omitted, this row drive part 13 has a structure which generally has two scanning systems, a reading scanning system and a sweep-scanning system.

In order to read out a signal from the unit pixel, the read scanning system selectively scans the unit pixel of the pixel array unit 12 in row units. The signal read out from the unit pixel is an analog signal. The ejection scanning system performs the ejection scanning on the read row in which the read scanning is performed by the read scanning system in advance of the shutter speed by the time portion of the shutter speed.

The photoelectric conversion element is reset by dissipation of unnecessary charges from the photoelectric conversion elements of the unit pixels in the read row by the extraction scan by this emission scanning system. Then, the so-called electronic shutter operation is performed by dissipation (reset) of unnecessary charges by the dissipation scanning system. Here, the electronic shutter operation refers to an operation of discarding the photocharge of the photoelectric conversion element and starting exposure (starting accumulation of photocharge).

The signal read out by the read operation by the read scanning system corresponds to the amount of light incident after the immediately preceding read operation or the electronic shutter operation. Then, the period from the read timing by the immediately preceding read operation or the ejection timing by the electronic shutter operation to the read timing by the current read operation is the accumulation period (exposure period) of the photocharge in the unit pixel.

The signal output from each unit pixel of the pixel row selectively scanned by the row driver 13 is supplied to the column processor 14 via each of the vertical signal lines 18. The column processing unit 14 performs predetermined signal processing on signals output from each pixel in the selection row through the vertical signal line 18 for each pixel column of the pixel array unit 12, and also performs pixel processing after the signal processing. Temporarily preserve it.

Specifically, the column processing unit 14 receives a signal of a unit pixel, and, for example, removes noise by CDS (Correlated Double Sampling; Correlated Double Sampling), amplifies a signal, or AD (Analog-Digital). Signal processing such as conversion. By the noise removal process, the fixed pattern noise inherent to pixels, such as reset noise and threshold deviation of an amplifying transistor, is removed. In addition, the signal processing illustrated here is only an example and is not limited to these as signal processing.

The column driver 15 is constituted by a shift register, an address decoder, or the like, and sequentially selects a unit circuit corresponding to the pixel column of the column processor 14. By the selective scanning by the column driver 15, the pixel signals signaled by the column processor 14 are sequentially output to the horizontal bus 19, and through the horizontal bus 19 of the semiconductor substrate 11. Is sent externally.

The system control unit 16 accepts a clock given from the outside of the semiconductor substrate 11, data instructing an operation mode, and the like, and also outputs data such as internal information of the CMOS image sensor 10. The system controller 16 also has a timing generator for generating various timing signals, and the row driver 13, column processor 14, and column driver 15 are based on the various timing signals generated by the timing generator. The drive control of the peripheral circuit part such as this is performed.

[1-2. Pixel configuration]

(Circuit configuration)

2 is a circuit diagram illustrating an example of a configuration of a unit pixel. As shown in FIG. 2, the unit pixel 20 according to the present configuration example is, for example, the charge storage unit 22, the transfer transistor 23, in addition to the photodiode 21, which is a photoelectric conversion unit. It has the structure which has the reset transistor 24, the selection transistor 25, and the amplifying transistor 26. As shown in FIG.

Here, for example, an N-channel MOS transistor is used as the transfer transistor 23, the reset transistor 24, the selection transistor 25, and the amplifying transistor 26. However, the combination of the conductivity types of the transfer transistor 23, the reset transistor 24, the selection transistor 25, and the amplifying transistor 26 illustrated here is only one example, and is not limited to such a combination.

For this unit pixel 20, as the pixel drive line 17, for example, four drive wires of the read line 171, the transfer line 172, the reset line 173, and the selection line 174 are the same. Wiring is common for each pixel of the pixel row. These read lines 171, transmission lines 172, reset lines 173, and selection lines 174 are connected to output terminals corresponding to respective pixel rows of the row driver 13 in pixel rows. The driver 13 includes a read pulse ROG and a transfer pulse TRG which are driving signals for driving the pixel 20 with respect to the read line 171, the transfer line 172, the reset line 173, and the selection line 174. ), A reset pulse RST and a selection pulse SEL are output.

The photodiode 21 has an anode electrode connected to a negative side power supply (for example, a gland), and photoelectrically converts the received light into photocharges (here, optoelectronics) of a charge amount corresponding to the amount of light, thereby accumulating the photocharges. do. The charge storage part 22 is provided in the cathode electrode side of the photodiode 21.

The charge storage section 22 is composed of a read gate section 221 and a storage section 222. The read gate portion 221 includes a read channel 223 and a gate electrode 224 provided on the read channel 223. The gate electrode 224 has a read pulse ROG in which a high level (for example, Vdd level) becomes active (hereinafter, referred to as "high active") from the row driver 13. 171). When the read pulse ROG is given to the gate electrode 224, the read gate portion 221 reads out the signal charge accumulated in the photodiode 21.

The accumulation unit 222 is made up of a floating diffusion region (floating diffusion region), and temporarily accumulates (stores) the signal charges read from the photodiode 21 by the read gate portion 221. Here, the gate electrode 224 of the read gate portion 221 extends not only on the read channel 223 but also on the storage portion 222. That is, when the read pulse ROG is applied to the gate electrode 224, the charge accumulator 22 transfers charge by changing the potential of the accumulator 222 along with the potential of the read channel 223. CCD (Charge Coupled Device) configuration is adopted.

The transfer transistor 23 is connected between the charge storage unit 22 and the gate electrode of the amplifying transistor 26, and the gate electrode is connected to the transfer line 172. The node 27 electrically connected to the charge accumulation section 22 and the gate electrode of the amplifying transistor 26 is called an FD (floating diffusion) section. The high active transfer pulse TRG is given from the row driver 13 to the gate electrode of the transfer transistor 23 via the transfer line 172. The transfer transistor 22 is turned on in response to the transfer pulse TRG, and transfers the signal charge temporarily accumulated in the accumulation unit 222 to the FD unit 27.

In the reset transistor 24, the gate electrode is connected to the reset line 173, the drain electrode is connected to the pixel power supply Vdd, and the source electrode is connected to the FD unit 27, respectively. The high active reset pulse RST is given to the gate electrode of the reset transistor 24 through the reset line 173 from the row driver 13. The reset transistor 23 is turned on in response to the reset pulse RST, and resets the FD unit 27 by discarding the charge in the FD unit 27 to the pixel power supply Vdd.

In the selection transistor 25, for example, the gate electrode is connected to the selection line 174, and the drain electrode is connected to the pixel power supply Vdd. The high active selection pulse SEL is provided to the gate electrode of the selection transistor 25 through the selection line 174 from the row driver 13. The selection transistor 25 is turned on in response to the selection pulse SEL, and activates the amplifying transistor 26 by applying the pixel power supply Vdd to the drain electrode of the amplifying transistor 26 (a unit pixel). (20) to the selected state).

In the amplifying transistor 26, the gate electrode is connected to the FD unit 27, the drain electrode is connected to the source electrode of the selection transistor 25, and the source electrode is connected to the vertical signal line 18.

This amplifying transistor 26 is an input portion of a source follower circuit, which is a read circuit for reading out a signal obtained by photoelectric conversion in the photodiode 21. That is, the amplifying transistor 26 constitutes a current source (not shown) and a source follower circuit connected to one end of the vertical signal line 18 by connecting the source electrode to the vertical signal line 18.

In this circuit example, the selection transistor 26 has a circuit configuration connected between the pixel power supply Vdd and the drain electrode of the amplifying transistor 26, but the source electrode and the vertical signal line 18 of the amplifying transistor 26 are used. It is also possible to adopt a circuit configuration to be connected between them.

In addition, the unit pixel 20 is not limited to a pixel structure including four transistors of the transfer transistor 23, the reset transistor 24, the selection transistor 25, and the amplifying transistor 26. For example, a pixel structure consisting of three transistors for pixel selection by omitting the selection transistor 25 and switching the voltage of the pixel power supply Vdd may be used. The configuration of the pixel circuit is not concerned.

(Section structure)

3 is a cross-sectional view showing an outline of the cross-sectional structure from the photodiode 21 to the FD portion 27. In FIG. 3, the same code | symbol is attached | subjected to FIG. 2 and the corresponding part is shown.

The photodiode 21 has a first conductivity type (e.g. n-type) and a reverse conductivity type (e.g. p-type), e.g. n-type, on a first conductivity type, e. A region 211 is formed, a p + region 212 is formed in the surface layer portion, and is an embedded photodiode for storing photoelectrons in the n-type region 211.

In the charge storage section 22, the storage channel 223 is formed on the side closer to the photodiode 21 as the read channel 223, and the n-type floating diffusion region is formed on the side farther from the photodiode 21. The gate electrode 224 is provided on the read channel 223 and the accumulator 222. The signal charges read (transmitted) from the photodiode 21 by the read gate portion 221 are stored in the accumulation portion 222. The impurity concentration in the floating diffusion region serving as the storage unit 222 is a concentration that can be completely depleted, similar to the n-type region 211 of the photodiode 21.

In the transfer transistor 23, a gate electrode 231 thereof is provided adjacent to a charge accumulation unit (a floating diffusion region) 222 of the charge accumulation unit 22, and a transfer pulse TRG is applied to the gate electrode 231. Given, transfers the charge in the accumulation section 222 to the FD section 27. The FD portion 27 is formed with a concentration higher than that of the accumulation portion 222, that is, the n + region. Regions other than the photodiode 21 are shielded by a light shielding film 29 such as tungsten.

Here, the charge storage unit 22 is configured as a CCD, and no contact portion exists in the transfer path of the photodiode 21 to the floating diffusion region 222 to the FD unit 27. Therefore, since the photodiode 21 is an embedded photodiode and the charge storage unit 22 has a CCD configuration, the photodiode 21 → floating diffusion region 222 → the transfer path of the FD unit 27. Is capable of realizing complete transmission with no remaining transfer.

In addition, in the pixel structure, although the gate electrode 224 is provided on the floating diffusion region 222 in the charge storage unit 22, as shown in FIG. 4, the gate electrode 224A is provided as a read channel ( It is also possible to set it as the unit pixel 20A of the structure provided only on the 221. Thus, even in the unit pixel 20A adopting this pixel configuration, when the transfer pulse TRG is given to the gate electrode 224, the potential of the read channel 223 is deepened, so that the inside of the photodiode 21 is increased. The charge may be transferred to the accumulation unit 222.

In the configuration (structure) of the unit pixel 20 described above, the charge accumulation unit 222 of the charge accumulation unit 22 is used as the first charge accumulation unit, and the FD unit 27 is used as the second charge accumulation unit. The charge storage unit 22 constitutes a first transfer mechanism for transferring the charge of the photodiode 21 to the storage unit 222 which is the first charge storage unit.

The transfer transistor 23 constitutes a second transfer mechanism for transferring the charge of the storage unit 222 to the FD unit 27 which is the second charge storage unit. The reset transistor 24 constitutes a reset mechanism for resetting the FD unit 27. The amplifying transistor 26 constitutes a reading mechanism for reading a signal corresponding to the charge of the FD unit 27 to the vertical signal line 18.

(Global shutter)

The unit pixel 20 of the above structure is characterized by having a charge accumulation section 22 that temporarily stores (stores) signal charge between the photodiode 21 and the FD section 27. The technique for providing the charge storage unit 22 in the unit pixel 20 is a well-known technique (for example, see Japanese Patent Laid-Open No. 11-177076).

In the CMOS image sensor 10 in which the unit pixel 20 has the charge accumulator 22, a photoelectrically converted signal charge is simultaneously read from all the unit pixels and accumulated in the charge accumulator 22, thereby utilizing a mechanical shutter. Without this, all pixel batch electronic shutters (global shutters) are realized. Then, the signal charges temporarily stored in the charge storage section 22 are sequentially read in pixel row units by scanning by the row driver 13.

(Incompatibility of Unit Pixel Having Charge Accumulation Part)

In the unit pixel 20 having the charge storage unit 22, after the signal charge of the photodiode 21 is read into the charge storage unit 22, charge is transferred from the photodiode 21 to the charge storage unit 22. There is an inadequacy that the amount of charge of the charge accumulation section 22 that is overflowed and stored in advance is changed.

For example, it is assumed that the exposure time is set to 1/1000 second when the photodiode 21 is a light amount that becomes full at an exposure time (accumulation time) that is slightly longer than 1/1000 second. Then, the signal charges photoelectrically converted by the photodiode 21 are simultaneously read from all the unit pixels and accumulated in the charge accumulator 22, and then the signal charges in the charge accumulator 22 are sequentially read by row scanning. For example, it takes about 1/15 seconds to take a long time. In this case, charges continue to overflow from the photodiode 21 to the charge storage unit 22 during most of the row scanning period of about 1/15 second.

In addition, by providing the charge storage unit 22 in the unit pixel 20, the pixel size is increased by the amount of the charge storage unit 22. If the pixel size is about the same as the case where the charge storage section 22 does not exist, the size of the photodiode 21 must be made smaller by the charge storage section 22, which is not suitable for reducing the dynamic range. have.

<2. Features of the Invention (Embodiment)

In the solid-state imaging device according to one embodiment of the present invention, for example, a CMOS image sensor, the unit pixel 20 has a charge accumulating portion 22, and incident light is received through the mechanical shutter on the imaging surface of the CMOS image sensor. On the premise that The global shutter is realized by the mechanical shutter, and the dynamic range is expanded by using the charge storage unit 22.

In other words, in the present embodiment, the global shutter and the dynamic range expansion can be made compatible while eliminating the problem of shading that a light shield other than the photodiode 21 of the unit pixel 20 must be completely shielded when the mechanical shutter is not used. It is characterized by being able.

Here, although the case of the CMOS image sensor in which the unit pixel which detects the electric charge corresponding to the light quantity of visible light as a physical quantity is arrange | positioned two-dimensionally in matrix form was demonstrated as an example, it is not limited to this. That is, the present invention can be applied to the entire X-Y address type solid-state imaging device in which the unit pixel 20 has the charge accumulation section 22. The solid-state imaging device may be formed as a single chip or may be in the form of a module having an imaging function packaged by integrating the imaging unit, the signal processing unit, or the optical system. And the solid-state imaging device which concerns on this invention is an image taking part (photoelectric conversion part) in electronic devices, such as an imaging device, such as a digital still camera and a video camera, and a portable terminal device which has an imaging function, such as a mobile telephone. It is available.

<3. Electronic device according to the present invention>

[3-1. System configuration]

Next, the electronic apparatus by this invention which uses the solid-state imaging device which concerns on this embodiment in combination with a mechanical shutter is demonstrated. Here, the case of an imaging device, for example, a digital still camera, as an electronic device is demonstrated.

5 is a block diagram showing an example of a configuration of an imaging device according to the present invention. As shown in FIG. 5, the imaging device according to the present invention includes, in addition to the CMOS image sensor 10 described above, an optical block 51, a camera signal processor 52, an encoder / decoder 53, and a controller 54. ), An input unit 55, a display unit 56, and a recording medium 57.

The optical block 51 includes a lens 511 for condensing light from a subject to the CMOS image sensor 10, an aperture 512 for adjusting the amount of light, a mechanical shutter 513 for selectively receiving light, and the like. Have The global shutter is realized in the still image capturing mode by the shutter operation by the mechanical shutter 513.

In addition, the optical block 51 also moves a lens 511 to perform a lens driving mechanism for focusing or zooming, an iris mechanism for controlling the aperture 12, and a mechanism for driving the mechanical shutter 513. A shutter mechanism is provided. This mechanism part is driven based on the control signal from the control part 54. FIG.

The CMOS image sensor 10 is an X-Y address type solid-state imaging device, and in response to a control signal from the control unit 54, timing control such as exposure, signal readout, reset, etc. of the above-described unit pixel 20 is performed.

Under the control of the control unit 54, the camera signal processing unit 52 performs camera signal processing such as white balance adjustment processing and color correction processing on the image signal output from the CMOS image sensor 10.

The encoder / decoder 53 operates under the control of the control unit 54, and has a predetermined still picture data format such as a JPEG (Joint Photographic Coding Experts Group) method for an image signal output from the camera signal processing unit 52. The compression encoding process is performed.

In addition, the encoder / decoder 53 performs decompression processing on the coded data of the still picture supplied from the control unit 54. In the encoder / decoder 53, compression coding / extension decoding processing of a moving picture may be performed by a moving picture expert group (MPEG) method or the like.

The control unit 54 is a microcontroller configured by, for example, a central processing unit (CPU), a read only memory (ROM), a random access memory (RAM), and the like. Then, the control unit 54 collectively controls each part of the image capturing apparatus by executing a program stored in a ROM or the like.

The input unit 55 is configured with, for example, various operation keys such as a shutter release button, a lever, a dial, and the like, and outputs various control signals in response to an input operation by the user to the control unit 54.

The display unit 56 is formed of a display device such as an LCD (Liquid Crystal Display) or the like, or an interface circuit therefor, and generates an image signal for display on the display device from an image signal supplied from the control unit 54. The display unit 56 causes the display device to display an image by supplying the generated image signal to the display device. The recording medium 59 is implemented as, for example, a portable semiconductor memory, an optical disk, a hard disk drive (HDD), a magnetic tape, or the like, and controls the image data file encoded by the encoder / decoder 53. ) And remember. In addition, the specified data is read based on the control signal from the control unit 54 and output to the control unit 54.

In the above, although the digital still camera was taken as an example of an imaging device, it is not limited to a digital still camera but can apply to the whole imaging device which has the mechanical shutter which selectively receives the incident light from a subject. Moreover, the form of the module state mounted in the electronic device which has an imaging function, ie, a camera module, may be used as an imaging device.

3-2. Fairy Tale Mode]

Next, the operation in the moving picture mode such as the monitoring mode in the imaging device having the above configuration, that is, the digital still camera, will be described based on the pixel circuit of FIG. 2.

In a moving image mode such as a monitoring mode, the signal charges from the photodiode 21 by a shutter operation having no accumulation time by one row and having no synchronization between pixel rows, that is, a rolling shutter operation for setting the start and end of exposure for each pixel row. Read it. The conceptual diagram of row scanning at this time is shown in FIG. By the row scanning by the row driver 13, the first shutter row, the second shutter row, and the read row are sequentially scanned in the order shown in Fig. 6. Here, the row interval (interval of scanning timing) between the first shutter row and the second shutter row is long, and the row interval between the second shutter row and the read row is short.

7 shows driving timing in the 1H period (the period in which the scan is only one row). Regarding the first shutter row, the read pulses ROG, the transfer pulses TRG, and the reset pulses RST are made active (high level), and then these pulses ROG, TRG, and RST are decremented in that order. Set to the active (low level) state. This resets the photodiode 21 and the charge accumulator 222 of the charge accumulator 22 of each pixel in the first shutter row. After this reset operation, the photodiode 21 starts to accumulate photoelectrons newly.

Regarding the second shutter row, first, the transfer pulse TRG and the reset pulse RST are made active, and then these pulses TRG and RST are inactive in that order. The charge accumulating part 222 of () is reset. Next, by making the read pulse ROG active, the charge of the photodiode 21 is transferred to the charge accumulator 222 of the charge accumulator 22. The charge transferred at this time is a photoelectrically converted charge in the period from the timing of scanning the first shutter row to this pixel to the timing of scanning the second shutter row.

Regarding the read row, pixel selection is performed by making the selection pulse SEL active. In the period during which the selection pulse SEL is in the active state, the FD unit 27 is reset by first setting the reset pulse RST to the active state. The signal corresponding to the voltage of the FD unit 27 at the time of reset is a first reset level (hereinafter referred to as "Rst1 level"), which is a column processing unit (a) through the vertical signal line 18 from the amplifying transistor 26. 14).

Next, by making the transfer pulse TGR active, the transfer transistor 23 transfers the photoelectrons from the charge accumulation unit 222 of the charge accumulation unit 22 to the FD unit 27. The photoelectron at this time is a signal of a period from the timing of scanning the first shutter row to the timing of scanning the second shutter row. The signal corresponding to the voltage of the FD unit 27 at the time of transmission of the photoelectrons is the first signal level (hereinafter referred to as "FD level"), which is a column from the amplifying transistor 26 via the vertical signal line 18. It is supplied to the processing part 14.

Subsequently, the FD unit 27 is reset again by making the reset pulse RST active again. The signal corresponding to the voltage of the FD unit 27 at the time of reset is a second reset level (hereinafter referred to as "Rst2 level"), which is a column processing unit through the vertical signal line 18 from the amplifying transistor 26. 14 is supplied. Next, the read pulse ROG and the transfer pulse TRG are in an active state, and then the read pulse ROG is in an inactive state, whereby the photoelectrons of the photodiode 21 are charged. Transfer to the FD unit 27 through. The photoelectrons transmitted at this time are signals of a period from the timing of scanning the second shutter row to the timing of scanning the read row. The signal corresponding to the voltage of the FD unit 27 at this time is the second signal level (hereinafter referred to as "PD level"), which is a column processing unit through the vertical signal line 18 from the amplifying transistor 26. 14 is supplied.

The column processing unit 14 performs arithmetic processing taking the difference between the FD level and the Rst1 level supplied through the vertical signal line 18 and the difference between the PD level and the Rst2 level. When the former signal obtained by this calculation process is an FD signal and the latter signal is a PD signal, the FD signal is changed from the timing of scanning the first shutter row to the timing of scanning the second shutter row. It is a signal of long accumulation time. Therefore, this FD signal is a high sensitivity signal. On the other hand, the PD signal is a signal of short accumulation time from the timing of scanning the second shutter row to the timing of scanning the read row. Therefore, this PD signal is a signal of low sensitivity.

By synthesizing the high sensitivity signal and the low sensitivity signal, a signal having a wide dynamic range can be obtained. This synthesizing process can also be performed in the column processing unit 14, and includes an output circuit unit provided at an output end of the chip (the semiconductor substrate 11 of FIG. 1) or a signal processing unit outside the chip (Fig. 5). The camera signal processing unit 52 can also perform the operation.

(Composite Processing for Wide Dynamic Range)

Here, an example of the synthesis process for the photodynamic range is described. 8 shows an example of the configuration of the synthesis processing unit 60 which performs a synthesis process for wide dynamic range.

The synthesis processing unit 60 according to this example has a configuration including a level determining unit 61, a multiplication unit 62, and a signal selection unit 63. The level determining unit 61 makes a level determination by comparing with a reference value whether or not the FD signal as the first signal is at or near the saturation level and linearity is deteriorating. The multiplier 62 multiplies the sensitivity ratio α between the PD signal and the FD signal by the PD signal as the second signal.

Regarding the sensitivity ratio α, for example, the interval from the second shutter row to the read row that defines the exposure period of the PD signal, and the first shutter row to the second shutter row that defines the exposure period of the FD signal It can be obtained from the ratio of the intervals of.

The signal selector 62 uses the FD signal and the output signal of the multiplier 62 as two inputs, and selects either one of the two inputs based on the determination result of the level determining unit 61 to achieve wide dynamic range. It is a signal. Specifically, the signal selector 62 selects the output signal of the multiplier 62, that is, the PD signal x sensitivity ratio α, when the FD signal is at a saturation level or a size where the linearity is deteriorating. Otherwise, the FD signal is selected.

In this way, when the FD signal is at the saturation level or higher than the reference value, the PD signal x sensitivity ratio? There is a number. According to this synthesis processing unit 60, the synthesis processing can be realized by simple signal processing as described above, and the circuit scale may be small. Therefore, with respect to the synthesis processing unit 60, it is easy to mount to the column processing unit 14 which has a space limitation.

Here, if one of the PD signal x sensitivity ratio α and the FD signal is simply selected by the signal selector 62, the signal called solarization is located near the joint of the PD signal x sensitivity ratio α and the FD signal. There is a fear that a step may occur. In order to suppress the step difference, the weight of the FD signal becomes heavy on the side where the signal near the seam is small, and the weight of (PD signal x sensitivity ratio α) becomes heavy on the side of the signal near the seam. The weighted averaging process may be performed.

For example, when the sensitivity ratio α is α = 4, the level of the PD signal is 1/4 of the level of the FD signal, and the PD signal may be quadrupled. The composite signal based on the weighted average is expressed by the formula: composite signal = FD signal × β + PD signal × α × (1-β).

9 shows the relationship between the light amount and the signal level for the FD signal and the PD signal. In Fig. 9, the level a is a reference value (second reference value) for determining that the FD signal is small, and is set at about half of the saturation level, for example. In addition, the level (b) is a reference value (first reference value) for determining that the FD signal is at or near the saturation level and the linearity is deteriorating.

The weighted average process described above can be realized by providing the weighted average unit 64 at the rear end of the signal selector 63, as shown in FIG. Specifically, in the synthesis processing unit 60A having the weighted average unit 64, as the signal processing in the weighted average unit 64, the value of the coefficient β corresponding to the level of the FD signal is set, and the above calculation is performed. The process is performed.

11 shows an example of the relationship between the FD signal and the value of the coefficient β. When the FD signal is a small signal below the reference value a, the value of the coefficient β is set to one. When the FD signal is greater than or equal to the reference value b, i.e., the saturation level or the magnitude of the linearity deteriorating, the value of the coefficient β is zero. When the FD signal is a <FD signal <b, the value of the coefficient β is linearly changed from 1 to 0 depending on the magnitude of the FD signal.

By setting the value of such a coefficient β, the weighted average process is as follows.

(1) When FD signal ≤ a, synthesized signal = FD signal

(2) When b≤FD signal, synthesized signal = PD signal x sensitivity ratio (α)

(3) When a <FD signal <b, the synthesized signal = FD signal × β + PD signal × α × (1-β)

By performing the above-described weighted average processing, it is possible to smoothly connect both the PD signal x sensitivity ratio α and the FD signal, so that the signal in the vicinity of the seam between the PD signal X sensitivity ratio α and the FD signal is The step can be suppressed. The synthesizing processing by the synthesizing units 60 and 60A is the same for not only moving pictures but also still images described later.

By sequentially selecting the pixel rows for performing the above-described operation by the row driver 13 and executing the rolling shutter operation, the frame memory is not required, or the reset level does not rise to the first output signal. A signal with different sensitivity can be obtained from one pixel. The dynamic range of the CMOS image sensor 10 can be expanded by synthesizing a signal having a different sensitivity, that is, a signal having a high sensitivity and a signal having a low sensitivity.

In particular, by obtaining a signal having different sensitivity from one pixel, there is no deterioration in the resolution of the output image. That is, since the unit pixel on the imaging surface and the pixel of the output image correspond one-to-one, a plurality of unit pixels adjacent to each other are grouped to correspond to one pixel of the output image, and the sensitivity is obtained from the plurality of unit pixels of the group. There is also no deterioration in the resolution of the output image as in the prior art that different signals are obtained.

Here, it is preferable that the first read FD signal is a signal of longer exposure than the later read PD signal. If the PD signal read later is a signal for a long time exposure, when a large amount of light enters the photodiode 21 within the long time exposure period, the photodiode 21 enters the charge storage unit 22. This is because the charge overflows and the amount of charge in the accumulation section 222 is changed.

Therefore, by increasing the interval from the first shutter row to the second shutter row and shortening the interval from the second shutter row to the read row, at a later time in which charge is stored in the storage unit 222, the photodiode ( It is possible to make it difficult for the accumulator 222 to overflow from 21. In addition, since the PD signal to be read later is a signal of short exposure time, the amount of charge transferred from the photodiode 21 to the FD unit 27 through the charge storage unit 22 is at least reduced. It is easy to carry out charge transfer.

In the short time from the timing of scanning the second shutter row to the timing of scanning the read row, light that is strong enough to overflow the charge from the photodiode 21 is only detected because it is detected that it is saturated even in the PD signal. Therefore, by making the short and long exposure time in this order, i.e., by making the FD signal read out earlier as a signal for exposure longer than the PD signal read out later, an extra path for causing the excess charge from the photodiode 21 to escape to another place It does not necessarily need to be provided in a pixel.

In the charge storage section 22, it is preferable to set the Low side to a negative voltage such as -1 V with respect to the read pulse ROG applied to the gate electrode 224. By setting the Low side of the read pulse ROG to a negative voltage, holes can be generated at the interface, so that generation of dark current from the interface can be prevented.

[3-3. Still image mode]

Next, the operation in the still mode will be described based on the pixel circuit of FIG. In the case of a still picture, it is a big problem that distortion occurs with respect to a moving object. Therefore, it is necessary to ensure concurrency with respect to the exposure time of each pixel. In this embodiment, the shutter operation by a mechanical shutter is used for ensuring the concurrency of the exposure time. The charge storage unit 22 is used not for realizing the global shutter operation but for the purpose of expanding the dynamic range.

A specific example of the operation in the still mode will be described with reference to the operation explanatory diagram of FIG. First, the mechanical shutter 513 (see FIG. 5) disposed in the incident optical path to the CMOS image sensor 10 executes the first batch shutter operation in the exposure period of the open state Open. In this first batch shutter operation, the read pulses ROG, the transfer pulses TRG, and the reset pulses RST are made active for all pixel rows, and then these pulses ROG, TRG, and RST. By making the inactive state in that order, the photodiode 21 and the charge accumulator 222 of the charge accumulator 22 are simultaneously reset in all the unit pixels. Here, since driving all of the pixels at the same time causes a power drop or the like, there is also known a technique that allows the operation to be completed at an extremely short time such as resetting by several tens of rows and to be regarded as substantially simultaneous. Henceforth, such a technique is included when referring to all the said unit pixel simultaneous.

Next, the second batch shutter operation is executed. In this second batch shutter operation, the transfer pulse TRG and the reset pulse RST are made active for all the pixel rows, and then the pulses TRG and RST are inactive in that order, thereby all The FD unit 27 is reset at the same time in the unit pixel. Then, after the reset pulse RST becomes inactive, the read pulse ROG is made active so that the charges (photoelectrons) of the photodiodes 21 accumulated in the period of (a) are simultaneously charged in all the unit pixels. The charge is transferred to the charge accumulation unit 222 of the accumulation unit 22.

Next, by setting the mechanical shutter 513 to the closed state (Close), the exposure period is finished. At this point in time, the photodiode 21 accumulates photoelectrons over the period of (b). Here, the period b is shorter than the period a. The pixel array unit 12 is scanned by the row driver 13 in the read row.

Regarding the read row, the same operation as in the moving picture mode is performed. Specifically, in the period in which the selection pulse SEL is in an active state, the FD unit 27 is reset by first setting the reset pulse RST in the active state to read the Rst1 level. Subsequently, by making the transfer pulse TGR active, the transfer transistor 23 transfers photoelectrons from the charge accumulation unit 222 of the charge accumulation unit 22 to the FD unit 27 and reads the FD level. .

Next, the reset pulse RST is made active to reset the FD unit 27 again to read the Rst2 level. Subsequently, the read pulse ROG and the transfer pulse TRG are made into an active state, and then the read pulse ROG and the transfer pulse TRG are made into an inactive state, whereby the photoelectrode of the photodiode 21 has an FD portion. (27), and the PD level is read. In this way, the FD level and the Rst1 level, and the PD level and the Rst2 level are supplied to the column processor 14.

The signal processing in the column processing unit 14 also takes the difference between the FD level and the Rst1 level, and the difference between the PD level and the Rst2 level as in the moving picture mode. If the former is used as the FD signal and the latter is the PD signal, the FD signal is a signal of a long period (a) from the operation timing of the first batch shutter to the operation timing of the second batch shutter, and is a high sensitivity signal. On the other hand, the PD signal is a signal of a short period (b) from the timing of scanning the second shutter row to the timing of scanning the read row, and is a low sensitivity signal. Then, by synthesizing the FD signal as the high sensitivity signal and the PD signal as the low sensitivity signal, a signal having a wide dynamic range can be obtained.

Here, it is preferable that the first read FD signal is a signal of longer exposure than the later read PD signal. If the PD signal read later is a signal for a long time exposure, when a large amount of light enters the photodiode 21 within the long time exposure period, the charge accumulates from the photodiode 21 to the charge storage unit 22, This is because the amount of charge in the accumulation portion 222 is changed. Thus, the period (a) from the operation timing of the first batch shutter to the operation timing of the second batch shutter is lengthened, and the period (b) from the operation timing of the second batch shutter to the close of the mechanical shutter 513 is shortened. do.

In this way, charges are transferred from the photodiode 21 to the charge accumulator 222 of the charge accumulator 22 in the latter period during which charges are stored in the charge accumulator 222 of the charge accumulator 22. It can make it hard to overflow. In addition, if the PD signal to be read later is a signal of short exposure time, since the amount of charge transferred from the photodiode 21 to the FD unit 27 through the charge storage unit 22 is minimal, It is easy to carry out charge transfer.

Although the charge may overflow from the photodiode 21 in the period (b) from the operation timing of the second batch shutter to the close of the mechanical shutter 513, in that case, since the amount of light is detected as saturation abnormal, there is no problem. . Therefore, the long and short exposure time is set in this order, that is, the extra parse for escaping the electric charges overflowing from the photodiode 21 to the other place by making the FD signal first read out longer than the PD signal read out later. Does not necessarily have to be provided in the pixel.

The scanning of the read row is performed by closing the mechanical shutter 513, so that the unit pixel 20 has a charge accumulating portion 22, and the global shutter is used by using the charge accumulating portion 22. The nonconformity of the prior art realized (refer to Unexamined-Japanese-Patent No. 11-177076) can be eliminated. That is, the situation that the charge overflows from the photodiode 21 with the light coming in for a long period of time for the read scan and changes the amount of charge in the charge accumulating portion 222 of the charge accumulating portion 22 can be avoided.

3-4. Effects of the present embodiment]

As described above, the unit pixel 20 uses the charge accumulation unit 22 in the CMOS image sensor 10 having the charge accumulation unit 22 between the photodiode 21 and the FD unit 27. The dynamic range can be enlarged by this. Specifically, by using the charge storage unit 22, a plurality of signals having different sensitivities are obtained, and the photodynamic range can be achieved by synthesizing the plurality of signals. Concurrency of the exposure period in the screen during still image capturing can be ensured by the shutter operation by the mechanical shutter 513.

In addition, since a plurality of signals having different sensitivity can be obtained from one unit pixel 20, there is no deterioration in resolution as in the case of using a plurality of pixels to obtain a signal having different sensitivity. In addition, a frame memory for synchronizing signals with different sensitivities, such as when a plurality of signals with different sensitivities are output from one pixel at different timing in row scanning, is unnecessary.

In addition, since signals with different sensitivities are signals from the same pixel, they are not affected by the influence of false color due to spatial deviation or the characteristic deviation between pixels as in the case of signals from other pixels. The synthesis process for wide dynamic range can be performed.

In addition, when the charge accumulating part 22 which temporarily accumulates electric charge is interposed between the photodiode 21 and the FD part 27, the following effect can be acquired. In other words, when the Low side of the read pulse ROD applied to the gate electrode 224 of the charge storage unit 22 is set to a negative voltage, holes can be generated on the surface of the charge storage unit 22. The generation of dark currents can be reduced.

In addition, since the charge transfer operation is performed after resetting the FD unit 27, the read processing is performed in which the reset levels Rst1 and Rst2 are output before the FD level and PD level together with the signals of high sensitivity and low sensitivity. Therefore, the reset noise does not rise as in the case of the prior art in which the reset level is output later with respect to the signal output first from one pixel.

As described above, the charge storage unit 22 temporarily stores the electric charges read from the photodiode 21 even if the CCD is not configured to provide the gate electrode 224 on the floating diffusion region 222. If it is of the structure (mechanism) which can transmit then, it is good. For example, it is also possible to adopt a structure such as providing one transfer gate portion and a charge accumulation portion. In the charge storage unit 22, the amount of saturated accumulated charge in the storage unit 22 may be slightly larger than that of the photodiode 21 so that the charge of the photodiode 21 can be received. Even in such a relationship of the saturation accumulated charge amount, if the accumulation time ratio is n times, for example, 8 times, the dynamic range can be expanded to 8 times. In order to enlarge the dynamic range by 8 times, it is not necessary to provide the charge storage unit 22 having a large capacity of about 8 times.

In the above embodiment, the case where two signals having different sensitivity of a high sensitivity signal and a low sensitivity signal are obtained from one unit pixel 20 has been described as an example. However, by providing a plurality of charge storage units 22, The present invention is similarly applicable to the case where three or more different signals are obtained from one unit pixel 20.

As mentioned above, although this invention was demonstrated based on the said Example, this invention is not limited only to the structure of the said Example, Comprising: Various deformation | transformation, correction which a person skilled in the art can make within the scope of invention of each claim of a claim is included. Of course.

Claims (32)

A photoelectric conversion unit that accumulates electric charges generated by photoelectric conversion;
A first transfer mechanism for transferring the charge from the photoelectric conversion section to a first charge storage section;
A second transfer mechanism for transferring the charge from the first charge accumulator to a second charge accumulator;
A reading mechanism for reading out a signal corresponding to the charge to a signal line;
A pixel array portion in which unit pixels are two-dimensionally arranged in a matrix form, each having a reset mechanism for resetting the second charge accumulation portion;
The photoelectric conversion unit is reset,
The first transfer mechanism transfers the charge from the photoelectric conversion section to the first charge storage section,
The second transfer mechanism and the read mechanism read out a first signal corresponding to the charge of the first charge storage portion to the signal line,
And a row driver for driving the unit pixel such that the first transfer mechanism, the second transfer mechanism, and the readout mechanism read the second signal corresponding to the charge of the photoelectric conversion portion to the signal line. Solid-state imaging device. The method of claim 1,
The row drive unit,
A first shutter row for resetting the photoelectric converter;
A second shutter row for transferring the charges of the photoelectric conversion section to the first charge storage section by the first transfer mechanism;
The first signal is read into the signal line by the second transmission mechanism and the reading mechanism, and the second signal is read by the first transmission mechanism, the second transmission mechanism, and the reading mechanism. Scan a read row to read on the signal line,
The first shutter row, the second shutter row, and the read row may include a period from the timing of scanning the first shutter row to the timing of scanning the second shutter row from the timing of scanning the second shutter row. And scanning sequentially in a different period from the time until the timing of scanning the read rows. The method of claim 2,
The period from the timing of scanning the first shutter row to the timing of scanning the second shutter row is longer than the period from the timing of scanning the second shutter row to the timing of scanning the read row. Imaging device. The method of claim 1,
The first transfer mechanism includes a channel provided between the photoelectric conversion unit and the first charge storage unit;
And a gate electrode provided on the channel and the first charge storage portion. The method of claim 4, wherein
Wherein the voltage applied to the gate electrode during the period of preserving the charge in the first charge storage portion is a voltage which, under the gate electrode, generates a charge of opposite polarity to the charge of the first charge storage portion. Solid-state imaging device. The method of claim 1,
Light is incident on the photoelectric conversion unit through a mechanical shutter,
The row drive unit,
Simultaneously resets the photoelectric conversion parts of all the unit pixels in the open state of the mechanical shutter,
The first transfer mechanism transfers the charges of the photoelectric conversion section simultaneously to the first charge storage section in all the unit pixels,
In the closed state of the mechanical shutter, the unit pixels of the pixel array unit are sequentially selected in units of rows,
The first signal is read into the signal line by the second transmission mechanism and the reading mechanism,
And scanning the second signal while reading the second signal by the first transfer mechanism, the second transfer mechanism, and the read mechanism, onto the signal line. The method of claim 6,
And the period from simultaneous reset of all the pixels to simultaneous transfer to the first charge storage section in all the pixels is longer than the continuous period until closing the mechanical shutter. The method according to claim 2 or 6,
And a synthesis processing unit for synthesizing the first signal and the second signal output through the signal line. The method of claim 8,
The synthesis processing section is configured to set the sensitivity ratio between the first signal and the second signal to be α. And employing the first signal when the first signal is smaller than the reference value. The method of claim 8,
The synthesis processor is further configured to provide the first signal and the second signal when the first signal is smaller than the saturation level or the first reference value close to the saturation level, or larger than the second reference value smaller than the first reference value. A weighted average process is performed on the signal obtained by the signal x? Of the solid-state imaging device. The method of claim 10,
The synthesis processing unit performs a weighted average process by a calculation in which the first signal × β + the second signal × α × (1-β) is performed when the coefficient is β. A photoelectric conversion unit that accumulates electric charges generated by photoelectric conversion;
A first transfer mechanism for transferring the charge from the photoelectric conversion section to a first charge storage section;
A second transfer mechanism for transferring the charge from the first charge accumulator to a second charge accumulator;
A reading mechanism for reading out a signal corresponding to the charge to a signal line;
A driving method of a solid-state imaging device in which unit pixels each having a reset mechanism for resetting the second charge storage unit are two-dimensionally arranged in a matrix form,
A first shutter row for resetting the photoelectric converter;
A second shutter row for transferring the charges of the photoelectric conversion section to the first charge storage section by the first transfer mechanism;
The first transfer mechanism, the second transfer mechanism, and the readout read the first signal corresponding to the charges of the first charge storage portion by the second transfer mechanism and the readout mechanism, to the signal line. A readout row for reading a second signal corresponding to the charge of the photoelectric conversion section to the signal line by a mechanism;
Scanning is performed sequentially from the timing of scanning the first shutter row to the timing of scanning the second shutter row, different from the timing of scanning the second shutter row to the timing of scanning the read row. A method of driving a solid-state imaging device. A photoelectric conversion unit that accumulates electric charges generated by photoelectric conversion;
A first transfer mechanism for transferring the charge from the photoelectric conversion section to a first charge storage section;
A second transfer mechanism for transferring the charge from the first charge accumulator to a second charge accumulator;
A reading mechanism for reading out a signal corresponding to the charge to a signal line;
A driving method of a solid-state imaging device in which unit pixels each having a reset mechanism for resetting the second charge storage unit are two-dimensionally arranged in a matrix form,
Light is incident on the photoelectric conversion unit through a mechanical shutter,
Simultaneously resets the photoelectric conversion parts of all the unit pixels in the open state of the mechanical shutter,
The first transfer mechanism transfers the charges of the photoelectric conversion section simultaneously to the first charge storage section in all the unit pixels,
In the closed state of the mechanical shutter, the unit pixels of the pixel array unit are sequentially scanned in rows,
The second transfer mechanism and the read mechanism read out a first signal corresponding to the charge of the first charge storage portion to the signal line,
And said first transfer mechanism, said second transfer mechanism, and said readout mechanism read out a second signal in response to said charge on said photoelectric conversion portion to said signal line. A photoelectric conversion unit that accumulates electric charges generated by photoelectric conversion;
A first transfer mechanism for transferring the charge from the photoelectric conversion section to a first charge storage section;
A second transfer mechanism for transferring the charge from the first charge accumulator to a second charge accumulator;
A reading mechanism that reads a signal corresponding to the charge of the second charge storage portion to a signal line;
A pixel array unit in which unit pixels each having a reset mechanism for resetting the second charge storage unit are two-dimensionally arranged in a matrix form;
A first shutter row for resetting the photoelectric converter;
A second shutter row for transferring the charges of the photoelectric conversion section to the first charge storage section by the first transfer mechanism;
The second transfer mechanism and the read mechanism read the first signal corresponding to the charge of the first charge storage portion to the signal line, and the first transfer mechanism, the second transfer mechanism, and the read mechanism A readout row for reading a second signal in response to the charge in the photoelectric conversion section to the signal line,
Rows in which the period from the timing of scanning the first shutter row to the timing of scanning the second shutter row differs from the timing of scanning the second shutter row to timing of scanning the read row An electronic device having a solid-state imaging device, comprising a drive unit. A photoelectric conversion unit that accumulates electric charges generated by photoelectric conversion;
A first transfer mechanism for transferring the charge from the photoelectric conversion section to a first charge storage section;
A second transfer mechanism for transferring the charge from the first charge accumulator to a second charge accumulator;
A reading mechanism that reads a signal corresponding to the charge of the second charge storage portion to a signal line;
A solid-state imaging device having a pixel array unit in which unit pixels each having a reset mechanism for resetting the second charge storage unit are two-dimensionally arranged in a matrix form;
A mechanical shutter for selectively receiving incident light with respect to an imaging surface of the solid-state imaging device,
The row driver of the solid-state imaging device,
Simultaneously resets the photoelectric conversion parts of all the unit pixels in the open state of the mechanical shutter,
The first transfer mechanism transfers the charges of the photoelectric conversion section simultaneously to the first charge storage section in all the unit pixels,
In the closed state of the mechanical shutter, unit pixels of the pixel array unit are sequentially scanned in rows,
The first signal corresponding to the charge of the first charge storage portion is read by the second transfer mechanism and the read mechanism to the signal line,
And a second signal corresponding to the electric charge of the photoelectric conversion section is read into the signal line by the first transfer mechanism, the second transfer mechanism, and the read mechanism. From the charge accumulation region, the first signal corresponding to the accumulation of the signal charge during the first period is read out,
Reading from the charge accumulation region a second signal corresponding to another accumulation of signal charges during a second period of time,
The first period is a period from the time of performing the first shutter operation to the time of performing the second shutter operation,
And said second period is a period from the time of performing the second shutter operation to the time before or during the scanning of the read row. 17. The method of claim 16,
The signal charge corresponding to the other accumulation is accumulated in the photoelectric conversion element. 17. The method of claim 16,
The first shutter operation is performed for a plurality of pixel rows during a first interval of an exposure period,
And the second shutter operation is performed for a plurality of pixel rows during a second interval of the exposure period. 17. The method of claim 16,
And the first and second shutter operations are performed line by line. 19. The method of claim 18,
The first shutter operation is performed simultaneously in the plurality of pixel rows,
And said second shutter operation is performed simultaneously in said plurality of pixel rows. 17. The method of claim 16,
And a mechanical shutter closes after the second shutter operation. The method of claim 21,
And the mechanical shutter is closed for a period of scanning the read row. The method of claim 22,
And the mechanical shutter is closed to terminate the second period of time. 17. The method of claim 16,
And the second period after the first period is shorter than the first period. 17. The method of claim 16,
To reset the charge accumulation region, a first reset operation is performed before the read step of the first signal,
Perform a first transfer operation to transfer the signal charge from the charge accumulation section,
And said first transfer operation occurs between said first reset operation and readout of said first signal. 17. The method of claim 16,
To reset the charge accumulation region, to perform a second reset operation before the readout of the second signal,
To transfer a signal charge from the charge accumulation region, to perform a second transfer operation,
And said second transfer operation occurs after said second reset operation. 17. The method of claim 16,
And performing a combining process of adding the first signal to the second signal. The method of claim 27,
The synthesis process,
Compare the first signal to a first reference value to determine a saturation level of the first signal,
Modifying the second signal based on a sensitivity ratio between the first signal and the second signal to obtain a changed second signal,
And selecting one of the first signal and the modified second signal based on the comparison to generate an output signal. The method of claim 28,
The sensitivity ratio is a ratio of an interval between the second shutter row that determines the exposure period for the first signal and the first shunt row that determines the exposure period for the second signal. It is a ratio (ratio), The manufacturing method of the solid-state imaging device characterized by the above-mentioned. The method of claim 28,
The synthesis process,
When the coefficient β is a value between 0 and 1, a weighted average of the output signal based on the coefficient β if the first reference signal is between the first reference value and the second reference value The process is performed, The manufacturing method of the solid-state imaging device characterized by the above-mentioned. A plurality of pixels including a photoelectric change element and a charge accumulation region,
To read from the charge accumulation region a first signal corresponding to accumulation of signal charges during the first period and read from the charge accumulation region a second signal corresponding to another accumulation of signal charges during the second period. Including a configured injection part,
The first period is a period from the time of performing the first shutter operation to the time of performing the second shutter operation,
And said second period is a period from a time of performing a second shutter operation to a time before or during a period of scanning a read row. A plurality of pixels including a photoelectric change element and a charge accumulation region,
To read from the charge accumulation region a first signal corresponding to accumulation of signal charges during the first period and read from the charge accumulation region a second signal corresponding to another accumulation of signal charges during the second period. Including a configured injection part,
The first period is a period from the time of performing the first shutter operation to the time of performing the second shutter operation,
And said second period is a period from a time of performing a second shutter operation to a time before or during a period of scanning a read row.

Images