KR20100138013A - Light emitting device chip and manufacturing method thereof - Google Patents

Light emitting device chip and manufacturing method thereof Download PDF

Info

Publication number
KR20100138013A
KR20100138013A KR1020090056335A KR20090056335A KR20100138013A KR 20100138013 A KR20100138013 A KR 20100138013A KR 1020090056335 A KR1020090056335 A KR 1020090056335A KR 20090056335 A KR20090056335 A KR 20090056335A KR 20100138013 A KR20100138013 A KR 20100138013A
Authority
KR
South Korea
Prior art keywords
chip
light emitting
emitting device
substrate
groove line
Prior art date
Application number
KR1020090056335A
Other languages
Korean (ko)
Other versions
KR101088392B1 (en
Inventor
박은현
Original Assignee
주식회사 세미콘라이트
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 주식회사 세미콘라이트 filed Critical 주식회사 세미콘라이트
Priority to KR20090056335A priority Critical patent/KR101088392B1/en
Priority to PCT/KR2010/002605 priority patent/WO2010150972A2/en
Publication of KR20100138013A publication Critical patent/KR20100138013A/en
Application granted granted Critical
Publication of KR101088392B1 publication Critical patent/KR101088392B1/en

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0095—Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/16—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous

Abstract

PURPOSE: A light emitting device chip and a manufacturing method thereof are provided to improve the extrication efficiency of light generated in an active layer by asymmetrically forming at least one pair of sides which face each other. CONSTITUTION: At least one or more groove lines are formed on the front and rear of a substrate(100) to determine the size of a single light emitting device chip. One or more groove lines on the rear of the substrate are formed to be mutually offset with one or more groove lines on the front of the substrate. A single light emitting device chip(170) with one pair of asymmetrical sides to face each other is made by chip-braking between one or more groove lines on the front of the substrate and the one or more groove lines on the rear of the substrate.

Description

Light emitting device chip and manufacturing method thereof {LIGHT EMITTING DEVICE CHIP AND MANUFACTURING METHOD THEREOF}

The present invention relates to a light emitting device chip and a method for manufacturing the same, and more particularly, to a light emitting device chip and a method for manufacturing the light extraction efficiency can be improved.

Typically, a light emitting device is manufactured by growing a gallium nitride (GaN) crystal into a thin film. However, gallium nitride substrates, which are homogeneous substrates, are very difficult to manufacture and are very expensive, making them impossible to apply to practical industries. Accordingly, such nitride based light emitting devices are mostly grown on heterogeneous substrates. Sapphire, silicon carbide (SiC), gallium arsenide (GaAs) and the like are used as the dissimilar substrates, and among these dissimilar substrates, sapphire substrates are most widely used.

1A to 1D are schematic cross-sectional views illustrating a method of manufacturing a general nitride based light emitting device.

First, referring to FIG. 1A, a semiconductor layer 102 in which an N-type nitride layer, an active layer, and a P-type nitride layer are stacked on a sapphire substrate 100 may be formed by metal organic chemical vapor deposition (MOCVD). Form.

In addition, as shown in FIG. 1B, the transparent electrode 104 is formed on the semiconductor layer 102, and then a photo and development process is performed to form a photoresist pattern on the transparent electrode 104. The 104 and the semiconductor layer 102 are etched. At this time, the sapphire substrate 100 is not exposed and the semiconductor layer 102 partially remains. The P-type metal pad 106 is formed on a portion of the upper portion of the transparent electrode 104, and the N-type metal pad 108 is formed on a portion of the etched semiconductor layer 102.

As shown in FIG. 1C, a part of the sapphire substrate 100 is polished to a thickness of about 100 μm by performing a grinding and polishing process. This grinding and polishing process is intended to facilitate a chip breaking process which is carried out in a subsequent process. That is, if the thickness of the sapphire substrate 100 is too thick, or if there is a scratch on the back surface of the sapphire substrate 100, the chip is broken in an undesired direction during the chip breaking process, or the separated cross section becomes rough, resulting in poor appearance. This will occur. Thereafter, a groove 112 having a predetermined depth is formed on the front surface or the rear surface of the sapphire substrate 100 using a diamond scriber or a high power laser beam.

1D, the sapphire substrate 100 is separated into a single chip 114 by applying a physical force at predetermined intervals in the horizontal and vertical directions of the sapphire substrate 100.

Such a conventional chip structure has a shape of a substantially rectangular parallelepiped or various chip shapes by processing the bottom or side surface of the substrate to increase light extraction efficiency. As an example of this, a technique for increasing light extraction efficiency by processing a side surface of a light emitting device chip into a three-dimensional shape having a predetermined angle has been disclosed (Cree, US Patent No. 7,419,912B2, published on Sep. 2, 2008). However, such a conventional chip structure has a limitation in improving the escape efficiency of light since the formation of opposite sides of the chip is all symmetrical.

Accordingly, the present invention has been made to solve the above problems, an object of the present invention is to provide a light emitting device and a method of manufacturing the light extraction efficiency is improved.

In order to achieve the above object, a light emitting device chip according to an aspect of the present invention, in a light emitting device chip including a plurality of side surfaces, at least one pair of opposing side surfaces may be asymmetric with each other.

In addition, the method of manufacturing a light emitting device chip according to another aspect of the present invention is a method of manufacturing a single light emitting device chip by separating a plurality of light emitting devices formed on a substrate, respectively, at least one on each of the front and rear surfaces of the substrate Forming at least one groove line at intervals for determining the size of the single light emitting device chip, wherein at least one groove line on the front surface and at least one groove line on the back surface are arranged to be mutually offset; And chip breaking between the at least one groove line and at least one at least one groove line of the rear surface, thereby manufacturing a single light emitting device chip having at least one pair of opposite sides asymmetric with each other. The groove line can then be formed by scribing, which can also be chemically etched. In this case, the chemical etching is at least one selected from the group consisting of sulfuric acid (H 2 SO 4 ), phosphoric acid (H 3 PO 4 ), calcium hydroxide (KOH), sodium hydroxide (NaOH) and potassium hydrogen sulfate (KHSO 4 ). Can be Further, the groove line may have a depth of 5 μm or more and may be 1/2 or less of the thickness of the substrate. In addition, the distance in the transverse direction and the longitudinal direction of the chip to be offset may be as follows:

10㎛ ≤ S 1 ≤ L 1/ 2

10㎛ ≤ S 2 ≤ L 2/ 2 Equation 1

(At this time, S 1 is the offset distance in the chip transverse direction, S 2 is the offset distance in the chip longitudinal direction, L 1 is the vertical length of the chip, and L 2 is the horizontal length of the chip).

The light emitting device chip according to the present invention is formed so that at least a pair of opposite sides thereof are asymmetric with each other, so that the light extraction efficiency of light generated in the active layer is improved, thereby improving light extraction efficiency. In addition, stable braking operation is possible regardless of the thickness of the substrate.

In the light emitting device chip according to the present invention, at least one pair of opposite sides thereof is formed in an asymmetrical structure with each other. Accordingly, the escape of light generated in the active layer in the light emitting device is easy, and the light extraction efficiency can be greatly improved.

One preferred embodiment of the present invention for this purpose can be implemented by a method of manufacturing a nitride light emitting device as shown in Figures 2a-2f and 3a and 3b. 2A and 2F are each cross-sectional views illustrating a method of manufacturing a nitride light emitting device according to one embodiment of the present invention, and FIG. 3A illustrates a plan view in the direction of arrow A in FIG. 2A, that is, a plan view of the back surface of the substrate. 3B shows a plan view in the direction of arrow A 'of FIG. 2C, that is, a plan view of the front surface of the substrate. Hereinafter, this embodiment will be described in detail with reference to FIGS. 2A-2F and FIGS. 3A and 3B.

First, as a first step, as shown in FIG. 2A, a groove line or a scribing line 110 having a predetermined depth is formed on the substrate 100 of the nitride light emitting device. In this case, the substrate 100 may be a conventional transparent substrate on which the nitride semiconductor layer may be grown in a subsequent process such as sapphire, silicon carbide (SiC), gallium nitride (GaN), and the like, preferably, a sapphire substrate. In addition, the thickness of the substrate 100 is not limited, in particular, its back surface, indicated by arrow A, may be a flat surface on which grinding and / or polishing has been performed or a rough surface on which grinding and / or polishing has not been performed. It may be. In addition, the groove line 110 may be formed by conventional diamond scribing or laser scribing, but is preferably formed by laser scribing having high production efficiency and easy depth control. In addition, as shown in Figure 3a, the groove line 110 is formed in a straight line spaced apart at regular intervals in the horizontal and column direction of the substrate 100 so that each rectangular pattern is formed to determine the chip size of each light emitting device Done. In addition, the depth of the groove line 110 is better if the depth is formed in consideration of the yield and light extraction efficiency of the chip breaking process in the future, but if it is too deep, the groove line 110 may be damaged during the thin film growth process or the chip manufacturing process. It is preferable that the depth of) be 1/2 or less of the thickness T of the substrate 100, and more preferably 5 µm or more in consideration of the yield of the chip breaking process. In addition, the width of the groove line 110 is not an important variable in the present process and is determined by the size and output of a laser beam generally used. In addition, the chemical etching masking material pattern 120 may be formed on the back surface of the substrate 100 for the accuracy of the scribing and the chemical etching process to be performed later. The masking material includes a silicon oxide film (SiO x ) or a silicon nitride film (SiN y ), but is not limited thereto, and any masking material may be any material having an etching selectivity higher than that of the substrate 100, for example, such as chromium (Cr). It can also be a metallic material. The etching chemical in the subsequent chemical etching process may include at least one of sulfuric acid (H 2 SO 4 ), phosphoric acid (H 3 PO 4 ), calcium hydroxide (KOH), sodium hydroxide (NaOH) and potassium hydrogen sulfate (KHSO 4 ). It is preferable that at least one of the masking materials be selected so that the masking material is stable to such an etching chemical so that the part to be etched can be precisely defined and the silicon oxide film (SiO x ) can be uniformly formed on the entire surface of the substrate.

As a second step, as shown in FIG. 2B, a chemical etching is performed using the etching chemical as described above to form an inclined surface in the groove line 110. As a reference example, a substrate etching process using sulfuric acid (H 2 SO 4 ) and phosphoric acid (H 3 PO 4 ) described above as etching chemicals is described in IEEE Photonics Technology Letters, Vol. 18, No. 10, 2006, Journal of the Korean Chemical Society, Vol. 39, No. 1, 1995. By the chemical etching process, first, debris of the inner wall of the groove line 110 formed and remaining by the by-product generated as a result of the scribing is removed cleanly, and second, the inner wall of the groove line 110 is etched obliquely. As a result, a groove line 115 having an inclined surface is formed.

As the third and fourth steps, as shown in FIGS. 2C and 2D, the same process as the first and second steps is performed on the entire surface of the substrate 100 (arrow A 'direction) to form the groove line 130 and the chemical etching masking material pattern. A 125 is formed and chemically etched to form a groove line 135 having an inclined surface. At this time, the groove line 135 is formed to be offset from the groove line 115 already formed on the back surface of the substrate 100, that is, arranged to be offset from each other by a predetermined distance (see FIGS. 2C, 2D and 3B). As a result, in the chip breaking process, the sides of the chip are broken in an oblique manner, and finally the opposite sides are asymmetrically formed (see FIGS. 2E and 2F). That is, referring to FIG. 3B, in consideration of light efficiency improvement, chip breaking yield, and chip weight balance, the distance in the horizontal direction and the longitudinal direction of the offset chip is preferably set as in Equation 1 below:

10㎛ ≤ S 1 ≤ L 1/ 2

10㎛ ≤ S 2 ≤ L 2/ 2 Equation 1

(At this time, S 1 is the offset distance in the chip transverse direction, S 2 is the offset distance in the chip longitudinal direction, L 1 is the vertical length of the chip, and L 2 is the horizontal length of the chip). For example, when the chip size is 300 μm (width) × 400 μm (length), the offset distance in the horizontal direction of the chip is in the range of 10 μm ≦ S 1 ≦ 150 μm, and the offset distance in the longitudinal direction of the chip is 10 μm. It may be formed in the range of ㎛ ≤ S 2 ≤ 200 ㎛, respectively. In addition, this step may be performed in the state where the nitride semiconductor thin film 172 for the light emitting device is grown on the substrate 100 or may be performed before the growth. At this time, the formation conditions of the groove line 130 is preferably equal to or less than 1/2 of the thickness T of the substrate 100 as in the first step, and also becomes 5 μm or more in consideration of the yield of the chip breaking process. This is preferred. In addition, it is preferable to form the chemical etching masking material pattern 125 on the entire surface of the substrate 100 in the same manner as the first and second steps for the chemical etching.

As a fifth step, as shown in FIGS. 2E and 2F, the transparent electrode 174, the p-electrode pad 176, and the n-electrode pad 178 are formed on the nitride semiconductor thin film 172, respectively, and chip breaking equipment is formed. To separate the scribing line 140 into a single chip 170. At this time, since the groove line 115 of the rear substrate and the groove line 135 of the front substrate are offset from each other, as a result of chip breaking, the side of the chip is inclined to break. As a result, the groove line 115 of the rear substrate is formed in the second or fourth stage. Together with the inclined surface, the opposite sides of the final chip have an asymmetrical shape. The light emitting device chip according to the present invention having the mutually asymmetric opposing sides has an external extraction efficiency while changing the traveling angle of the light reflected in the substrate 100 compared to the conventional light emitting chip having a uniform cube or a symmetrical opposing side. Since it increases, the light extraction efficiency is improved.

In addition, in the present invention, the steps described above may be changed in order for convenience or efficiency of the process. According to another preferred embodiment of the present invention, the first and third steps of the above-described embodiment may be performed first, and then the second and fourth steps may be executed at once to form the inclined groove line. 4A-4F illustrate this implementation.

First, as a first step of the present embodiment (FIG. 4A), the chemical etching masking material pattern 125 is formed on both surfaces of the front and rear surfaces of the substrate 100.

As a second step (FIG. 4B), scribing is formed on both surfaces of the front and rear surfaces of the substrate 100 to form the groove lines 110 and 130.

As a third step (FIG. 4C), the groove lines 110 and 130 are chemically etched to form groove lines 115 and 135 having inclined surfaces.

As a fourth step, a nitride semiconductor thin film 172 is formed on the substrate 100.

In a fifth step, the transparent electrode 174, the p-electrode pad 176, and the n-electrode pad 178 are formed on the nitride semiconductor thin film 172, respectively. 140 is then separated into a single chip 170.

Hereinafter, embodiments of the present invention will be described in detail. However, the embodiments described below are provided to help the overall understanding of the present invention, and the present invention is not limited to the following examples.

Example  One

Of light emitting device chip  Produce

About 500 nm of SiO 2 was deposited on each of the front and back surfaces of a 430 μm thick 2-inch sapphire substrate (plane substrate or pattern substrate). Then, photoresist masking pattern formation and SiO 2 etching were performed using a semiconductor lithography method to form patterns for chemical etching on the front and rear surfaces of the sapphire substrate, respectively. Then, by using a laser scribing method, a groove having a depth of about 100 μm was formed on the back of the substrate, and a groove having a depth of about 20 μm was formed on the entire surface of the substrate. The distance between the groove lines on the front and back surfaces was set to 1000 µm in both the transverse direction and the longitudinal direction, and the groove lines on the front surface of the substrate were formed with an offset distance of 100 µm compared to the groove lines on the substrate back surface. Subsequently, the substrate was placed in a mixture of sulfuric acid and phosphoric acid (3: 1) at 300 ° C, and etching was performed until the residue was completely removed and a sufficient inclined surface was formed. After sufficient etching, the SiO 2 film formed on the substrate was removed, the nitride semiconductor was grown on the sapphire substrate according to a conventional method, and then device fabrication was performed. After the manufacturing process of the nitride light emitting device was completed on the substrate, the chip was separated by performing the braking operation immediately without grinding and polishing, and as a result, a light emitting device chip having a shape in which the opposite side was asymmetric was manufactured.

Of light extraction efficiency  Measure

The light extraction efficiency of the light emitting device chip was simulated and measured by Light Tools 5.1 (Optical Research Association). As a simulation condition, a hemispherical pattern (radius: 1.5 mu m, spacing: 4 um, hexagonal arrangement) is formed on the entire surface of the sapphire substrate (n = 1.8), the chip size is 1000 × 1000 µm 2 , and the reflectance of 95% It is assumed that the thickness of the reflective metal and the nitride light emitting layer is 6 μm, the thickness of the ITO layer (n = 2.0) is 0.2 μm, the N and P pad metal sizes are 100 μm in radius, and the structure of the nitride light emitting device is the light emitting device chip. Designed according to In the conventional nitride light emitting device as a comparative example, the sapphire thickness was assumed to be 100 μm under the above-described conditions. 5A shows the structure of the nitride light emitting device according to the present embodiment used in the simulation, and FIG. 5B shows the structure of the nitride light emitting device according to the comparative example used in the simulation. The light extraction efficiency thus measured is shown in Table 1 below:

Peripheral substance Air (n = 1) Epoxy (n = 1.45) Comparative example 32% 69% Example 56% 75%

Referring to Table 1, the light extraction efficiency of the comparative example was 32% when the surroundings were filled with air, whereas the present example showed an improvement of 24% as 56%, and the light extraction efficiency of the comparative example when the surroundings were surrounded by epoxy. In contrast to 69%, this example had a 75% improvement of 6%.

Example  2

In this embodiment, a nitride light emitting device chip was manufactured by changing the process sequence of Example 1 described above. That is, first, groove lines having a depth of about 100 μm were formed on the back surface of the sapphire substrate as in Example 1. Then, a thin film of a light emitting device structure was grown on the entire surface of the sapphire substrate by using a nitride semiconductor thin film growth equipment. And SiO 2 on the upper surface of the nitride semiconductor layer. A dielectric material for masking chemical etching, etc. was deposited over 300 µm, and a pattern for scribing and chemical etching was formed using a semiconductor lithography method. After forming a groove having a depth of about 20㎛ using a high-power laser, it was placed in a mixture of sulfuric acid and phosphoric acid (3: 1) at about 300 ℃ to remove the residue formed during the scribing process to form the inclined surface of the groove line. After removing the dielectric masking material formed on the front and back of the sapphire, a light emitting device was manufactured according to a conventional nitride light emitting device process. The final light emitting device chip had a structure in which opposite sides were double symmetrical as in Example 1.

Example  3

In the present embodiment, the nitride light emitting device chip was manufactured by changing the process sequence of Example 1 as in Example 2 as in Example 2. That is, first, a nitride semiconductor thin film having a light emitting device structure was grown on the entire surface of the sapphire substrate. As in Example 1, SiO 2 masking material was deposited on the front and rear surfaces of the substrate, and a pattern for scribing and chemical etching was formed on the front and rear surfaces of the substrate using a semiconductor lithography process. Then, after forming a groove having a depth of about 20㎛ using a high-power laser, it was placed in a mixture of sulfuric acid and phosphoric acid (3: 1) of about 300 ℃ and removed the residue formed during the scribing process to form a groove line having an inclined surface. . After removing the dielectric masking material formed on the front and rear surfaces of the sapphire, a light emitting device was manufactured according to a conventional nitride light emitting device process. The light emitting device chip thus formed had a structure in which the opposite sides thereof were double symmetrical.

As described above, in the nitride light emitting device chip according to the present invention, at least one pair of opposite sides of the nitride light emitting device chip is formed in an asymmetrical structure, so that light generated from the active layer in the light emitting device is easily escaped, thereby greatly improving light extraction efficiency. .

Preferred embodiments and embodiments of the present invention are all disclosed for the purpose of illustration, and any person skilled in the art may make various modifications, changes, additions, etc. within the spirit and scope of the present invention. Such modifications, changes and additions are to be regarded as within the scope of the claims. Embodiments and embodiments of the present invention have been exemplified by a nitride based light emitting device, but the present invention includes, but is not limited to, manufacturing all light emitting device chips of other compositions.

1A-1D are schematic cross-sectional views illustrating a method of manufacturing a general nitride based light emitting device.

Figures 2a-2f are each cross-sectional view for explaining a method for manufacturing a nitride light emitting device according to an embodiment of the present invention.

FIG. 3A is a plan view in the direction of arrow A of FIG. 2A, ie, a top view of the substrate back side; FIG. FIG. 3B is a plan view in the direction of arrow A 'of FIG. 2C, ie, a plan view of the front of the substrate; FIG.

4A and 4F are cross-sectional views illustrating stepwise a method of manufacturing a nitride light emitting device according to another preferred embodiment of the present invention.

5A is a structural diagram of a nitride light emitting device according to the present embodiment used for the simulation; 5B is a structural diagram of a nitride light emitting device according to a comparative example used in the simulation.

<Description of the symbols for the main parts of the drawings>

Reference Signs List 100: substrate, 110, 115, 130, 135: groove line, 120, 125: chemical etch masking material pattern, 140: scribing line, 170: single light emitting device chip, 172: nitride semiconductor thin film, 174: transparent electrode, 176: p electrode pad, 178: n electrode pad

Claims (7)

In the light emitting device chip comprising a plurality of side surfaces, At least one pair of opposing sides are asymmetric with respect to each other. In the method of manufacturing a single light emitting device chip by separating a plurality of light emitting devices formed on a substrate, At least one groove line is formed on each of the front and rear surfaces of the substrate at intervals for determining the size of the single light emitting device chip, and the at least one groove line on the front surface and the at least one groove line on the back surface are mutually offset to each other. Is formed to; And chip breaking between at least one groove line on the front side and at least one groove line on the back side to manufacture a single light emitting device chip having at least one pair of opposite sides asymmetric with each other. How to. The method of claim 2, The groove line is formed by scribing. The method of claim 3, The groove line is chemically etched. The method of claim 4, wherein The chemical etching is at least one selected from the group consisting of sulfuric acid (H 2 SO 4 ), phosphoric acid (H 3 PO 4 ), calcium hydroxide (KOH), sodium hydroxide (NaOH) and potassium hydrogen sulfate (KHSO 4 ). How to feature. The method according to any one of claims 2 to 5, And the groove line has a depth of 5 µm or more and less than 1/2 the thickness of the substrate. The method according to any one of claims 2 to 5, The distance in the transverse direction and the longitudinal direction of the offset chip is characterized by the following equation 1. 10㎛ ≤ S 1 ≤ L 1/ 2 10㎛ ≤ S 2 ≤ L 2/ 2 Equation 1 (At this time, S 1 is the offset distance in the chip transverse direction, S 2 is the offset distance in the chip longitudinal direction, L 1 is the vertical length of the chip, and L 2 is the horizontal length of the chip).
KR20090056335A 2009-06-24 2009-06-24 Light emitting device chip and manufacturing method thereof KR101088392B1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
KR20090056335A KR101088392B1 (en) 2009-06-24 2009-06-24 Light emitting device chip and manufacturing method thereof
PCT/KR2010/002605 WO2010150972A2 (en) 2009-06-24 2010-04-26 Semiconductor light-emitting device and method for manufacturing same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR20090056335A KR101088392B1 (en) 2009-06-24 2009-06-24 Light emitting device chip and manufacturing method thereof

Publications (2)

Publication Number Publication Date
KR20100138013A true KR20100138013A (en) 2010-12-31
KR101088392B1 KR101088392B1 (en) 2011-12-01

Family

ID=43386989

Family Applications (1)

Application Number Title Priority Date Filing Date
KR20090056335A KR101088392B1 (en) 2009-06-24 2009-06-24 Light emitting device chip and manufacturing method thereof

Country Status (2)

Country Link
KR (1) KR101088392B1 (en)
WO (1) WO2010150972A2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101444027B1 (en) * 2013-05-27 2014-09-25 희성전자 주식회사 Method for manufacturing light-emitting-diode

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102014114613B4 (en) 2014-10-08 2023-10-12 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Radiation-emitting semiconductor chip, method for producing a large number of radiation-emitting semiconductor chips and optoelectronic component with a radiation-emitting semiconductor chip

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3176856B2 (en) * 1995-12-14 2001-06-18 沖電気工業株式会社 Edge-emitting LED, edge-emitting LED array, light source device, and methods of manufacturing the same
JP3504079B2 (en) * 1996-08-31 2004-03-08 株式会社東芝 Method for manufacturing semiconductor light emitting diode device
KR100550847B1 (en) 2003-06-25 2006-02-10 삼성전기주식회사 Method for manufacturing GaN LED
JP2006245043A (en) 2005-02-28 2006-09-14 Toyoda Gosei Co Ltd Method of manufacturing group iii nitride-based compound semiconductor element, and light emitting element

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101444027B1 (en) * 2013-05-27 2014-09-25 희성전자 주식회사 Method for manufacturing light-emitting-diode

Also Published As

Publication number Publication date
WO2010150972A3 (en) 2011-03-31
KR101088392B1 (en) 2011-12-01
WO2010150972A2 (en) 2010-12-29

Similar Documents

Publication Publication Date Title
CN105340064B (en) Semiconductor chip manufacture method includes the circuit board and imaging device of semiconductor chip
US9082934B2 (en) Semiconductor optoelectronic structure with increased light extraction efficiency
JP5119463B2 (en) Light emitting device and manufacturing method thereof
US20100140653A1 (en) Light emitting diode structure and method for fabricating the same
KR20070028379A (en) Production method of compound semiconductor device wafer
JP2005166728A (en) Method of manufacturing nitride-based semiconductor element
JP2009218569A (en) Group iii nitride semiconductor light-emitting device and production method therefor
CN103474543A (en) Light emitting diode
CN108172673B (en) Manufacturing method and structure of distributed Bragg reflector pattern for LED flip chip
CN103474532A (en) Preparation method of light emitting diode
CN102130238A (en) Method for cutting sapphire substrate LED chip
KR100789200B1 (en) Method for production of semiconductor chip and semiconductor chip
CN102569544A (en) Method for manufacturing individual light-emitting diodes
CN106653961A (en) Method of manufacturing micro LED chip with flip structure
US9269855B2 (en) Method for manufacturing high efficiency light-emitting diodes
KR101088392B1 (en) Light emitting device chip and manufacturing method thereof
JP2008251753A (en) Manufacturing method of nitride led device
JP5258671B2 (en) Nitride semiconductor device manufacturing method
JP2011159650A (en) Light-emitting element
TW201324841A (en) Semiconductor substrate, methods for manufacturing and using thereof
KR20090020215A (en) Semiconductor liggt emitting device and method of manufacturing the same
TWI397114B (en) Method for manufacturing epitaxial substrate
KR100921850B1 (en) Method of scribing semiconductor laser diode
US20230207736A1 (en) Light emitting diode with vertical structure and manufacturing method thereof
KR100857939B1 (en) Method of breaking laser diode wafer and wafer structure for the same

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20141118

Year of fee payment: 4

FPAY Annual fee payment

Payment date: 20150827

Year of fee payment: 5

FPAY Annual fee payment

Payment date: 20160923

Year of fee payment: 6

FPAY Annual fee payment

Payment date: 20170925

Year of fee payment: 7

FPAY Annual fee payment

Payment date: 20180921

Year of fee payment: 8

FPAY Annual fee payment

Payment date: 20190925

Year of fee payment: 9