KR20100078813A - Method for forming selective emitter of solar cell, solar cell and fabricating method thereof - Google Patents

Abstract

PURPOSE: A method of manufacturing a selective emitter of a solar cell is provided to implement a solar cell of a high efficient rate by forming the selective emitter on surface of the solar cell to reduce contact resistance between the electrode and an emitter layer. CONSTITUTION: A second impurity semiconductor layer(202) is formed in front of a first impurity semiconductor substrate(201). The second impurity semiconductor layer is composed of a heavily doped area(220) and a lightly doped area(230) of the second impurity. A front electrode is formed on the heavily doped area on the second impurity semiconductor layer. A back electrode is formed in the back side of the first impurity semiconductor substrate. The depth of the heavily doped area of the second impurity is deeper than that of the lightly doped area of the second impurity.

Description

Selective Emitter Formation Method of Solar Cell, Solar Cell and Manufacturing Method Thereof {Method For Forming Selective Emitter Of Solar Cell, Solar Cell and Fabricating Method Thereof}

The present invention relates to a solar cell having a selective emitter, a method of manufacturing the same, and a method of forming a selective emitter of the solar cell.

Recently, due to global environmental problems and resource depletion, interest in environmentally friendly alternative energy is increasing. One of the technologies attracting people's attention in this situation is solar power technology.

Solar cells that produce electricity using solar light are generally manufactured using silicon. Currently commercialized single crystal bulk silicon solar cells are not actively utilized due to high manufacturing cost and installation cost. In order to solve this cost problem, researches on solar cells using silicon have been actively conducted, and various attempts have been made to manufacture high efficiency solar cell modules.

Solar cells are the next generation of clean energy sources and have been studied for decades. The solar cell may be classified into a solar cell that generates steam required to rotate a turbine by using solar heat, and a solar cell that converts photons into electrical energy using properties of a semiconductor. Among them, studies on solar cells that convert light energy into electrical energy by using electrons and holes generated by absorbed photons have been actively conducted. The solar cell is generally abbreviated as solar cell. The characteristics required for the solar cell include high photoelectric conversion efficiency, low manufacturing cost, and short energy recovery years. As the number of processes is reduced, there is an economic effect in terms of the manufacturing cost, and therefore active research is being conducted.

Until now, as a material of solar cells, materials of Group IV-based materials such as monocrystalline silicon, polycrystalline silicon, amorphous silicon, amorphous SiC, amorphous SiN, amorphous SiGe, amorphous SiSn, or gallium arsenide (GaAs), aluminum gallium arsenide (AlGaAs), indium phosphorus (InP) has ⅲ-ⅴ group or CdS, CdTe, a compound semiconductor such as ⅱ-ⅵ group of Cu ₂ S, etc. are used, such as. The solar cell may be classified into a solar cell that generates steam required to rotate a turbine by using solar heat, and a solar cell that converts photons into electrical energy using properties of a semiconductor. Among them, studies on solar cells that convert light energy into electrical energy by using electrons and holes generated by absorbed photons have been actively conducted.

Among the solar cells, silicon solar cells have a problem of high contact resistance between the silicon surface and the front electrode. Therefore, researches on emitters for lowering the contact resistance between the silicon surface and the front electrode are actively studied.

In addition, in the manufacturing process of the conventional solar cell, the process of forming the emitter of the solar cell to provide a high efficiency solar cell is complicated and pointed out as a problem in terms of time and cost, so improved technology for this is needed. It is true.

The present invention has been made to solve the above problems, and provides a method of forming a selective emitter for lowering the contact resistance between the emitter and the electrode of the solar cell, and provides a solar cell including such a selective emitter The purpose is.

In addition, an object of the present invention is to provide a high efficiency solar cell by manufacturing a solar cell using an emitter forming method that is simple and short process time, unlike the conventional manufacturing process of a selective emitter.

The technical objects to be achieved by the present invention are not limited to the above-mentioned technical problems, and other technical subjects which are not mentioned can be clearly understood by those skilled in the art from the description of the present invention .

The structure of a general solar cell has a heterojunction structure of a p-type semiconductor and an n-type semiconductor like a diode, and carriers are separated by negatively charged electrons and positive holes due to the incidence of sunlight, and as they move, A difference will occur.

This is called the photovoltaic effect. Among the p-type semiconductors and n-type semiconductors constituting the solar cell, electrons are attracted to the n-type semiconductor and holes are directed to the p-type semiconductor, respectively, and are bonded to the n-type semiconductor and the p-type semiconductor, respectively. It is moved to the electrodes and a potential difference is generated so that the power can be obtained by connecting these electrodes.

The maximum value P _max of the output power of the solar cell is represented by the product of the output current Ip and the output voltage Vp, and the photoelectric conversion efficiency η of the solar cell is the maximum value P _max of the output power. It is defined as divided by the total light energy incident to (S x I, S is the device area, I is the intensity of light irradiated to the solar cell).

Therefore, in order to increase the photoelectric conversion efficiency η of the solar cell, it is necessary to increase the short-circuit current Isc or the open voltage Voc or increase the fill factor (FF) indicating a degree close to the square of the output current voltage curve.

Recently, research and development have been conducted to improve efficiency by improving the absorption rate of sunlight and reducing the transfer resistance of a carrier. In order to reduce the contact resistance between the electrode and the semiconductor emitter layer, the structure of the emitter layer in contact with the electrode is changed. I improve time.

1 is a cross-sectional view of a solar cell including a selective emitter in which the structure of an emitter layer according to the prior art is changed. The p-type semiconductor substrate 101 and the n-type semiconductor layer 102 forming a pn heterojunction, and the front surface formed thereon The electrode 104, the back surface field (BSF) layer 105 formed on the lower surface of the p-type semiconductor substrate 101, and the back electrode 106 is composed of.

The n-type semiconductor layer 102 is an emitter layer, and is formed of an optional emitter layer that forms a thicker region in contact with the electrode and a thinner region that is not in contact with the electrode to reduce contact resistance with the front electrode 104. The selective emitter structure thus reduces contact resistance, reducing the carrier resistance of the carrier and improving carrier life.

Although the selective emitter layer contributes to efficiency by reducing the contact resistance between the electrode and the emitter layer, there is a problem in that a complicated manufacturing process is required due to an additional manufacturing process. Need research

The solar cell according to the embodiment of the present invention for improving the above problems and achieving the above object is formed on the entire surface of the first impurity semiconductor substrate, the high concentration doping region of the second impurity and the low concentration doping region of the second impurity And a front electrode formed on the high concentration doped region of the second impurity of the second impurity semiconductor layer, and a back electrode formed on the rear surface of the first impurity semiconductor substrate. At this time, the depth of the high concentration doped region of the second impurity is characterized in that deeper than the depth of the low concentration doped region of the second impurity.

In the present invention, the junction surface of the first impurity semiconductor substrate and the second impurity semiconductor layer may have a concave-convex structure, and the shape and shape of the concave-convex concave-convex are not limited.

In addition, the high concentration doped region of the second impurity and the low concentration doped region of the second impurity may be formed to cross each other on the front surface of the first impurity semiconductor substrate, but is not necessarily limited to this form, A high concentration doped region of the second impurity and a low concentration doped region of the second impurity may be divided into predetermined spaces.

In the present invention, the depth of the low concentration doped region of the second impurity may be deeper toward the interface between the high concentration doped region of the second impurity and the low concentration doped region of the second impurity.

The central portion of the low concentration doped region of the second impurity does not mean a specific point, but is centered at an interval between the amounts based on the boundary surface and the boundary surface of the high concentration doping region of the second impurity and the low concentration doping region of the second impurity. It can be defined as meaning part.

In the present invention, the center depth of the low concentration doped region of the second impurity may be 0.1 μm to 0.2 μm, and the interface depth of the low concentration doped region of the second impurity may be larger than the center depth and smaller than 0.8 μm. Therefore, the thickness or depth of the lightly doped region of the second impurity may be formed to have a larger value toward the interface with the highly doped region of the second impurity.

In the present invention, the first impurity may be a p-type semiconductor impurity, and the second impurity may be an n-type semiconductor impurity or vice versa. Since the dopants of different types of impurity semiconductors are used, the solar cell of the present invention forms a pn heterojunction layer.

In this case, the n-type semiconductor impurity may be selected from the group consisting of Group 5 elements such as phosphorus (P), arsenic (As), and antimony (Sb).

In order to achieve the above object, a method of forming a selective emitter of a solar cell of the present invention includes a selective emitter of a solar cell having a high concentration doping region of a second impurity and a low concentration doping region of a second impurity on a front surface of a first impurity semiconductor substrate. In the forming method, a high concentration doped region of the second impurity is formed by applying a second impurity paste to a predetermined region on a first impurity semiconductor substrate, and heat treating the second impurity paste. .

The low concentration doped region of the second impurity may be formed in the remaining region in which the high concentration doped region of the second impurity is not formed on the first impurity semiconductor substrate.

In the present invention, the lightly doped region of the second impurity is formed at the same time during the heat treatment of the second impurity paste.

Further, in the present invention, the low concentration doped region of the second impurity may be formed by diffusion of a second impurity gas, wherein the second impurity gas is a second naturally vaporized gas from the applied second impurity paste. It may be an impurity gas or a POCl ₃ gas artificially injected during the manufacturing of the solar cell.

In the present invention, the second impurity paste may be applied by a screen printing method or a printing method, but is not necessarily limited to these methods and may be applied as long as it is a known method for patterning a paste on a substrate.

In the present invention, the coating step and the heat treatment step of the second impurity paste may be performed as separate processes sequentially, but are not necessarily limited thereto, and may be performed in one process. That is, the second impurity paste is patterned on the first impurity-type semiconductor substrate in a chamber that is already set at a high temperature so that the firing process can be performed simultaneously with the formation of the second impurity semiconductor layer.

The temperature of the heat treatment in the present invention is not particularly limited but may be made within 30 seconds to 10 minutes at a temperature of 820 ℃ to 950 ℃.

The solar cell manufacturing method of the present invention for achieving the above object is characterized by a process comprising a method for forming a selective emitter of the solar cell as described above.

Selective emitter forming method of the silicon solar cell of the present invention, compared to the existing method can simplify the process of forming a selective emitter (selective emitter) can increase the effect of reducing the cost in terms of production cost.

The present invention has the effect of providing a high efficiency solar cell by reducing the contact resistance between the electrode and the emitter layer by forming a selective emitter on the front surface of the solar cell only by applying a paste.

In addition, since the present invention introduces a simple manufacturing process in forming a selective emitter layer, it is possible to shorten the process time and reduce the production cost of the solar cell.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

2 is a cross-sectional view showing a method of forming a selective emitter of a solar cell according to an embodiment of the present invention.

Referring to FIG. 2, a method according to one embodiment of the present invention for laminating a selective emitter layer of a solar cell on a semiconductor substrate is illustrated.

That is, an n-type semiconductor layer 202 is formed on the p-type semiconductor substrate 201, and then an n-type impurity paste 210 is applied to a portion where the front electrode is to be stacked on the n-type semiconductor layer to form an optional emitter layer. It shows the process of making.

In the region where the n-type impurity paste 210 is coated on the p-type semiconductor substrate 201, impurities penetrate directly into the substrate to induce solid phase diffusion. Therefore, a highly doped region 220 of n-type impurities is formed on the p-type semiconductor substrate corresponding to the region where the n-type impurity paste 210 is coated.

The region of the remaining p-type semiconductor substrate 201 to which the n-type impurity paste 210 is not applied is doped through the diffusion of the n-type impurity gas to form the low concentration doped region 230 of the n-type impurity. That is, the lightly doped region 230 of the n-type impurity may be formed through gas phase diffusion.

The source gas of the gas phase diffusion of the low concentration doping region 230 of the n-type impurity is an n-type impurity gas and becomes an n-type impurity gas that is naturally generated when the heat treatment is performed in the state where the n-type impurity paste 210 is applied. Can be.

Alternatively, the n-type impurity gas may be artificially injected into the process chamber during the manufacturing process of the solar cell.

Since these gaseous n-type impurities can be dispersed and blown in the air in all directions rather than directly applied and diffused in a solid form on the semiconductor substrate, the doped region of the n-type impurity is low because the semiconductor substrate is relatively doped. To form.

The n-type impurity may be a dopant selected from the group consisting of Group 5 elements, and is not particularly limited, but phosphorus (P) is mainly used.

The n-type impurity gas injected from the outside may mainly use POCl ₃ or the like.

Due to the high concentration diffusion of the n-type impurities by direct contact of the n-type impurity paste, the high concentration doping region 220 of the n-type impurity has a higher density of the n-type impurity than the other low concentration doping region 230 and is doped at a higher concentration. Since diffusion proceeds a lot, the thickness becomes thicker than other low concentration doped regions.

Therefore, depending on the shape and shape of the n-type impurity paste to be applied onto the p-type semiconductor substrate 201, the low concentration doped regions of the n-type impurity are formed to cross each other except for these application portions.

An embodiment in which the high concentration doped region 220 and the low concentration doped region 230 of these n-type impurities are formed may be the same as FIG. 7 to be described below.

3A to 3C and FIGS. 4A to 4C are cross-sectional views illustrating processes of forming a selective emitter of a solar cell according to an embodiment of the present invention. These processes are part of the process of manufacturing a solar cell and only read out the process of forming a selective emitter.

Referring to the embodiment according to FIGS. 3A to 3C, first, an n-type impurity paste 310 is applied onto a p-type semiconductor substrate 301 according to a pattern. (FIG. 3A).

These coating methods are not particularly limited but may be carried out by a known screen printing method, printing method or the like.

In this case, the surface of the p-type semiconductor substrate 301 may be formed in a concave-convex shape through a texturing process.

The texturing method may be a mechanical or chemical etching method, and is not particularly limited, but may be a chemical etching method using a material such as potassium hydroxide (KOH).

Next, a sintering process is performed to heat-treat the semiconductor substrate for a paste-coated solar cell. At this time, a PSG (Phosphorous Silicate Glass) may be generated on the n-type impurity semiconductor layer 302 as shown in FIG. 3B. The heat treatment may be performed for 30 seconds at a temperature of 820 to 950 ℃.

PSG by-products, etc. generated unnecessarily during the heat treatment are removed using hydrogen fluoride (HF) (FIG. 3C).

Since a by-product layer such as PSG may be generated to degrade the insulation characteristics of the solar cell, a process of removing the by-product layer deteriorating the insulation characteristics is performed.

3C is a cross-sectional view of the solar cell after the PSG is removed. The portion where the n-type impurity paste 310 is directly applied through the firing process of heat treatment is formed as the highly doped region 320 in the n-type impurity semiconductor layer 302. The remaining uncoated portion is formed of the lightly doped region 330 in the n-type impurity semiconductor layer 302.

As described above, the high concentration doping region and the low concentration doping region of the n-type impurity have different doping concentrations and different densities to function as selective emitters.

Subsequently, the front electrode is formed on the high concentration doped region 320 of the n-type impurity, and the portion where the electrode is not formed is the low concentration doped region 330 through the remaining process of the solar cell. The contact resistance can be designed low.

Meanwhile, as another embodiment of the present invention, FIGS. 4A to 4C form a selective emitter layer of a solar cell through the following process.

That is, the processes of FIGS. 4A to 4C apply an n-type impurity paste at the same time as heat treatment in one firing furnace to form a selective emitter.

In this method, an impurity semiconductor layer forming a pn junction is formed by attempting to dope and simultaneously doping impurities in a sintering furnace without going through a separate impurity diffusion device or process, thereby simplifying the manufacturing process of the solar cell and shortening the manufacturing time. Has

As can be seen with reference to FIG. 4A, first, a p-type semiconductor substrate 401 may be prepared, but the surface of the substrate may be processed to have an uneven structure by a texturing process.

An n-type impurity semiconductor layer 402 may be formed in a predetermined region on the p-type semiconductor substrate to form a pn junction structure.

According to an exemplary embodiment of the present invention, the n-type impurity semiconductor layer 402 may be patterned and then preformed in a predetermined region. The n-type impurity semiconductor layer may be patterned and formed by a known doping method of a semiconductor layer, or may be formed as a selective emitter layer by applying an n-type impurity paste 410 on the patterned n-type semiconductor layer. have.

However, since the embodiment is formed by dividing the emitter layer into two steps, for convenience of the process, as another embodiment, the n-type impurity semiconductor layer is formed by coating the n-type impurity paste 410 and performing heat treatment at the same time. At the same time, a method capable of dividing and forming the differential n-type impurity doped region will be more preferable.

 That is, as another embodiment, the n-type impurity paste 410 is applied on the p-type semiconductor substrate in the firing furnace heated to a predetermined temperature or more to form the n-type impurity semiconductor layer and at the same time, it is formed as a differential selective emitter layer.

4B illustrates that a PSG (Phosphorous Silicate Glass) 403 is formed on the n-type impurity semiconductor layer 402 during the heat treatment process. The description of this part has already been described above. Similarly, PSG by-products, etc. generated unnecessarily in the heat treatment process may be removed using hydrogen fluoride (HF) (FIG. 4C).

Referring to FIG. 4C, in the pn junction solar cell from which the PSG (Phosphorous Silicate Glass) 403 is removed, the portion where the n-type impurity paste 410 is directly applied is a high concentration doped region 420 in the n-type impurity semiconductor layer 402. The remaining portion which is not formed and coated is formed as the lightly doped region 430 in the n-type impurity semiconductor layer 402.

Therefore, an optional emitter consisting of a high concentration doping region and a low concentration doping region of the n-type impurity can be formed by a simple process.

Thereafter, a solar cell including a selective emitter is manufactured through a conventional general solar cell manufacturing process. In some cases, an anti-reflection film may be stacked on the front surface of the selective emitter layer, which may be formed through a known lamination method such as chemical vapor deposition and physical vapor deposition.

In addition, a back surface field (BSF) layer is formed on the back side of the semiconductor substrate using aluminum (Al) or the like.

Electrodes are formed on the front and rear surfaces of the solar cell, respectively, to draw electrons and hole carriers separated from the pn junction surface, thereby forming a potential difference, thereby allowing electricity to flow.

The structure of the solar cell including the selective emitter formed according to the final invention is shown in FIG. 5.

Referring to FIG. 5, an optional emitter layer 502 is formed on a p-type semiconductor substrate 501 by the same method as the above embodiment, and an anti-reflection film 503 is stacked thereon.

The selective emitter layer is contacted by the front electrode 504, and a portion where the front electrode is in contact is a high concentration doping region of n-type impurity, which is formed thicker than the rest of the region.

The remaining region where the front electrode is not in contact is a low concentration doping region of n-type impurity.

A BSF layer 505 is formed on the rear surface of the p-type semiconductor substrate 501 and a rear electrode 506 is provided in a predetermined region thereon.

The anti-reflection film 503, the front electrode 504, the BSF layer 505, and the back electrode 506 may be known to those skilled in the art by materials, materials, formation methods, and the like by conventionally known techniques. Since it can be configured using a specific description will be omitted.

6 is an enlarged cross-sectional view of a selective emitter portion of a solar cell according to an embodiment of the present invention.

The cross-section of the n-type semiconductor layer 602 formed according to the method of forming a selective emitter according to an embodiment of the present invention is partially enlarged. According to an embodiment, the center portion is formed in the cross section of the low concentration doped region of the n-type impurity. The thickness or depth of may be less than or equal to the thickness or depth of the interface with the heavily doped region.

That is, referring to FIG. 6, Wl refers to the thickness of the left boundary surface of the interface between the lightly doped region and the heavily doped region of the n-type impurity semiconductor layer. In addition, Wr means the thickness of the right interface of the interface between the lightly doped region and the lightly doped region of the n-type impurity semiconductor layer. Wc denotes the thickness of the center of the low concentration doped region of the n-type impurity semiconductor layer, that is, the center of the n-type impurity semiconductor layer separated by the same distance from both interfaces.

In one embodiment of the present invention, the central portion of the lightly doped region does not exactly mean the center of the lightly doped region, but assumes a comprehensive center that refers to a central portion separated by an equal or similar distance from the interface with the heavily doped region.

As can be seen with reference to Figure 6, in forming the selective emitter layer of the present invention, the thickness of the central portion of the finally formed optional emitter layer is formed to be thinner than the thickness of the other portions. Preferably it may be 0.1 ㎛ to 0.2 ㎛.

The thickness of the interface between the heavily doped and lightly doped regions of the remaining selective emitter layers may be thicker than this and may not exceed at least 1 μm. Preferably it may be formed of 0.8 ㎛ to 0.9 ㎛.

The thickness difference in the low concentration doped region of the n-type impurity semiconductor layer may be achieved by adjusting the concentration of the n-type impurity gas supplied and diffused from the outside to the gas phase to be differentially diffused.

Alternatively, the difference in thickness is because the doped region of the n-type impurity semiconductor layer is directly injected into the solid phase through the application of the n-type impurity paste. This difference in thickness may be formed automatically.

FIG. 7 is a top view of a solar cell including a selective emitter formed according to an embodiment of the present invention.

This shows an embodiment of a pattern in which a high concentration doped region 720 and a low concentration doped region 730 of n-type impurities are formed in the selective emitter layer. By not doping at a high concentration in the region where the electrode is not located, it is possible to prevent excessively high concentrations of n-type dopants present on the surface of the p-type semiconductor substrate.

Therefore, the contact resistance between the electrode and the n-type impurity semiconductor layer is minimized and the formation of aggregates in the doped region is minimized so that the lifetime of the charge is not reduced and the operation efficiency of the solar cell is ultimately improved.

In the above embodiment, a paste containing P (phosphorus) is used as a high concentration impurity, but As (arsenic) and Sb (antimony) may be used in addition to P (phosphorus).

According to one embodiment as described above of the present invention, not only the selective emitter is formed on the front surface of the solar cell by applying and firing the semiconductor impurity paste, but also the diffusion process using POCl ₃ gas is not performed. Selective emitter formation process is simplified.

The present invention has been described above in connection with specific embodiments of the present invention, but this is only an example and the present invention is not limited thereto. Those skilled in the art can change or modify the described embodiments without departing from the scope of the present invention, and such changes or modifications are within the scope of the present invention. In addition, the materials of each component described herein can be readily selected and substituted for various materials known to those skilled in the art. Those skilled in the art will also appreciate that some of the components described herein can be omitted without degrading performance or adding components to improve performance. In addition, those skilled in the art may change the order of the method steps described herein depending on the process environment or equipment. Therefore, the scope of the present invention should be determined by the appended claims and equivalents thereof, not by the embodiments described.

1 is a cross-sectional view showing the structure of a solar cell including a selective emitter according to the prior art.

2 is a cross-sectional view showing a method for forming a selective emitter of a solar cell according to an embodiment of the present invention.

3A to 3C are cross-sectional views of steps in a method of forming a selective emitter of a solar cell according to an embodiment of the present invention.

4A to 4C are cross-sectional views illustrating processes for forming a selective emitter of a solar cell according to another embodiment of the present invention.

5 is a cross-sectional view of a solar cell manufactured by a manufacturing process of a solar cell including a method of forming a selective emitter of the solar cell according to an embodiment of the present invention.

6 is an enlarged cross-sectional view of a selective emitter portion of a solar cell according to an embodiment of the present invention.

7 is a top view of a solar cell including a selective emitter formed according to an embodiment of the present invention from above.

{Description of symbols for main parts of the drawing}

101, 201, 301, 401, 501: p-type semiconductor substrate

102, 202, 302, 402, 502, 602: n-type semiconductor layer

103, 503: antireflection film 104, 504: front electrode

105, 505: BSF (Back Surface Field) layer 106, 506: back electrode

210, 310, 410: n-type impurity paste

220, 320, 420, 720: high concentration doping region of n-type impurities

230, 330, 430, 730: low concentration doping region of n-type impurities

303, 403: Phosphorous Silicate Glass (PSG)

Claims (18)

A second impurity semiconductor layer formed on the entire surface of the first impurity semiconductor substrate, the second impurity semiconductor layer comprising a high concentration doped region of the second impurity and a low concentration doped region of the second impurity; A front electrode formed on the highly doped region of the second impurity of the second impurity semiconductor layer; And A rear electrode formed on the rear surface of the first impurity semiconductor substrate, And a depth of the high concentration doped region of the second impurity is greater than a depth of the low concentration doped region of the second impurity. The method of claim 1, The junction surface of the first impurity semiconductor substrate and the second impurity semiconductor layer has a concave-convex structure. The method of claim 1, The high concentration doped region of the second impurity and the low concentration doped region of the second impurity are formed to cross each other on the front surface of the first impurity semiconductor substrate. The method according to claim 1 or 3, The depth of the lightly doped region of the second impurity is deeper toward the interface between the high concentration doping region of the second impurity and the low concentration doping region of the second impurity in the center of the low concentration doping region. The method of claim 4, wherein The center cell depth of the lightly doped region of the second impurity is 0.1 ㎛ to 0.2 ㎛. The method of claim 4, wherein The interface depth of the low concentration doped region of the second impurity is greater than the depth of the central portion and less than 0.8 ㎛. The method of claim 1, Wherein the first impurity is a p-type semiconductor impurity, and the second impurity is an n-type semiconductor impurity. The method of claim 7, wherein The n-type semiconductor impurities are selected from the group consisting of phosphorus (P), arsenic (As), antimony (Sb). In the method of forming a selective emitter of a solar cell consisting of a high concentration doping region of the second impurity and a low concentration doping region of the second impurity on the entire surface of the first impurity semiconductor substrate, The highly doped region of the second impurity is Applying a second impurity paste to a predetermined region on the first impurity semiconductor substrate; And a second heat treatment of the second impurity paste. The method of claim 9, And wherein the low concentration doped region of the second impurity is formed in the remaining region in which the high concentration doped region of the second impurity is not formed on the first impurity semiconductor substrate. The method of claim 9, And the low concentration doped region of the second impurity is formed at the same time in the heat treatment of the second impurity paste. The method of claim 9, The lightly doped region of the second impurity is formed by diffusion of the second impurity gas. The method of claim 12, Wherein the second impurity gas is a second impurity gas generated from the applied second impurity paste or an injected POCl ₃ gas. The method of claim 9, And the second impurity paste is applied by screen printing or printing. The method of claim 9, The heat treatment is a selective emitter forming method of a solar cell, characterized in that consisting of within 30 seconds to 10 minutes at a temperature of 820 ℃ to 950 ℃. The method of claim 9, Wherein the first impurity is a p-type semiconductor impurity and the second impurity is an n-type semiconductor impurity. The method of claim 16, And the n-type semiconductor impurity is selected from the group consisting of phosphorus (P), arsenic (As) and antimony (Sb). A method of manufacturing a solar cell comprising the method of forming a selective emitter of the solar cell according to any one of claims 9 to 17.

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