KR20100042424A - Method for forming pattern of semiconductor device - Google Patents

Abstract

PURPOSE: A method for forming a semiconductor pattern is provided to improve reliability of a process by preventing the contamination of the following die and a template structure surface and forming a large number of resist patterns with a constant size. CONSTITUTION: A template(115) with each image structure is provided. A cured resin layer(117) is coated on the embossed image structure of the template. A resist layer for imprint is formed on a semiconductor substrate. The resist layer for imprint is compressed and cured by the template coated with the resin layer. The template is separated from the substrate.

Description

Pattern Forming Method of Semiconductor Device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a pattern of a semiconductor device, and more particularly, to a pattern forming method of a semiconductor device capable of improving defects caused by an imprint lithography process, which is one of semiconductor device manufacturing processes.

Today, electronic and electrical technologies are rapidly evolving to store more information, process and transmit information faster, or build a simpler information network to keep pace with the 21st century's high information and communication society.

In particular, as the semiconductor device is expanded in its application field, manufacturing techniques for improving reliability while simultaneously implementing components as small as possible without deteriorating electrical characteristics have been continuously developed.

Photo-lithography, one of the most widely used microstructure fabrication techniques, is a technique for printing and forming a complex pattern defining an integrated circuit on a semiconductor substrate coated with a photoresist thin film. At this time, the size of the pattern to be formed is limited by the optical diffraction phenomenon, the resolution is determined by the thickness of the photoresist and the wavelength of the light source used. Therefore, in order to form fine patterns as the degree of integration of components increases, an exposure technique using a short wavelength light source is required. Conventionally, a KrF excimer laser (248 nm) that generates g-line (435 nm), i-line (365 nm) or DUV (Deep Ultraviolet) has been used as a light source, but in order to form a finer pattern, a light source such as ArF This is being applied. However, even these light sources have a limit in forming an ultra-fine pattern of 50 nm or less.

Recently, EUV lithography using extreme ultraviolet (EUV, Extreame Ultraviolet) with a wavelength in the range of 10-14 nm, called 'Next-Generation Lithographics' (NGL's), is used to overcome the limitations of optical lithography. EUVL), X-ray lithography, Ion-beam Projection lithography, or Electron-Beam lithography.

However, even in the case of the lithography techniques, there are still many problems in manufacturing nanodevices. EUV light sources, for example, are strongly absorbed in almost all materials and must be vacuumed and use reflective optical systems rather than conventional refractive optics. In addition, due to the very low reflectance of EUV at orthogonal angles of incidence, the reflective surface must be multi-layered coated with a thin film known as Distributed Bragg Reflect (DBR), and a perfect mirror is required, requiring very advanced polishing and metrology techniques. In addition, the application of EUV light source requires a new resist and process technology suitable for this. Thus, the EUV light source has many defects yet to be commercialized.

In contrast to these lithography methods, the nanoimprint lithography method proposed by Professor Stephen Chou of Princeton University is in the spotlight as a technology for economically mass-producing nanostructures and nanodevices. The nanoimprint lithography method is obtained by compressing a substrate surface coated with a thermoplastic polymer such as polymethyl-methacrylate (PMMA) with a stamp having a nano-sized structure (100 nm or less) and pressing a resin. This is a method of moving a stamp pattern on a surface. At this time, the nanostructure engraved in the resin is formed in the same shape as the stamp, the stamp is mainly made of silicon or silicon oxide having a nano-sized pattern. The imprint lithography method has an advantage of easy mass production at a low cost compared to a resist pattern formation method using a general ArF lithography process.

The nanoimprint lithography method may be described with reference to FIGS. 1A to 1D.

Referring to FIG. 1A, an imprint resist 13 including a thermoplastic polymer such as PMMA is coated on a silicon wafer 11 in a drop shape.

Referring to FIGS. 1B and 1C, the imprinting resist 13 is compressed using a template 15 including an embossed image structure similar to the pattern to obtain the imprint resist 13, and then the exposure process 17 is exposed to UV. To harden.

Referring to FIG. 1D, the template 15 is separated from the wafer to form a resist pattern 19 on the silicon wafer 11 that is identical to the relief image of the template.

On the other hand, the imprint lithography method has a disadvantage in that, when the template is separated from the wafer, as shown in FIG. 1D, an uncured resist material for imprint 13-1 adheres to the template, resulting in an uneven pattern. Moreover, when high pressure is applied to improve the degree of curing of the resin for imprint, the durability of the template is lowered, resulting in a problem of shortening the life. In addition, when the template on which the imprint resist material is stuck is reused in the imprint process for subsequent dies, not only the subsequent dies are contaminated, but also the pattern size to be formed is not constant, thereby lowering the semiconductor yield.

Accordingly, in the present invention, unlike the method of directly pressing the template surface on which the structure having a predetermined shape is formed directly on the resist layer for imprint, the resin layer is formed along the relief structure of the template in order to reduce the surface energy of the template. It is an object of the present invention to provide a method for preventing the imprint resist material from adsorbing onto the template after the step.

In the present invention to achieve the above object

Providing a template having an embossed image structure corresponding to a plurality of patterns to be formed;

Coating a cured resin layer on the relief image structure of the template;

Forming a resist layer for imprint on the semiconductor substrate;

Pressing and curing the imprint resist layer into a template including the resin layer; And

A method of forming a pattern of a semiconductor device using an imprint method comprising separating the template from a substrate to form a resist layer in which a plurality of patterns corresponding to the structure of the template are imprinted.

In the method of the present invention, the resin layer is coated in a step of thermal curing after applying a composition comprising a fluoropolymer and a solvent.

In this case, the fluoropolymer may be any one selected from the group consisting of a perfluoro acrylate polymer, a perfluoro cyclopentadiene vinyl polymer having a molecular weight of 1,000 to 50,000, the compound of the following formula (1) and (2).

[Formula 1]

[Formula 2]

Wherein n is an integer from 3 to 150, m is an integer from 3 to 158, and o is an integer from 1 to 10.

In addition, propylene glycol monomethyl ether acetate or propylene glycol monomethyl ether is used as the solvent.

The resin layer may be coated at an appropriate thickness according to the half-pitch of the semiconductor, and is preferably coated at a level of 2.5 times the normal half-pitch. For example, when the half-pitch of the 16G flash semiconductor device is 40 nm, the resin layer thickness is 100 nm. It is preferable that the resin layer thickness of this invention is about 600 kPa-1,000 kPa. If the thickness of the resin layer is less than 600 μs, there is a problem that an etching failure occurs due to insufficient etching selectivity when etching a material such as a lower oxide film or a nitride film, and if the thickness exceeds 1000 μs, there should be no resin pattern on the wafer. The disadvantage is that resin residues remain in the area.

As described above, in the fluoropolymer used in the present invention, the atoms are irregularly arranged in an amorphous state, so that the energy state and the interaction size of the internal atoms are different from location to location. That is, the balance of forces is not distributed, the attraction is very weak, and the surface energy of the polymer is very low because the polymer contains fluorine and the hydrophobicity of the polymer increases. Therefore, when the resin layer is coated on the template surface as in the method of the present invention, the surface energy is relatively lower than that of the semiconductor substrate on which the subsequent imprint resist layer is formed.

In addition, in the method of the present invention, the imprint resist includes a polymerization initiator such as azobis isobutyronitrile (AIBN) or benzoyl peroxide (BPO), a polymer and a solvent consisting of a crosslinking agent, an acrylate and a vinyl ether compound. If it is a normal imprint resist of viscosity 3-7cp, it will not restrict | limit in particular.

In this case, the imprint resist is formed on the substrate in the form of droplets having an average size of 3 to 9 pico liters using an inkjet method.

In addition, the compression process is carried out under a pressure condition of 50 ~ 10mJ / cm ² , the curing step after the template pressing is carried out by a UV exposure process or a thermal process. That is, the UV process is performed at the wavelength of 100-300 nm until the hardening of the imprinting resist is completed with respect to the whole template.

At this time, the pressing process for the resist is not pressing the entire surface of one wafer with a single template, but the pressing process is performed several times to several hundred times by a step & repeat method. In other words, one wafer typically produces hundreds of chips, but one template consists of several chip structures. If spin coating is applied to the entire surface of the wafer after the resist is coated, the mold is pressed tens to hundreds of times, but the first compressed pattern is formed, but the chips that are later compressed are not compressed because the resist dries and hardens. No pattern is formed. Therefore, in the present invention, since the resist droplets are sprayed every chip just before pressing, the pressing process is performed to prevent the resist from drying out. In other words, the resist pressing and curing step comprises spraying a resist droplet, compressing a template, and then exposing it to cure the resist and detaching the template in one step, and repeating the process by several tens to hundreds of times. Perform compression and curing processes.

As described above, in the method of the present invention, by coating a resin layer on the surface of the template structure to lower the surface energy than the semiconductor substrate, it is possible to prevent the conventional disadvantage that the resist material adheres to the template during the desorption process. Therefore, not only a pattern having a uniform size can be formed, but also a subsequent die can be prevented from being contaminated during subsequent imprint processes that are continuously performed, thereby increasing the reliability and production yield of the semiconductor device process.

As described above, not only can the resist pattern of a certain size be formed in a large amount by the method of the present invention, but also the contamination of the surface of the template structure and the subsequent die can be prevented, thereby increasing the reliability of the process.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings 2a to 2d. However, the drawings are only to illustrate the most preferred method of the method of the present invention, the present invention is not limited by the following method.

First, referring to FIG. 2A, a droplet-shaped imprint resist layer 113 is formed on the silicon wafer 111.

At this time, the imprinting resist 113 is not particularly limited as long as it is an imprinting resist having a viscosity of 3 to 7 cp, including a polymer made of a crosslinking agent, an acrylate and a vinyl ether compound, a polymerization initiator, and a solvent. The imprint resist 113 is formed on the substrate in the form of droplets having an average size of 3 to 9 pico liters using an inkjet method.

Referring to FIG. 2B, an imprint image structure having a shape similar to a pattern to be obtained on the imprint resist layer 113 is disposed, and a template 115 including a resin layer 117 is positioned on the image structure. .

In this case, the template 115 is not particularly limited as long as it is formed of a material having high strength so as to have a resistance to stress during the subsequent compression process, but UV, using silica, quartz, glass, polymer, etc. It may be formed of a transparent material that can be transmitted or formed of an opaque material using a semiconductor, a ceramic, a metal, a poly and the like.

In addition, the manufacturing method of the template is formed by stamping each structure through the shape processing process on the surface of the plate-shaped material or by attaching to the plate-shaped material by forming separate structures, respectively, The process is not particularly limited as long as it is known in the art. In this case, the shape processing process is not particularly limited, and electron beam lithography, photo-lithography, dicing, laser, reactive ion etching (RIE) process, or etching process may be used.

In addition, the size of the relief image structure corresponding to the pattern formed on the template 115 is not particularly limited, but preferably has a size applicable to the fine pattern of the printed circuit board.

In addition, the resin layer 117 coated on the surface of the template 115 may be formed using a spin coating method, a droplet dispensing method, or a spray method on a composition containing a fluoropolymer and a solvent. By coating and then thermally curing.

At this time, the resin layer 117 is a perfluoro acrylate polymer, a perfluoro cyclopentadiene vinyl polymer having a molecular weight of 1,000 to 50,000, a compound of Formula 1 (manufactured by Dupont, 'Teflon AF') and the compound of formula 2 (Asahi Glass, manufactured by 'Cytop') may be any one selected from the group consisting of.

[Formula 1]

[Formula 2]

Wherein n is an integer from 3 to 150, m is an integer from 3 to 158, and o is an integer from 1 to 10.

The solvent uses propylene glycol monomethyl ether acetate or propylene glycol monomethyl ether and the like.

The thickness of the resin layer 117 may be applied at an appropriate thickness according to the half-pitch of the semiconductor. Preferably, the thickness of the resin layer 117 is typically 2.5 times the half-pitch. For example, the thickness of the electroless resin layer 117 in the present invention is preferably about 600 kPa to 1,000 kPa. If the thickness of the resin layer 117 is less than 600 μs, there is a problem that an etching failure occurs due to insufficient etching selectivity when etching a material such as a lower oxide film or a nitride film. There is a disadvantage that the resin layer residues remain in areas where there should be no.

Referring to FIG. 2C, the imprint resist layer 113 is compressed into the template 115 and then cured by a UV exposure process 119. The compression process is carried out under a pressure condition of 50 ~ 10mJ / cm ² , the UV process is carried out under a wavelength of 100 ~ 300nm until the imprint resist layer 113 is cured.

Referring to FIG. 2D, after completion of the compression process, the template 115 is separated from the wafer 111 to form the same resist pattern 121 as the embossed image on the silicon wafer 111.

1A to 1D are process schematic diagrams illustrating a method for forming a pattern of a semiconductor device to which a conventional imprint lithography process is applied.

2A to 2D are process schematic diagrams illustrating a method for forming a pattern of a semiconductor device to which the imprint lithography process of the present invention is applied.

 <Brief description of the main parts of the drawing>

11, 111: wafer 13, 113: imprint resist layer

13-1: Imprint Resist Residues on the Template

15, 115: template 17, 119: UV process

117: resin layer 19, 121: resist pattern

Claims (11)

Providing a template on which an embossed image structure is formed; Coating a cured resin layer on the relief image structure of the template; Forming a resist layer for imprint on the semiconductor substrate; Pressing and curing the imprint resist layer into a template coated with the resin layer; And The pattern forming method of a semiconductor device using an imprint method comprising the step of separating the template from the substrate. The method according to claim 1, The resin layer is formed by applying a composition containing a fluoropolymer and a solvent, and then heat-curing, wherein the pattern forming method of a semiconductor device using an imprint method. The method according to claim 2, The fluoropolymer is any one selected from the group consisting of a perfluoro acrylate polymer, a perfluoro cyclopentadiene vinyl polymer, a compound of formula 1 and a compound of formula 2 of the semiconductor device using an imprint method Pattern Forming Method: [Formula 1]

[Formula 2]

Wherein n is an integer from 3 to 150, m is an integer from 3 to 158, and o is an integer from 1 to 10. The method according to claim 2, The solvent is propylene glycol monomethyl ether acetate or propylene glycol monomethyl ether, characterized in that the pattern forming method of a semiconductor device using the imprint method. The method according to claim 1, The thickness of the resin layer is 2.5 times the half-pitch of the semiconductor device pattern forming method of a semiconductor device using an imprint method. The method according to claim 5, The thickness of the resin layer is 600 kPa-1,000 kPa, The pattern formation method of the semiconductor element using the imprint method characterized by the above-mentioned. The method according to claim 1, The imprint resist is a pattern forming method of a semiconductor device using an imprint method, characterized in that the imprinting resist having a viscosity of 3 ~ 7cp including a polymer and a solvent consisting of a polymerization initiator, a crosslinking agent, an acrylate and a vinyl ether compound. The method according to claim 1, And the imprint resist is formed on the substrate in the form of droplets having an average size of 3 to 9 pico liters using an inkjet method. The method according to claim 1, Compressing the resist layer for imprinting is performed under a pressure condition of 50 to 10 mJ / cm ² . The method according to claim 1, The step of curing the resist for imprinting is a pattern forming method of a semiconductor device using an imprint method, characterized in that performed by UV exposure process or thermal process of a wavelength of 100 ~ 300nm. The method according to claim 1, And separating the template from the substrate from the step of forming the resist layer for imprint, repeating the step of forming the pattern from the substrate.

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