KR20100039129A - Plasma display apparatus - Google Patents

Abstract

PURPOSE: A plasma display apparatus is provided to improve image quality of a display by reducing an erroneous discharge of a panel. CONSTITUTION: A plasma display apparatus comprises a plurality of scan electrodes, a plurality of sustain electrodes, and a plurality of address electrodes. A plurality of scan electrodes divides into two or more groups. At least one subfield comprises a first set-down period, a first scan period, a second set-down period, and a second scan period. The first set-down period gradually drops a voltage applied to the first group. The first scan signal is supplied to the first group for the first sand period. The second set-down period gradually drops the voltage applied to the second group.

Description

Plasma display apparatus

The present invention relates to a plasma display device, and more particularly, to an apparatus for driving a plasma display panel.

The plasma display apparatus includes a panel in which a plurality of discharge cells are formed between a rear substrate having a partition wall and a front substrate opposite thereto, and is selectively generated by discharge of the plurality of discharge cells according to an input image signal. A device for displaying an image by causing vacuum ultraviolet rays to emit phosphors.

In order to effectively display an image, a plasma display apparatus generally includes a driving control device which processes an input image signal and outputs the driving signal to a driving unit which supplies a driving signal to a plurality of electrodes included in the panel.

In the case of the plasma display apparatus of the large screen, the time margin for driving the panel is insufficient, and it is necessary to stably drive the panel at high speed.

An object of the present invention is to provide a more reliable plasma display device by improving the image quality of the display image and reducing the amount of heat generated by reducing address mis-discharge that may occur during high-speed driving of the plasma display panel.

A plasma display device according to the present invention includes a plurality of scan electrodes and sustain electrodes formed on an upper substrate, and a plurality of address electrodes formed on a lower substrate, and the plurality of scan electrodes include at least two including first and second groups. At least one of the plurality of subfields includes: a first setdown period in which a voltage supplied to the first group gradually decreases; A first scan section for supplying a first scan signal to a first group; a second set-down section for gradually decreasing a voltage supplied to a second group; And a second scan section sequentially supplying a second scan signal to the second group, wherein a difference between the lowest voltage of the first setdown section and the lowest voltage of the first scan section is determined by the lowest voltage and the second scan section of the second setdown section. It is characterized by different from the difference in the lowest voltage of the interval.

According to the plasma display device according to the present invention, the address mis-discharge of the panel can be reduced, thereby improving the image quality of the display image. In addition, by lowering the address voltage, the amount of heat generated by the circuit element can be reduced, thereby increasing the reliability of the plasma display device.

Hereinafter, a method of driving a plasma display panel and a plasma display apparatus using the same will be described in detail with reference to the accompanying drawings. 1 is a perspective view illustrating an embodiment of a structure of a plasma display panel.

As shown in FIG. 1, the plasma display panel includes a scan electrode 11, a sustain electrode 12, a sustain electrode pair formed on the upper substrate 10, and an address electrode 22 formed on the lower substrate 20. It includes.

The sustain electrode pairs 11 and 12 generally include transparent electrodes 11a and 12a and bus electrodes 11b and 12b formed of indium tin oxide (ITO), and the bus electrodes 11b and 12b. 12b) may be formed of a metal such as silver (Ag) or chromium (Cr) or a stack of chromium / copper / chromium (Cr / Cu / Cr) or a stack of chromium / aluminum / chromium (Cr / Al / Cr). . The bus electrodes 11b and 12b are formed on the transparent electrodes 11a and 12a to serve to reduce voltage drop caused by the transparent electrodes 11a and 12a having high resistance.

Meanwhile, according to the exemplary embodiment of the present invention, the sustain electrode pairs 11 and 12 may not only have a structure in which the transparent electrodes 11a 12a and the bus electrodes 11b and 12b are stacked, but also the buses without the transparent electrodes 11a and 12a. Only the electrodes 11b and 12b may be configured. This structure does not use the transparent electrodes (11a, 12a), there is an advantage that can lower the cost of manufacturing the panel. The bus electrodes 11b and 12b used in this structure may be various materials such as photosensitive materials in addition to the materials listed above.

Light between the scan electrodes 11 and the sustain electrodes 12 between the transparent electrodes 11a and 12a and the bus electrodes 11b and 11c to absorb external light generated outside the upper substrate 10 to reduce reflection. A black matrix (BM, 15) is arranged that functions to block and to improve the purity and contrast of the upper substrate 10.

The black matrix 15 according to the exemplary embodiment of the present invention is formed on the upper substrate 10, the first black matrix 15 and the transparent electrodes 11a and 12a formed at positions overlapping the partition wall 21. And the second black matrices 11c and 12c formed between the bus electrodes 11b and 12b. Here, the first black matrix 15 and the second black matrices 11c and 12c, also referred to as black layers or black electrode layers, may be simultaneously formed and physically connected in the formation process, or may not be simultaneously formed and thus not physically connected. .

In addition, when physically connected and formed, the first black matrix 15 and the second black matrix 11c and 12c may be formed of the same material, but may be formed of different materials when they are formed separately.

The upper dielectric layer 13 and the passivation layer 14 are stacked on the upper substrate 10 having the scan electrode 11 and the sustain electrode 12 side by side. Charged particles generated by the discharge are accumulated in the upper dielectric layer 13, and the protective electrode pairs 11 and 12 may be protected. The protective film 14 protects the upper dielectric layer 13 from sputtering of charged particles generated during gas discharge, and increases emission efficiency of secondary electrons.

In addition, the address electrode 22 is formed in a direction crossing the scan electrode 11 and the sustain electrode 12. In addition, the lower dielectric layer 23 and the partition wall 21 are formed on the lower substrate 20 on which the address electrode 22 is formed.

In addition, the phosphor layer 23 is formed on the surfaces of the lower dielectric layer 24 and the partition wall 21. The partition wall 21 has a vertical partition wall 21a and a horizontal partition wall 21b formed in a closed shape, and physically distinguishes discharge cells, and prevents ultraviolet rays and visible light generated by the discharge from leaking into adjacent discharge cells.

In an embodiment of the present invention, not only the structure of the partition wall 21 illustrated in FIG. 1, but also the structure of the partition wall 21 having various shapes may be possible. For example, a channel in which a channel usable as an exhaust passage is formed in at least one of the differential partition structure, the vertical partition 21a, or the horizontal partition 21b having different heights of the vertical partition 21a and the horizontal partition 21b. A grooved partition structure having a groove formed in at least one of the type partition wall structure, the vertical partition wall 21a, or the horizontal partition wall 21b may be possible.

Here, in the case of the differential partition wall structure, the height of the horizontal partition wall 21b is more preferable, and in the case of the channel partition wall structure or the groove partition wall structure, it is preferable that a channel is formed or the groove is formed in the horizontal partition wall 21b. something to do.

Meanwhile, in one embodiment of the present invention, although the R, G and B discharge cells are shown and described as being arranged on the same line, it may be arranged in other shapes. For example, a Delta type arrangement in which R, G, and B discharge cells are arranged in a triangular shape may be possible. In addition, the shape of the discharge cell may be not only rectangular, but also various polygonal shapes such as a pentagon and a hexagon.

In addition, the phosphor layer 23 emits light by ultraviolet rays generated during gas discharge to generate visible light of any one of red (R), green (G), and blue (B). Here, an inert mixed gas such as He + Xe, Ne + Xe and He + Ne + Xe for discharging is injected into the discharge space provided between the upper / lower substrates 10 and 20 and the partition wall 21.

FIG. 2 illustrates an embodiment of an electrode arrangement of a plasma display panel, and a plurality of discharge cells constituting the plasma display panel are preferably arranged in a matrix form as shown in FIG. 2. The plurality of discharge cells are provided at the intersections of the scan electrode lines Y1 to Ym, the sustain electrode lines Z1 to Zm, and the address electrode lines X1 to Xn, respectively. The scan electrode lines Y1 to Ym may be driven sequentially or simultaneously, and the sustain electrode lines Z1 to Zm may be driven simultaneously. The address electrode lines X1 to Xn may be driven by being divided into odd-numbered lines and even-numbered lines, or sequentially driven.

Since the electrode arrangement shown in FIG. 2 is only an embodiment of the electrode arrangement of the plasma panel according to the present invention, the present invention is not limited to the electrode arrangement and driving method of the plasma display panel shown in FIG. 2. For example, a dual scan method in which two scan electrode lines among the scan electrode lines Y1 to Ym are simultaneously scanned is possible. In addition, the address electrode lines X1 to Xn may be driven by being divided up and down or left and right in the center portion of the panel.

3 is a timing diagram illustrating an embodiment of a time division driving method by dividing a frame into a plurality of subfields. The unit frame may be divided into a predetermined number, for example, eight subfields SF1, ..., SF8 to realize time division gray scale display. Each subfield SF1, ... SF8 is divided into a reset section (not shown), an address section A1, ..., A8 and a sustain section S1, ..., S8.

Here, according to an embodiment of the present invention, the reset period may be omitted in at least one of the plurality of subfields. For example, the reset period may exist only in the first subfield or may exist only in a subfield about halfway between the first subfield and all the subfields.

In each address section A1, ..., A8, a display data signal is applied to the address electrode X, and scan pulses corresponding to each scan electrode Y are sequentially applied.

In each of the sustain periods S1, ..., S8, a sustain pulse is alternately applied to the scan electrode Y and the sustain electrode Z to form wall charges in the address periods A1, ..., A8. Sustain discharge occurs in the discharge cells.

The luminance of the plasma display panel is proportional to the number of sustain discharge pulses in the sustain discharge periods S1, ..., S8 occupied in the unit frame. When one frame forming one image is represented by eight subfields and 256 gradations, each subfield in turn has different sustains at a ratio of 1, 2, 4, 8, 16, 32, 64, and 128. The number of pulses can be assigned. In order to obtain luminance of 133 gradations, cells may be sustained by addressing the cells during the subfield 1 section, the subfield 3 section, and the subfield 8 section.

The number of sustain discharges allocated to each subfield may be variably determined according to weights of the subfields according to the APC (Automatic Power Control) step. That is, in FIG. 3, a case in which one frame is divided into eight subfields has been described as an example. However, the present invention is not limited thereto, and the number of subfields forming one frame may be variously modified according to design specifications. Do. For example, a plasma display panel may be driven by dividing one frame into eight or more subfields, such as 12 or 16 subfields.

The number of sustain discharges allocated to each subfield can be variously modified in consideration of gamma characteristics and panel characteristics. For example, the gray level assigned to subfield 4 may be lowered from 8 to 6, and the gray level assigned to subfield 6 may be increased from 32 to 34.

4 is a timing diagram illustrating an embodiment of a drive signal for driving a plasma display panel.

The subfield is a wall formed by a pre-reset section and a pre-reset section for forming positive wall charges on the scan electrodes Y and negative wall charges on the sustain electrodes Z. It may include a reset section for initializing the discharge cells of the entire screen by using the charge distribution, an address section for selecting the discharge cells, and a sustain section for maintaining the discharge of the selected discharge cells. have.

The reset section includes a setup section and a setdown section. In the setup section, rising ramp waveforms (Ramp-up) are simultaneously applied to all scan electrodes to generate fine discharges in all discharge cells. Thus, wall charges are generated. In the set down period, a falling ramp waveform (Ramp-down) falling at a positive voltage lower than the peak voltage of the rising ramp waveform (Ramp-up) is simultaneously applied to all the scan electrodes (Y), thereby erasing and discharging the discharge cells. Is generated, thereby eliminating unnecessary charges during wall charges and space charges generated by the setup discharges.

In the address period, a scan signal having a negative scan voltage Vsc is sequentially applied to the scan electrode, and at the same time, a positive data signal is applied to the address electrode X. The address discharge is generated by the voltage difference between the scan signal and the data signal and the wall voltage generated during the reset period, thereby selecting the cell. On the other hand, in order to increase the efficiency of the address discharge, a sustain bias voltage Vzb is applied to the sustain electrode during the address period.

During the address period, the plurality of scan electrodes Y may be divided into two or more groups, and scan signals may be sequentially supplied to each group, and each of the divided groups may be further divided into two or more subgroups and sequentially, for each of the subgroups. Scan signals can be supplied. For example, the plurality of scan electrodes Y is divided into a first group and a second group, and scan signals are sequentially supplied to scan electrodes belonging to the first group, and then scan electrodes belonging to the second group The scan signals can be supplied sequentially.

According to an embodiment of the present invention, the plurality of scan electrodes Y may be divided into a first group located at an even number and a second group located at an odd number according to a position formed on a panel. In another embodiment, the panel may be divided into a first group positioned above and a second group positioned below the center of the panel.

The scan electrodes belonging to the first group divided by the above method are further divided into a first subgroup located at an even number and a second subgroup located at an odd number, or the first group. The first subgroup positioned above and the second group positioned below may be divided based on the center of the.

In the sustain period, a sustain pulse having a sustain voltage Vs is alternately applied to the scan electrode and the sustain electrode to generate sustain discharge in the form of surface discharge between the scan electrode and the sustain electrode.

The width of the first sustain signal or the last sustain signal among the plurality of sustain signals alternately supplied to the scan electrode and the sustain electrode in the sustain period may be greater than the width of the remaining sustain pulses.

After the sustain discharge occurs, an erase period for erasing the wall charge remaining in the scan electrode or the sustain electrode of the selected ON cell in the address period by generating a weak discharge may be further included after the sustain period.

The erase period may be included in all or some of the plurality of subfields, and the erase signal for the weak discharge is preferably applied to the electrode to which the last sustain pulse is not applied in the sustain period.

The cancellation signal is a ramp-type signal that gradually increases, a low-voltage wide pulse, a high-voltage narrow pulse, an exponential signal, or half Sinusoidal pulses can be used.

In addition, a plurality of pulses may be sequentially applied to the scan electrode or the sustain electrode to generate the weak discharge.

The driving waveforms shown in FIG. 4 are exemplary embodiments of signals for driving the plasma display panel according to the present invention, and the present invention is not limited to the waveforms shown in FIG. 4. For example, the pre-reset period may be omitted, and the polarity and the voltage level of the driving signals illustrated in FIG. 4 may be changed as necessary. After the sustain discharge is completed, an erase signal for erasing wall charge may be applied to the sustain electrode. May be authorized. In addition, the single sustain driving may be performed by applying the sustain signal to only one of the scan electrode (Y) and the sustain (Z) electrode to generate a sustain discharge.

The scan electrodes may be dividedly driven into at least two groups. FIG. 5 is a timing diagram illustrating an exemplary embodiment in which scan electrodes of a plasma display panel are divided into two groups and driven. The plurality of scan electrodes may be divided into the first group located in the even-numbered second and the second group located in the odd-numbered.

Referring to the second subfield 2SF, the at least one subfield may include a reset section, a plurality of scan and sustain sections, and a setdown section.

The reset period is a period of initializing the wall charge states formed in all the scan electrodes Y in all groups, that is, the first and second groups.

In the first scan section, a scan pulse is applied to the discharge cells formed by the first group of scan electrodes, and correspondingly, a data pulse is applied to the address electrode to perform an address operation. Accordingly, cells to be turned on among the scan electrodes of the first group are selected. A first holding period for sustaining (sustaining) and discharging cells to be turned on in the first group is performed.

Thereafter, the second set-down section further eliminates unnecessary wall charges and makes the wall charge distribution uniform.

After that, a scan pulse is applied to the discharge cells formed by the second group of scan electrodes in the second scan section, and correspondingly, a data pulse is applied to the address electrodes to perform the address operation. Therefore, the cells to be turned on among the scan electrodes of the second group are selected. A second holding period for sustaining (sustaining) and discharging the cells to be turned on in the second group is performed. The second sustain section may further include a section for performing sustain discharge on all cells to be turned on after sustain discharge of the second group according to the required number of discharges of the corresponding subfield.

As such, when the cells constituting the panel are driven by the electrode lines, the address operation and the sustain discharge operation are performed on the first group, and the address operation and the sustain discharge operation are performed on the next second group. Then, the time taken to perform the address operation on the first group and then the sustain discharge operation is shorter than the time taken to perform the address operation on the entire line scan electrode and then to the sustain discharge operation. Therefore, the temporal gap between the address (scan) section and the sustain section can be minimized to enable smooth sustain discharge in the sustain section.

 In the setup section, a positive voltage is applied to all the scan electrodes Y to generate a setup discharge to accumulate wall charges. The reset signal supplied to the scan electrode may include a setup period and a first set-down period that gradually decreases to a negative voltage, and a bias voltage Vzb may be supplied to the sustain electrode to overlap at least a portion of the reset signal. have.

In the first set-down period, as the signal gradually descending to the negative voltage is supplied to the scan electrode Y of the first group, the unnecessary charge of the wall charges formed on the scan electrode Y is erased in the setup period. do.

During the first set-down period, a voltage that gradually decreases to a negative voltage is supplied to the scan electrode Y of the first group, and a positive bias voltage Vzb is supplied to the sustain electrode Z. Weak discharge occurs between the electrodes, and the unwanted wall charges are erased by the discharge. Such erasure discharge results in an even distribution of wall charges in each discharge cell in which the address discharge is to occur.

However, since the address discharge is generated in the second scan period after the first sustain period, the second group erases wall charges in the second set-down period. Therefore, in the first set-down period, the voltage may be gently lowered to prevent weak discharge. In this case, the second group of scan electrodes may be floated to allow the voltage to drop gently.

      As the time from the end of setup and set-down to the time when the scan pulse is supplied to the scan electrode becomes longer, the rate of decrease of wall charges in the discharge cell increases. This is because the wall charges in the discharge cell and the space charges in the space inside the discharge cell are combined.

      Accordingly, in the second group, which has a late scan order, the amount of wall charges at the time of the address discharge is reduced, so that a relatively weak address discharge or misdischarge may occur compared to the first group in which the address discharge is quickly performed. In addition, when the intensity of the address discharge of each scan electrode is different from each other, there is a risk that the intensity of the sustain discharge in the subsequent sustain period is also different and that a luminance difference occurs for each scan electrode.

Referring to FIG. 5, the voltage difference ΔVy between the lowest voltage of the voltage applied to the scan electrode Y in the first and second set-down periods and the scan pulse applied to the scan electrode Y in the address period is all scan electrodes ( The same is set in Y). That is, the voltage difference ΔVy between the lowest voltage of the first set-down period and the scan pulse in the first scan period in the first group of scan electrodes in which the scan order is relatively quick is the scan of the second group in which the scan order is relatively late. The voltage difference ΔVy between the lowest voltage of the second setdown section at the electrode and the scan pulse at the second scan section is the same.

       Therefore, the second group, which may have a large amount of wall charge loss due to a late scan order, may erase the same amount of wall charge as that of the first group, thereby causing insufficient wall charge in the second scan section. Then, as described above, there is a greater possibility of the problem of mis-discharge and luminance difference.

      A plasma display device according to the present invention includes a plurality of scan electrodes and sustain electrodes formed on an upper substrate, and a plurality of address electrodes formed on a lower substrate, the plurality of scan electrodes including at least one of first and second groups. Divided into two or more groups, and at least one of the plurality of subfields

A first set-down period in which the voltage supplied to the first group gradually decreases;

A first scan section supplying a first scan signal to the first group;

A second set down period in which the voltage supplied to the second group is gradually decreased;

And a second scan period for supplying a second scan signal to the second group, wherein a difference between the lowest voltage between the first setdown period and the first scan period is determined by the second setdown period and the second scan period. It is characterized by different from the lowest voltage difference.

The plurality of scan electrodes may be dividedly driven into at least two groups, and the plurality of scan electrodes may be divided into the first group located at the even-numbered second and the second group located at the odd-numbered.

6 to 9 are timing diagrams illustrating exemplary embodiments of a plasma display apparatus for driving the scan electrodes of the panel into two groups.

Referring to FIG. 6, in at least one subfield among a plurality of subfields, a difference ΔVy1 between a minimum voltage between the first setdown period and the first scan period, and the second setdown period and the second scan period. The difference ΔVy2 of the lowest voltages is different from each other.

In addition, the potential difference ΔVy1 between the first setdown period and the lowest voltage of the first scan period may be smaller than the potential difference ΔVy2 between the second setdown period and the lowest voltage of the second scan period.

Table 1 below is data obtained by measuring the change in voltage value Va of the data signal applied to the address electrode in the first and second scan intervals by adjusting the potential difference between ΔVy1 and ΔVy2.

As can be seen in Table 1 below, the potential difference between ΔVy1 and ΔVy2 is 0V, that is, the potential difference ΔVy1 between the first set-down period and the lowest voltage of the first scan period is determined by the second set-down period and the second scan period. Configuring the potential difference ΔVy2 between the lowest voltages to be different than when configured to be the same may reduce the address voltage Va of the data signal.

Potential difference between ΔVy1 and ΔVy2 Va voltage 0 V 47 V 3 V 42 V 5 V 43 V 7 V 46 V 8V 49 V 10 V 52 V

      That is, in the second group having a relatively late scan order, the difference between the lowest voltage V2 of the second set-down period and the lowest voltage (-Vy) of the scan pulse supplied from the second scan period is ΔVy2, and the scan order is relatively. By making it larger than [Delta] Vy1 of the fast first group, the setdown discharge occurring during setdown is relatively weakened and the amount of wall charges erased in this setdown period is reduced.

As a result, the amount of wall charges located in the discharge cells after the set-up discharge is relatively slow, so that even if the length of the period from the end of the set-down period to the time when the address discharge occurs becomes longer, the discharge cells at the address discharge The amount of wall charge in the interior is similar to the first group in which the scan order is relatively fast. Therefore, it is possible to enable stable address discharge in the entire scan electrode.

In the case of a plasma display panel having a high resolution, power consumption for driving the panel may be greatly increased, and as the number of electrode lines is greatly increased, it is difficult to secure driving margin of the panel. By reducing the width of the circuit, the possibility of address mis-discharge can be increased. Although the address voltage is increased for stable address discharge, not only power consumption is increased but also heat generation of the address electrode driver increases the risk of damage to circuit elements such as data ICs.

        According to the present invention, not only the power consumption can be lowered. Since the address voltage capable of generating normal address discharge can be lowered, the amount of heat generated in the address electrode portion is reduced, thereby improving the reliability of the plasma display apparatus.

       Referring to Table 1 above, more preferably, the potential difference ΔVy1 between the first set-down period and the lowest voltage of the first scan period is equal to the potential difference between the second set-down period and the lowest voltage of the second scan period. 3V to 7V smaller than ΔVy2) is more effective for lowering the address voltage of the data signal.

       When the potential difference between ΔVy1 and ΔVy2 is less than 3V, there may be no significant difference between the case where there is no potential difference between ΔVy1 and ΔVy2 depending on the driving environment such as high temperature, and when the potential difference between ΔVy1 and ΔVy2 is greater than 7V, The possibility of address mis-discharge increases, which increases the address voltage. Therefore, as shown in Table 1, when the potential difference between ΔVy1 and ΔVy2 is 8V, it can be seen that the address voltage has increased to 49V.

The discharge gas charged in the plasma display device according to the present invention preferably includes xenon (Xe) to improve the discharge efficiency. That is, xenon (Xe) contained in the discharge gas may increase the amount of vacuum ultraviolet (UV) generated during discharge, thereby increasing the amount of visible light generated by the phosphor layer excited by the vacuum ultraviolet (UV). The brightness of the display image may be improved.

As the xenon (Xe) mixing ratio of the discharge gas is increased, the discharge efficiency may be improved so that the brightness of the display image may be improved, but there may be a problem that the voltage of the driving signals to be supplied to the electrodes to drive the panel must be increased. have.

That is, xenon (Xe) has a very low secondary electron emission coefficient, and as the xenon (Xe) mixing ratio of the discharge gas increases, the amount of secondary electrons emitted from the protective film during ion collision decreases, and thus the discharge start voltage The magnitude of the drive voltages to increase to generate a stable discharge must be increased.

      Therefore, if the driving voltages can be lowered, there is an advantage of increasing the content ratio of xenon (Xe) to improve the discharge efficiency.

      Table 2 below shows the voltage value (Va) of the data signal applied to the address electrode in the first and second scan periods by adjusting the potential difference by relatively changing ΔVy1 and ΔVy2 when the xenon (Xe) mixing ratio of discharge gas is 15%. ) This is the data that measured the change.

      Referring to Table 2 below, when the potential difference of ΔVy2 is equal to the potential difference of ΔVy1, that is, when there is no potential difference between ΔVy1 and ΔVy2, the Va voltage is 59V. However, when there is a potential difference between ΔVy1 and ΔVy2, when the potential difference of ΔVy2 is greater than the potential difference of ΔVy1, the Va voltage decreases from 59V. In addition, when the potential difference of ΔVy2 is 1.5 times or more larger than the potential difference of ΔVy1, the change in the address voltage is almost eliminated.

      Thus, the potential difference between the lowest voltage of the first set down period and the first scan period is greater than the potential difference between the lowest voltage of the second set down period and the second scan period, and the second set down period and the second scan. More preferably, less than 1.5 times the potential difference between the lowest voltages of the intervals.

ΔVy2 Va voltage ΔVy1 59 V 1.1ΔVy1 47 V 1.2ΔVy1 49 V 1.3ΔVy1 50 V 1.4ΔVy1 51 V 1.5ΔVy1 52 V 1.6ΔVy1 52 V 1.7ΔVy1 52 V

 Also, an absolute value of the lowest voltage V1 of the first set down period may be greater than an absolute value of the lowest voltage V2 of the second set down period. That is, the lowest voltage V1 of the first set down period is lower than the lowest voltage V2 of the second set down period.

 As described above, in order to compensate for the loss of wall charges formed in the second group scan electrode during the first group scan period, the lowest voltage of the set down signal supplied to the second group scan electrode of the second set down period may be increased. Accordingly, the minimum voltage difference ΔVy2 between the setdown signal and the scan signal supplied to the second group may be greater than the minimum voltage difference ΔVy1 between the setdown signal and the scan signal supplied to the first group. The amount of wall charges to be erased is reduced by not increasing the negative voltage in the second set-down period, and thus, wall charges to be used for the address discharge in the second scan period can be maintained.

The falling slope of the voltage supplied to the first group may be greater than the falling slope of the voltage supplied to the second group in the first set down period. In the first scan period after the first set-down period, since address discharge occurs only in the first group, the falling slope of the voltage supplied to the second group may be configured to prevent the wall charges from being erased or to reduce the erase amount. have.

       The falling slope of the voltage supplied to the second group may be greater than the falling slope of the voltage supplied to the first group. Since the address discharge occurs only in the second group in the second scan period after the second set-down period, the falling slope of the voltage supplied to the first group may be configured to prevent the wall charges from being erased or to reduce the erase amount. have.

       As illustrated in FIG. 7, the scan electrode of the second group may be floated in the second set-down period. Due to the floating, the voltage gradually decreases gradually and weak discharge does not occur, so that the second group of wall charge states can be maintained until the address discharge.

       Adjusting the difference ΔVy1 between the lowest voltage of the first setdown period and the first scan period and the difference ΔVy2 between the lowest voltage of the second setdown period and the second scan period is the lowest voltage of the first setdown period. (V1) or the lowest voltage (V2) of the second set-down period may be changed, but the minimum voltage (V3) of the first scan period or the minimum voltage (V2) of the second scan period is also configured. It is possible.

       Referring to FIG. 8, the lowest voltage V1 of the first set-down period and the lowest voltage V2 of the second set-down period are the same, but the lowest voltage V4 of the second scan period is lower than the minimum voltage V3 of the first scan period. This is high. That is, the absolute value of the lowest voltage V4 of the second scan period is smaller than the lowest voltage V3 of the first scan period, so that the difference between the minimum voltage ΔVy1 of the first set-down period and the first scan period and An embodiment of adjusting the difference ΔVy2 between the lowest voltage between the second set-down period and the second scan period is shown. The height and width of the scan voltage in the scan section can be varied according to the accumulation of wall charge and the driving environment.

       In addition, the lowest voltage V1 of the first set-down period and the lowest voltage V2 of the second set-down period may be configured to be different.

       As shown in FIG. 9, the lowest voltage V1 of the first set-down section, the lowest voltage V2 of the second set-down section, the lowest voltage V3 of the first scan section, and the lowest voltage V4 of the second scan section are all represented. By adjusting, the difference ΔVy1 of the lowest voltage of the first setdown period and the first scan period and the difference ΔVy2 of the lowest voltage of the second setdown period and the second scan period may be different from each other. 9 illustrates an embodiment in which the absolute value of V1 is greater than the absolute value of V2 and the absolute value of V3 is greater than the absolute value of V4. In this case, the voltage gradually falling down to V2 may be configured by plotting the scan electrode of the second group. Unlike in FIG. 9, the driving waveform design may be varied by various combinations of voltage values. will be.

       As described above, since the plasma display apparatus according to the present invention can lower the address voltage which can generate a normal address discharge, it can not only lower power consumption. The amount of heat generated in the address electrode portion is reduced, thereby improving the reliability and stability of the plasma display device.

       Although a preferred embodiment of the present invention has been described in detail above, those skilled in the art to which the present invention pertains can make various changes without departing from the spirit and scope of the invention as defined in the appended claims. It will be appreciated that modifications or variations may be made to the branches. Accordingly, modifications of the embodiments of the present invention will not depart from the scope of the present invention.

1 is a perspective view illustrating an embodiment of a structure of a plasma display panel.

2 is a diagram illustrating an embodiment of an electrode arrangement of a plasma display panel.

FIG. 3 is a timing diagram illustrating an embodiment of a method of time-divisionally driving a plasma display panel by dividing one frame into a plurality of subfields.

4 is a timing diagram illustrating an embodiment of a waveform of a driving signal for driving a plasma display panel.

5 is a timing diagram illustrating an embodiment of an apparatus for driving the scan electrodes of the plasma display panel in two groups.

6 to 9 are timing diagrams illustrating embodiments of an apparatus for driving the scan electrodes of the plasma display panel into two groups.

Claims (9)

In the plasma display device having a plurality of scan electrodes and sustain electrodes formed on the upper substrate and a plurality of address electrodes formed on the lower substrate, The plurality of scan electrodes are divided into at least two groups including first and second groups, At least one subfield of the plurality of subfields A first set-down period in which the voltage supplied to the first group gradually decreases; A first scan section supplying a first scan signal to the first group; A second set down period in which the voltage supplied to the second group is gradually decreased; Sequentially including a second scan section for supplying a second scan signal to the second group, And a potential difference between the first set-down period and the lowest voltage of the first scan period is different from a potential difference between the second set-down period and the lowest voltage of the second scan period. The method of claim 1, And the plurality of scan electrodes are divided into the first group located at the even-numbered number and the second group located at the odd-numbered number. The method of claim 1, And a potential difference between the first set-down period and the lowest voltage of the first scan period is smaller than a potential difference between the second set-down period and the lowest voltage of the second scan period. The method of claim 3, And a potential difference between the first set-down period and the lowest voltage of the first scan period is 3 V to 7 V smaller than the potential difference between the second set-down period and the lowest voltage of the second scan period. The method of claim 3, The potential difference between the first set down period and the lowest voltage of the first scan period is greater than the potential difference between the second set down period and the lowest voltage of the second scan period, and the second set down period and the second scan period. A plasma display device, characterized in that less than 1.5 times the potential difference between the lowest voltages. The method of claim 1, The absolute value of the lowest voltage of the first set down period is greater than the absolute value of the lowest voltage of the second set down period. The method of claim 1, And the falling slope of the voltage supplied to the first group in the first set down period is greater than the falling slope of the voltage supplied to the second group in the first set down period. The method of claim 1, And the falling slope of the voltage supplied to the second group in the second set down period is greater than the falling slope of the voltage supplied to the first group in the second set down period. The method of claim 1, And the scan electrodes of the second group are floated in the second set-down period.

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