KR20100033641A - Method for wafer recycling of semiconductor device - Google Patents

Method for wafer recycling of semiconductor device Download PDF

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Publication number
KR20100033641A
KR20100033641A KR1020080092604A KR20080092604A KR20100033641A KR 20100033641 A KR20100033641 A KR 20100033641A KR 1020080092604 A KR1020080092604 A KR 1020080092604A KR 20080092604 A KR20080092604 A KR 20080092604A KR 20100033641 A KR20100033641 A KR 20100033641A
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KR
South Korea
Prior art keywords
wafer
donor wafer
photodiode
bonding
layer
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Application number
KR1020080092604A
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Korean (ko)
Inventor
선종원
Original Assignee
주식회사 동부하이텍
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Priority to KR1020080092604A priority Critical patent/KR20100033641A/en
Publication of KR20100033641A publication Critical patent/KR20100033641A/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • H01L21/02032Preparing bulk and homogeneous wafers by reclaiming or re-processing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures

Abstract

PURPOSE: A method for wafer recycling of a semiconductor device is provided to repair a defect on the surface of wafer by applying a hydrogen annealing process after the wafer to wafer bonding. CONSTITUTION: A wiring and an interlayer dielectric layer are formed in a semiconductor substrate including a transistor. A donor wafer is prepared. The donor wafer is formed with crystal form silicon. A hydrogen layer is formed inside the donor wafer. A first photo diode is formed inside the donor wafer. The first photo diode and the donor wafer(300) are separated from a hydrogen layer. The first photo diode and the semiconductor substrate are bonded. In this case, the first photo diode and wiring are connected. An annealing process is applied to donor wafer separating.

Description

Method for Wafer Recycling of Semiconductor Devices

The embodiment relates to a wafer recycling method of a semiconductor device, and to a recycling method of an SOI wafer left after wafer bonding in an image sensor.

Recently, in order to reproduce a complex circuit configuration in semiconductor technology, not only a fine circuit manufacturing technology of a semiconductor process, but also a method of manufacturing a semiconductor device by stacking various semiconductor chips is being actively developed.

Among the semiconductor devices, an image sensor is a semiconductor device that converts an optical image into an electrical signal, and is mainly a charge coupled device (CCD) image sensor and a complementary metal oxide silicon (CMOS) image sensor (CIS). Separated by).

The CMOS image sensor is a structure in which a photo diode area for receiving a light signal and converting it into an electric signal and a transistor area for processing the electric signal are horizontally disposed.

Such a horizontal image sensor is limited in that the photodiode region and the transistor region are horizontally disposed on the semiconductor substrate to extend the light sensing portion (commonly referred to as "Fill Factor") under a limited area.

As an alternative to overcome this problem, the circuit area is formed on the silicon substrate by using wafer-to-wafer bonding, and the photodiode is formed on the circuit area. Hereinafter referred to as "three-dimensional image sensor"). The photodiode and the circuit area are connected through a metal line.

Wafer-to-wafer bonding forms photodiodes on donor wafers using silicon on injector (SOI) wafers. After removing the donor wafer in the remaining region except for the photodiode, the photodiode is bonded onto the silicon substrate.

On the other hand, donor wafers in the remaining regions except for the photodiode are separated by an annealing process and the like, so that they are not used again.

The embodiment provides a wafer recycling method of a semiconductor device capable of planarizing the surface of the donor wafer through a hydrogen heat treatment process for the donor wafer in the remaining regions except for the photodiode when manufacturing an image sensor formed by wafer-to-wafer bonding. do.

A wafer recycling method of a semiconductor device according to an embodiment includes forming a wiring and an interlayer insulating layer on a semiconductor substrate including a transistor; Preparing a donor wafer formed of crystalline silicon; Forming a hydrogen layer inside the donor wafer; Forming a first photodiode in the donor wafer corresponding to an upper region based on the hydrogen layer; Separating the first photodiode and the donor wafer based on the hydrogen layer; Bonding the first photodiode and the semiconductor substrate such that the first photodiode and the wiring are connected to each other; And annealing the separated donor wafer to planarize a surface of the donor wafer.

The wafer recycling method of the semiconductor device according to the embodiment may reduce the production cost by allowing the wafer to be reused by restoring the surface defect of the wafer damaged by the hydrogen annealing process on the cut wafer after wafer-to-wafer bonding. have.

A wafer recycling method of a semiconductor device according to an embodiment will be described in detail with reference to the accompanying drawings.

In the description of the embodiments, where described as being formed "on / over" of each layer, the on / over may be directly or through another layer ( indirectly) includes everything formed.

In the drawings, the thickness or size of each layer is exaggerated, omitted, or schematically illustrated for convenience and clarity of description. In addition, the size of each component does not necessarily reflect the actual size.

The semiconductor device of the embodiment is not limited to the CMOS image sensor, and can be applied to any image sensor requiring a photodiode such as a CCD image sensor.

It can also be applied to all semiconductor devices with wafer-to-wafer bonding as well as image sensors. For example, it is also applicable to wafer bonding used when vertically stacking several chips in a system in package technology.

A method of recycling a wafer of a semiconductor device according to an embodiment will be described in detail with reference to FIGS. 1 to 7. The semiconductor device according to the embodiment will be described using an image sensor formed by wafer-to-wafer bonding as an example.

Referring to FIG. 1, an interlayer insulating layer 160 and a wiring 150 are formed on a semiconductor substrate 100.

The semiconductor substrate 100 may be a single crystal silicon substrate, and may be a substrate doped with p-type impurities or n-type impurities.

Although not shown, an isolation layer (not shown) defining an active region and a field region may be formed in the semiconductor substrate 100. In addition, a circuit unit including a transfer transistor, a reset transistor, a drive transistor, a select transistor, and the like, which is connected to a photodiode to be described later and converts the received photocharge into an electrical signal, may be formed per unit pixel.

A plurality of wirings 150 and an interlayer insulating layer 160 are formed on the semiconductor substrate 100 to connect a power line or a signal line with a circuit.

The wiring 150 formed on the semiconductor substrate 100 may be formed for each pixel to connect the photodiode and the circuit, which will be described later, to transmit photocharge of the photodiode.

The wiring 150 includes metal wirings M1, M2, and M3 and contact plugs. The wiring 150 may be formed of various conductive materials including metals, alloys, or silicides. For example, the wiring 150 may be formed of aluminum, copper, cobalt, or tungsten. In an embodiment, a contact plug connected to the final metal wiring M3 may be exposed to the surface of the interlayer insulating layer 160.

In addition, a first bonding layer 170 for bonding with the photodiode is formed on the surface of the interlayer insulating layer 160. The first bonding layer 170 may be formed of an oxide film or a nitride film. Alternatively, the first bonding layer 170 may be formed by depositing N-doped amorphous silicon.

Referring to FIG. 2, a donor wafer 20 for forming a photodiode is prepared. The donor wafer 20 is a single crystal or polycrystalline silicon substrate and may be a substrate doped with p-type or n-type impurities. For example, the donor wafer 20 may have a thickness of 2.5 μm to 4.0 μm.

Next, a hydrogen layer 250 is formed in the donor wafer 20. The hydrogen layer 250 may be formed by ion implanting hydrogen ions in a predetermined region by the same project range with respect to the entire surface of the donor wafer 20. For example, the dose of the hydrogen layer 250 is 1 × 10 15 to 1 × 10 17 and may be injected with energy of 100 to 120 KeV. Therefore, the donor wafer 20 may be divided into an upper donor wafer 200 and a lower lower donor wafer 300 based on the hydrogen layer 250. A photodiode may be formed on the upper donor wafer 200 or the lower donor wafer 300.

Referring to FIG. 3, a first photodiode 210 is formed on the upper donor wafer 200 of the donor wafer 20 based on the hydrogen layer 250. The first photodiode 210 may include a p-type impurity region p + and a p-type impurity region formed in a deep region of the upper donor wafer 200 corresponding to the upper region 200 of the hydrogen layer 250. It may include an n-type impurity region (n-) formed in the donor wafer 20 to be in contact. The n-type impurity region (n−) and the p-type impurity region (p +) are formed by an ion implantation process so that the n-type impurity region (n-) has a wider region than the p-type impurity region (p +). Can be formed. For example, the first photodiode 210 may have a thickness of 0.8 ~ 1.2㎛.

Next, a second bonding layer 220 for bonding with the semiconductor substrate 100 is formed on the surface of the first photodiode 210. The second bonding layer 220 may be formed of the same material as the first bonding layer 170.

Meanwhile, in the embodiment, the first photodiode 210 is formed after the formation of the hydrogen layer 250, but the hydrogen layer 250 may be formed after the formation of the first photodiode 210.

Referring to FIG. 4, the upper donor wafer 200 and the lower donor wafer 300 on which the first photodiode 210 is formed are separated based on the hydrogen layer 250.

The upper and lower donor wafers 200 and 300 may be separated by performing a first annealing process on the hydrogen layer 250.

Specifically, the primary annealing process for the hydrogen layer 250 may be performed at 500 ~ 800 ℃. By the first annealing process, the hydrogen layer 250 is changed into a hydrogen gas layer, and the lower lower donor wafer 300 except for the first photodiode 210 is cut based on the hydrogen layer 250. It may be separated from the first photodiode 210.

The reason for cutting the lower donor wafer 300 before bonding to the semiconductor substrate 100 is to protect the wiring 150 and the elements formed on the semiconductor substrate 100. If the annealing process is performed to separate the lower donor wafer 300 after bonding the donor wafer 20 on which the semiconductor substrate 100 and the first photodiode 210 are formed, the heat treatment process may be performed at a high temperature. This is because the wiring 150 and the device are adversely affected.

Therefore, in the embodiment, the first annealing process for the hydrogen layer 250 is performed before wafer-to-wafer bonding to separate the upper donor wafer 200 and the lower donor wafer 300 on which the first photodiode 210 is formed. To protect the device.

Referring to FIG. 5, the donor wafer 20 and the semiconductor substrate 100 are bonded to each other so that the first photodiode 210 corresponds to the wiring 150. That is, the first photodiode 210 may be formed on the semiconductor substrate 100 by performing wafer-to-wafer bonding.

Specifically, the bonding process is performed after placing the n-type impurity region n− of the first photodiode 210 and the surface of the interlayer insulating layer 160 of the semiconductor substrate 100. In particular, the first photodiode 210 has a second bonding layer 220 and a first bonding layer 170 is formed on the surface of the interlayer insulating layer 160 to improve the bonding characteristics of the bonding process. You can. In addition, the first and second bonding layers 170 and 220 may buffer the bonding to prevent surface damage of the first photodiode 210.

After bonding the semiconductor substrate 100 and the upper donor wafer 200 on which the first photodiode 210 is formed, the wiring 150 and the first photodiode 210 may be electrically connected to each other.

Therefore, since the first photodiode 210 is formed on the semiconductor substrate 100, the image sensor may be vertically integrated to improve the fill factor. Although not shown, an additional upper wiring, color filter, and lens process may be performed.

Meanwhile, as shown in FIG. 4, the lower donor wafer 300 cut through the annealing process for the hydrogen layer 250 has a rough surface. That is, roughness is generated on the surface of the lower donor wafer 300, and the surface crystal direction is not uniform. If the lower donor wafer 300 has a rough surface, reuse of the lower donor wafer 300 may be performed by planarizing the rough surface of the lower donor wafer 300.

Referring to FIG. 6, a secondary annealing process is performed on the lower donor wafer 300. When the secondary annealing process is performed on the lower donor wafer 300, the surface of the lower donor wafer 300 may be planarized. In particular, the secondary annealing process may be performed in a hydrogen atmosphere.

For example, the secondary annealing process for the lower donor wafer 300 may be performed at a temperature of 800 ° C. to 1150 ° C. in a hydrogen atmosphere and may be performed for about 60 to 200 seconds.

As described above, when the heat treatment process is performed on the lower donor wafer 300 in a high temperature hydrogen atmosphere, the surface roughness of the lower donor wafer 300 may be improved. This is because when the lower donor wafer 300 is heat-treated by a high temperature hydrogen atmosphere, the silicon atoms are moved and the silicon crystal structure is rearranged to stably change the lattice structure. That is, since the silicon lattice structure of the lower donor wafer 300 is cured by the secondary annealing process at a high temperature, surface damage may be recovered.

Accordingly, since the surface roughness of the lower donor wafer 300 is improved and planarized, the lower donor wafer 300 may be reused.

For example, the lower donor wafer 300 cut after the bonding process of the first photodiode 210 has a thickness of about 1.7 to 2.8 μm, and thus may be sufficiently reused.

As described above, the second annealing process may be performed on the lower donor wafer 300 to planarize the surface of the lower donor wafer 300. As shown in FIG. 7, after forming the hydrogen layer 350 into the lower donor wafer 300, n-type (n−) and p-type (p +) impurities are injected into a portion of the second photodiode. Form 310.

Although not shown, an image sensor may be manufactured by bonding the lower donor wafer 300 including the second photodiode 310 to a semiconductor substrate (not shown) on which another circuit is formed.

As described above, the donor wafer may be reused by planarizing the surface by an annealing process on the donor wafer, thereby reducing the cost.

In addition, by separating the photodiode and the lower donor wafer prior to wafer to wafer bonding, it is possible to prevent the device from being damaged by a heat treatment process for separating the lower donor wafer.

The embodiments described above are not limited to the above-described embodiments and drawings, and it is common in the art that various embodiments may be substituted, modified, and changed without departing from the technical spirit of the present embodiment. It will be apparent to those who have knowledge.

1 to 7 are cross-sectional views illustrating a wafer recycling process of the semiconductor device according to the embodiment.

Claims (10)

Forming a wiring and an interlayer insulating layer on the semiconductor substrate including the transistor; Preparing a donor wafer formed of crystalline silicon; Forming a hydrogen layer inside the donor wafer; Forming a first photodiode in the donor wafer corresponding to an upper region based on the hydrogen layer; Separating the first photodiode and the donor wafer based on the hydrogen layer; Bonding the first photodiode and the semiconductor substrate such that the first photodiode and the wiring are connected to each other; And Performing an annealing process on the separated donor wafer to planarize a surface of the donor wafer. The method of claim 1, And forming a second photodiode on the donor wafer after the planarization process of the separated donor wafer. The method of claim 1, A first bonding layer is formed on the interlayer insulating layer, and a second bonding layer is formed on a surface of the first photodiode, so that the first bonding layer and the first bonding layer are bonded when the first photodiode and the semiconductor substrate are bonded. 2 A wafer recycling method for a semiconductor device, comprising bonding a bonding layer. The method of claim 1, Separating the first photodiode and the donor wafer, And performing a first annealing process on the hydrogen layer to cut donor wafers in the remaining regions except for the first photodiode. The method of claim 4, wherein The first annealing process is a wafer recycling method of a semiconductor device, characterized in that proceeds at 500 ~ 800 ℃. The method of claim 1, And planarizing the surface of the donor wafer is performed in a secondary annealing process in a hydrogen atmosphere. The method of claim 6, The secondary annealing process is a wafer recycling method of a semiconductor device, characterized in that the progress in the hydrogen atmosphere of 800 ~ 1150 ℃ temperature. The method of claim 2, Forming a second photodiode on the donor wafer and then bonding the donor wafer to another semiconductor substrate. The method of claim 2, The first and second photodiodes are a wafer recycling method of the semiconductor device, characterized in that formed in a thickness of 0.8 ~ 1.3㎛. The method of claim 3, And the first and second bonding layers are formed of an insulating film or amorphous silicon.
KR1020080092604A 2008-09-22 2008-09-22 Method for wafer recycling of semiconductor device KR20100033641A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111183513A (en) * 2019-04-19 2020-05-19 福建晶安光电有限公司 Method for manufacturing photoelectric semiconductor chip and bonding wafer used by same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111183513A (en) * 2019-04-19 2020-05-19 福建晶安光电有限公司 Method for manufacturing photoelectric semiconductor chip and bonding wafer used by same

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