KR20100011244A - Non volatile memory device with multi blocking layer and method for manufacturing the same - Google Patents

Abstract

PURPOSE: A nonvolatile memory device with a multi blocking layer and a method for manufacturing the same are provided to reduce a leakage current of a charge blocking layer by using a metal silicate and a high dielectric layer as a charge blocking layer. CONSTITUTION: A charge blocking layer prevents the movement of a charge stored in a charge trapping layer(102). The charge blocking layer comprises a first charge blocking layer(103A) consisting of a metal silicate and a second charge blocking layer(103B) which includes a second charge blocking layer that has a higher energy band gap than the first charge blocking layer. The first charge blocking layer is interposed between the charge trapping layer and the second charge blocking layer. The metal silicate is combined with the second charge blocking layer.

Description

Non-volatile memory device having a multi-layer charge blocking film and a method of manufacturing the same {NON VOLATILE MEMORY DEVICE WITH MULTI BLOCKING LAYER AND METHOD FOR MANUFACTURING THE SAME}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly, to a nonvolatile memory device and a method of manufacturing the same.

A nonvolatile memory device is classified into a floating type and a charge trap type according to the type of a charge storage layer. The floating type stores the charge in the form of free charge in the floating gate, and the charge trapping type stores the charge in a trap spatially isolated in the charge trap film.

Such nonvolatile memory devices include a charge blocking layer. The charge blocking film prevents electrons from escaping from the charge storage film. In other words, the charge blocking layer has a main role of data retention, and also determines one of program speed and erase speed.

The charge blocking layer of the floating nonvolatile memory device and the charge trapping nonvolatile memory device employs a high-k dielectric such as aluminum oxide (Al ₂ O ₃ ), which has a higher dielectric constant than ONO (Oxide Nitride Oxide). have.

However, high dielectric films such as aluminum oxide films (Al ₂ O ₃ ) used as charge blocking films have a small energy band gap and contain a large amount of trap sites present in the film. And deterioration of speed characteristic and data retention characteristic of the erase operation.

Disclosure of Invention The present invention has been made to solve the above-described problems of the prior art, and an object thereof is to provide a nonvolatile memory device and a method of manufacturing the same that can improve the speed of program and erase operations and improve data retention characteristics.

The present invention for achieving the above object is a non-volatile memory device including a charge blocking film to prevent the movement of the charge stored in the charge storage film, the charge blocking film is a first charge blocking film made of a metal silicate and the first charge blocking film And a second charge blocking film having a larger energy band gap, wherein the charge blocking film further includes a third charge blocking film formed on the second charge blocking film and having an energy band gap larger than that of the second charge blocking film. Characterized in that. The first charge blocking film is positioned between the charge storage film and the second charge blocking film, and the metal silicate is a silicate of a metal element mixed in the second charge blocking film, wherein the metal silicate is Al, It is characterized in that the silicate containing at least one selected from Hf, Zr or rare earth metal elements. The metal silicate is one selected from aluminum silicate, hafnium silicate, zirconium silicate, lanthanum silicate dysprosium silicate, scandium silicate, yttrium silicate, gadolinium silicate, neodymium silicate, cerium silicate or praseodymium silicate. The second charge blocking film is a metal oxide film including at least one selected from Al, Hf, Zr or rare earth metal elements, and the second charge blocking film is an aluminum oxide film, a hafnium oxide film, a zirconium oxide film, a lanthanum oxide film, It characterized in that it comprises at least one selected from dysprosium oxide film, scandium oxide film, yttrium oxide film, gadolinium oxide film, neodymium oxide film, cerium oxide film or praseodymium oxide film.

In addition, the method of manufacturing a nonvolatile memory device of the present invention includes the steps of: forming a tunneling film on the first conductive film; Forming a charge storage layer on the tunneling layer; Forming a dielectric film on the charge storage film; Oxidizing the surface of the charge storage layer through radical oxidation to form a metal silicate; And forming a second conductive film on the dielectric film, wherein the dielectric film comprises a dielectric film mixed with metal elements which serve as an oxidation catalyst during the radical oxidation. The silicate is a silicate in which the metal elements mixed in the dielectric film are mixed. The metal element is characterized in that it comprises at least one selected from Al, Hf, Zr or rare earth metal elements. The dielectric film may include at least one selected from aluminum oxide film, hafnium oxide film, zirconium oxide film, lanthanum oxide film, dysprosium oxide film, scandium oxide film, yttrium oxide film, gadolinium oxide film, neodymium oxide film, cerium oxide film or praseodymium oxide film. The metal silicate comprises any one selected from among aluminum silicate, hafnium silicate, zirconium silicate, lanthanum silicate dysprosium silicate, scandium silicate, yttrium silicate, gadolinium silicate neodymium silicate, cerium silicate or praseodymium silicate. The radical oxidation is characterized in that it proceeds using thermal radical oxidation or plasma radical oxidation.

According to the present invention as described above, since the blocking layer includes a metal silicate and a high dielectric film, the metal silicate having a larger energy band gap and a smaller trap density than the high dielectric film can sufficiently separate the high dielectric film and the charge storage film. It works.

In addition, the metal silicate is superior to the film by chemical vapor deposition (CVD) as a radical oxidation method for oxidizing and growing silicon in the charge storage film.

In addition, since the oxygen pores present in the high dielectric film during radical oxidation are healed by active oxygen, the trap density can be reduced. That is, it is possible to easily form metal silicates of excellent film quality and to improve the film properties of the high dielectric film.

As a result, the present invention has the effect of reducing the leakage current of the charge blocking film, improving the program and erase speed, and improving the data retention characteristics by using the metal silicate and the high dielectric film as the charge blocking film.

Hereinafter, the most preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement the technical idea of the present invention. .

The present invention is a nonvolatile memory device including a charge blocking film that prevents the movement of charge stored in a charge storage film. The high dielectric film is formed as a charge blocking film and subsequently oxidized through a radical oxidation method. Due to such radical oxidation, a part of the high dielectric film becomes a silicate to form a charge blocking film laminated in the order of the high dielectric film and the silicate.

Since the silicate has a large energy band gap and a small trap density, the high dielectric film containing a large amount of trap sites is separated from the charge storage film. In particular, since the silicate of the present invention is a method of oxidizing and growing silicon in a charge storage film, the silicate has superior characteristics to a film by conventional chemical vapor deposition (CVD). In addition, since oxygen vacancy present in the high dielectric film during radical oxidation is healed by active oxygen, there is an advantage of reducing the trap density. That is, it is possible to easily form a good film silicate and to improve the high dielectric film properties. This reduces the leakage current of the charge blocking film, improves the program and erase speeds, and improves the data retention characteristics.

1A is a diagram showing the structure of a nonvolatile memory device according to the first embodiment of the present invention.

Referring to FIG. 1A, a tunneling film 101 is formed on the first conductive film 100. The charge storage film 102 is formed on the tunneling film 101, and the charge blocking film 103 is formed on the charge storage film 102. The second conductive film 104 is formed on the charge blocking film 103.

The first conductive film 100 may include a silicon substrate, and the silicon substrate may be doped with an impurity of a P-type conductivity or an N-type conductivity. Preferably, P-type conductive impurities such as boron may be doped. In addition, the first conductive layer 100 may include a source region and a drain region formed at both sides of the channel region and the channel region.

The second conductive film 104 includes a polysilicon film, or a two-layer structure in which a polysilicon film and a metal film are stacked or a first metal film 104A, a polysilicon film 104B, and a second metal film 104C are stacked. It can include a three-layer structure. The polysilicon film used as the first conductive film 104 becomes a control gate. Hereinafter, the three-layer structure will be described in the Examples.

In the second conductive film 104 having a three-layer structure, the first metal film 104A may include a metal film having a high work function of more than a mid gap. In the metal film, the work function means an energy difference between a Fermi level and a vacuum level. The high work function above the middle gap means a work function above the middle gap of silicon, and the middle gap means an energy level between the valence band (Ev) and the conduction band (Ec). Therefore, the high work function above the middle gap may have a range larger than 4.0 eV and smaller than 5.3 eV. The metal film having a high work function in this range may include at least one selected from Pt, Ru, TiN, WN, TaN, Ir, Mo, Co, Ni, NiSi, NiPtSi, NiCSi, or CoSi. As such, the first metal film 104A having the high work function is in contact with the charge blocking film 103 to improve the leakage current characteristic of the charge blocking film 103. In the three-layer structure, the polysilicon film 104B is used as a control gate, and the second metal film 104C includes a tungsten film as a low resistive metal for lowering the resistance of the control gate. can do. Although not shown, a hard mask insulating film may be provided on the second conductive film 104.

The tunneling film 101 includes a material having a larger energy band gap than the first conductive film 100 and the charge storage film 102. Preferably, the tunneling film 101 may include an oxide film or an oxide film containing nitrogen, for example, a silicon oxide film (SiO ₂ ) or a silicon oxynitride film (SiON). As such, when the energy band gap of the tunneling film 101 is large, the charge stored in the charge storage film 102 cannot be easily moved.

The charge storage layer 102 is a film having a function of trapping electrons or holes injected through the tunneling layer 101 and is also referred to as a charge trap layer or a charge accumulation layer. The charge storage layer 102 may include a material in which nitrogen is mixed to have a high trap site density. For example, the charge storage layer 102 may include a silicon nitride layer (Si ₃ N ₄ ). In addition, the charge storage layer 102 may include a polysilicon layer. As such, when the charge storage film 102 is a silicon nitride film (Si ₃ N ₄ ), it becomes a charge trapping nonvolatile memory device. When the charge storage film 102 is a polysilicon film, a floating type nonvolatile memory device is used. Becomes

The blocking layer 103 provided between the charge storage layer 102 and the second conductive layer 104 has a second shape in a process in which electrons passing through the tunneling layer 101 are trapped in the charge storage layer 102. It serves as an insulating film that blocks the movement to the conductive film 104. The charge blocking film 103 preferably includes a high dielectric film having a high dielectric constant (High-k) so as to lower the equivalent oxide film thickness (EOT) while blocking charge transfer. However, since the high dielectric film has a low energy band gap and a large amount of trap sites, the loss of charge in the charge storage film 102 is inevitable when the charge blocking film 103 is in direct contact with the charge storage film 102. That is, the charge of the charge storage film 102 is easily transferred to the high dielectric film due to the low energy band gap of the high dielectric film, so that the charge is trapped in a large amount of trap sites in the high dielectric film, Charge loss occurs.

In order to prevent the charge loss of the charge storage layer 102, the charge blocking layer 103 includes a first charge blocking layer 103A in contact with the charge storage layer 102. Accordingly, the charge blocking film 103 includes a first charge blocking film 103A which contacts the charge storage film 102 to form an interface, and a second charge blocking film 103B formed of a high dielectric film. The second charge blocking film 103B is in contact with the second conductive film 104.

The first charge blocking film 103A is formed of a dielectric film having an energy band gap (Eg) larger than the second charge blocking film 103B so that charges in the charge storage film 102 do not easily move. As described above, the first charge blocking film 103A having a large energy band gap has a low dielectric constant due to the large energy band gap, and thus the number of trap sites is smaller than that of the second charge blocking film 103B, which is a high dielectric film. The first charge blocking film 103A has a lower dielectric constant than the second charge blocking film 103B.

When the first charge blocking film 103A has a large energy band gap, a band offset formed at an interface with the charge storage film 102 is large. The band offset refers to the energy difference between conduction bands (Ec) of two materials in contact on the energy band diagram.

Preferably, the first charge blocking film 103A is a material having a band offset larger than the band offset formed by the contact between the second charge blocking film 103B and the charge storage film 102. If the band offset is large, the potential barrier through which charge in the charge storage layer 102 can move becomes high, and thus the charge transfer is suppressed.

In addition, when the first charge blocking film 103A has a low dielectric constant, the probability that charges are trapped decreases because the number of trap sites is small. That is, the first charge blocking film 103A has a lower trap density than the second charge blocking film 103B and a lower trap density than the charge storage film 102.

When the second charge blocking film 103B includes a high dielectric film, the first charge blocking film 103A may include a dielectric film having a larger energy band gap than the high dielectric film.

Preferably, the high dielectric film used as the second charge blocking film 103B includes a metal oxide film containing at least one metal element selected from Al, Hf, Zr or a rare earth metal element. For example, the high-k dielectric film includes an aluminum oxide film (Al _x O _y ), a hafnium oxide film (Hf _x O _y ), a zirconium oxide film (Zr _x O _y ), a lanthanum oxide film (La _x O _y ), and a dysprosium oxide film (Dy _x O _y ), scandium oxide (Sc _x O _y ), yttrium oxide (Y _x O _y ), gadolinium oxide (Gd _x O _y ), neodymium oxide (Nd _x O _y ), cerium oxide (Ce _x O _y ) or praseodymium oxide At least one selected from (Pr _x O _y ). Here, "at least one" includes a single layer, two layers, three layers, or a mixed film in which two or more high dielectric films are mixed. The high dielectric films as described above have an energy band gap of about 4 to 8 eV.

Preferably, the first charge blocking layer 103A may include silicate, more preferably metal silicate. Metal silicate is a material having a large energy band gap of about 9 eV. As such, the first charge blocking film 103A having a large energy band gap has a high band offset at the interface with the charge storage film 102, and thus, charges in the charge storage film 102 do not easily move.

The metal silicate used as the first charge blocking film 103A includes an aluminum oxide film (Al _x O _y ), a hafnium oxide film (Hf _x O _y ), a zirconium oxide film (Zr _x O _y ), a lanthanum oxide film (La _x O _y ), Dysprosium Oxide (Dy _x O _y ), Scandium Oxide (Sc _x O _y ), Yttrium Oxide (Y _x O _y ), Gadolinium Oxide (Gd _x O _y ), Neodymium Oxide (Nd _x O _y ), Cerium Oxide (Ce _x O _y ) or a praseodymium oxide layer (Pr _x O _y ) may include a silicate (Silicate) mixed with silicon. For example, the metal silicate may be aluminum silicate (Al _x Si _y O _z ), hafnium silicate (Hf _x Si _y O _z ), zirconium silicate (Zr _x Si _y O _z ), lanthanum silicate (La _x Si _y O _z) ), Dysprosium silicate (Dy _x Si _y O _z ), scandium silicate (Sc _x Si _y O _z ), yttrium silicate (Y _x Si _y O _z ), gadolinium silicate (Gd _x Si _y O _z ), neodymium silicate (Nd _x Si _y O _z ), cerium silicate (Ce _x Si _y O _z ) or praseodymium silicate (Pr _x Si _y O _z ).

As described above, it can be seen that the first charge blocking film 103A includes the metal element of the high dielectric film used as the second charge blocking film 103B. That is, the first charge blocking film 103A is a silicate of metal elements (Al, Hf, Zr or rare earth metal elements) mixed in the high dielectric film. As will be described later in the manufacturing method, this is because the first charge blocking film is formed by the radical oxidation process in the state where the high dielectric film is formed. The first charge blocking film 103A is formed by oxidizing silicon in the charge storage film 102, and at this time, the metal elements of the high dielectric film are mixed to form a metal silicate.

The first charge blocking film 103A is thinner than the second charge blocking film 103B and the charge storage film 102. The thickness of the first charge blocking film 103A is 20 to 50 GPa, the thickness of the second charge blocking film 103B is 100 to 300 GPa, and the thickness of the charge storage film 102 is 50 to 300 GPa.

FIG. 1B is a diagram comparing an energy band diagram between a conventional MANOS structure and a charge storage layer and a charge blocking layer according to a first embodiment of the present invention. In FIG. 1B, the MANOS structure has a charge storage film of silicon nitride film (Si ₃ N ₄ ) and a charge blocking film of aluminum oxide film (Al ₂ O ₃ ). In the first embodiment of the present invention, the charge storage layer 102 uses a silicon nitride layer (Si ₃ N ₄ ), the first charge blocking layer 103A uses aluminum silicate (AlSiO), and the second charge blocking layer 103B. ) Uses an aluminum oxide film (Al ₂ O ₃ ). Aluminum silicate (AlSiO) is a mixture of the materials of silicon (Si) to an aluminum oxide film (Al ₂ O _3), the energy band gap greater than that of aluminum oxide (Al ₂ O ₃₎ as a mixture of silicon (Si). Since the energy band gap of the aluminum oxide film (Al ₂ O ₃ ) is 8.7 eV, the energy band gap of the aluminum silicate has a value greater than at least 8.7 eV. The energy band gap of the silicon nitride film (Si ₃ N ₄ ) is 5.3 eV. The energy band gap of each material is the difference in energy levels between the conduction band Ec and the valence band Ev. The energy bandgap of each material will be described as an approximate value because some of the values vary depending on various process conditions.

Referring to FIG. 1B, when the charge storage layer is in contact with the charge blocking layer, a potential barrier is formed according to an energy band gap difference of each material. The band offset between conduction bands between silicon nitride film and aluminum silicate (BO1) is larger than the band offset between conduction bands of silicon nitride film and aluminum oxide film (BO).

After all, according to the first embodiment, unlike the conventional MANOS structure, even if the electron (e) stored in the silicon nitride film, which is a charge storage film, is energized by heat or other surrounding environment, it does not exceed the high band offset (③). The data holding characteristic of the volatile memory device is improved. Since the band offset between the conduction bands of the silicon nitride film and the aluminum oxide film is low in the conventional MANOS structure, it can be seen that electrons e stored in the silicon nitride film jump over the aluminum oxide film (①).

In addition, in the conventional MANOS structure, electrons e moved to the conduction band Ec of the silicon nitride film flow out through a large amount of traps T present in the aluminum oxide film (2). On the other hand, since aluminum silicate has a low trap site density, the probability that electrons e moved to the conduction band Ec of the silicon nitride film flows into the aluminum silicate is reduced (4).

2A is a diagram showing the structure of a nonvolatile memory device according to the second embodiment of the present invention.

Referring to FIG. 2A, a tunneling film 201 is formed on the first conductive film 200. The charge storage layer 202 is formed on the tunneling layer 201, and the charge blocking layer 203 is formed on the charge storage layer 202. The second conductive film 204 is formed on the charge blocking film 203.

The first conductive film 200 may include a silicon substrate, and the silicon substrate may be doped with an impurity of a P-type conductivity or an N-type conductivity. Preferably, P-type conductive impurities such as boron may be doped. In addition, the first conductive layer 200 may include a source region and a drain region formed on both sides of the channel region and the channel region.

The second conductive film 204 includes a polysilicon film, or a structure in which a polysilicon film and a metal film are stacked or a stack in which a first metal film 204A, a polysilicon film 204B, and a second metal film 204C are stacked. May comprise a sieve. In the stack, the first metal film 204A may include a metal film having a high work function of at least a mid gap. In the metal film, the work function means an energy difference between a Fermi level and a vacuum level. The high work function above the middle gap means a work function above the middle gap of silicon, and the middle gap means the energy level between the valence band and the conduction band. Therefore, the high work function above the middle gap may have a range larger than 4.0 eV and smaller than 5.3 eV. The metal film having a high work function in this range may include at least one selected from Pt, Ru, TiN, WN, TaN, Ir, Mo, Co, Ni, NiSi, NiPtSi, NiCSi, or CoSi. As such, the first metal film 204A having the high work function is in contact with the charge blocking film 203 to improve the leakage current characteristic of the charge blocking film 203. In the laminate, the polysilicon film 204B is used as a control gate, and the second metal film 204C may include a tungsten film as a low resistive metal for lowering the resistance of the control gate. Can be. Although not shown, a hard mask insulating film may be provided on the second conductive film 204.

The tunneling film 201 includes a material having a larger energy band gap than the first conductive film 200 and the charge storage film 202. Preferably, the tunneling film 201 may include an oxide film or an oxide film mixed with nitrogen. For example, the tunneling film 201 may include a silicon oxide film (SiO ₂ ) or a silicon oxynitride film (SiON). As such, when the energy band gap of the tunneling film 201 is large, the charge stored in the charge storage film 202 may not be easily moved toward the tunneling film 201.

The charge storage layer 202 is an insulating layer having a function of trapping electrons or holes injected through the tunneling layer 201 and is also called a charge trap layer or a charge accumulation layer. The charge storage layer 202 may include a material in which nitrogen is mixed to have a high trap site density. For example, the charge storage layer 202 may include a silicon nitride layer (Si ₃ N ₄ ). In addition, the charge storage layer 202 includes a polysilicon layer. In this manner, when the charge storage film 202 is a silicon nitride film, it becomes a charge trapping nonvolatile memory device, and when the charge storage film 202 is a polysilicon film, it becomes a floating nonvolatile memory device.

The blocking layer 203 provided between the charge storage layer 202 and the second conductive layer 204 may have a second charge in a process in which charges passing through the tunneling layer 201 are trapped in the charge storage layer 202. It serves as an insulating film that blocks the movement to the conductive film 204. The charge blocking film 203 preferably includes a high dielectric film having a high dielectric constant (High-k) so as to lower the equivalent oxide film thickness (EOT) while blocking charge transfer. However, since the high dielectric film has a low energy band gap and a large amount of trap sites exist, loss of charge in the charge storage film 202 is inevitable when the high dielectric film is in direct contact with the charge storage film 202. That is, the charge of the charge storage film 202 is easily transferred to the high dielectric film due to the low energy band gap of the high dielectric film, so that the charge is trapped in a large amount of trap sites in the high dielectric film, thereby Charge loss occurs.

In order to prevent the charge loss of the charge storage layer 202, the charge blocking layer 203 includes a first charge blocking layer 203A in contact with the charge storage layer 202. Accordingly, the charge blocking film 203 includes a first charge blocking film 203A which is in contact with the charge storage film 202 and forms an interface, and a second charge blocking film 203B formed of a high dielectric film. In addition, the charge blocking film 203 further includes a third charge blocking film 203C for improving the charge blocking property at the portion in contact with the second conductive film 204.

The first charge blocking film 203A is formed of a dielectric film having an energy band gap (Eg) larger than that of the second charge blocking film 203B so that charges in the charge storage film 202 cannot easily move. As described above, the first charge blocking film 203A having a large energy band gap has a low permittivity due to the large energy band gap, and therefore, the number of trap sites is smaller than that of the second charge blocking film 203B, which is a high dielectric film.

When the first charge blocking film 203A has a large energy band gap, a band offset formed at an interface with the charge storage film 202 is large. The band offset refers to the energy difference between the conduction bands of two materials in contact on the energy band diagram.

Preferably, the first charge blocking film 203A is a material having a band offset larger than a band offset formed by contact between the second charge blocking film 203B and the charge storage film 202. If the band offset is large, the potential barrier through which charge in the charge storage layer 202 can move becomes high, and thus the charge transfer is suppressed.

In addition, when the first charge blocking film 203A has a low dielectric constant, the probability that charges are trapped decreases because the number of trap sites is small. That is, the first charge blocking film 203A has a lower trapsite density than the second charge blocking film 203B and a lower trapsite density than the charge storage film 202.

When the second charge blocking film 203B includes a high dielectric film, the first charge blocking film 203A may include a dielectric film having a larger energy band gap than the high dielectric film.

Preferably, the high dielectric film used as the second charge blocking film 203B includes a metal oxide film containing at least one metal element selected from Al, Hf, Zr or a rare earth metal element. For example, the high-k dielectric film includes an aluminum oxide film (Al _x O _y ), a hafnium oxide film (Hf _x O _y ), a zirconium oxide film (Zr _x O _y ), a lanthanum oxide film (La _x O _y ), and a dysprosium oxide film (Dy _x O _y ), scandium oxide (Sc _x O _y ), yttrium oxide (Y _x O _y ), gadolinium oxide (Gd _x O _y ), neodymium oxide (Nd _x O _y ), cerium oxide (Ce _x O _y ) or praseodymium oxide At least one selected from (Pr _x O _y ). Here, "at least one" includes a single layer, two layers, three layers, or a mixed film in which two or more high dielectric films are mixed. The high dielectric films as described above have an energy band gap of about 4 to 8 eV.

Preferably, the first charge blocking film 203A may include silicate, more preferably metal silicate. Metal silicate is a material having a large energy band gap of about 9 eV. As such, the first charge blocking film 203A having a large energy band gap has a high band offset at the interface with the charge storage film 202, and thus the charge in the charge storage film 202 may not easily move.

The metal silicate used as the first charge blocking film 203A includes an aluminum oxide film (Al _x O _y ), a hafnium oxide film (Hf _x O _y ), a zirconium oxide film (Zr _x O _y ), a lanthanum oxide film (La _x O _y ), Dysprosium Oxide (Dy _x O _y ), Scandium Oxide (Sc _x O _y ), Yttrium Oxide (Y _x O _y ), Gadolinium Oxide (Gd _x O _y ), Neodymium Oxide (Nd _x O _y ), Cerium Oxide (Ce _x O _y ) or a praseodymium oxide layer (Pr _x O _y ) may include a silicate (Silicate) mixed with silicon. For example, the metal silicate may be aluminum silicate (Al _x Si _y O _z ), hafnium silicate (Hf _x Si _y O _z ), zirconium silicate (Zr _x Si _y O _z ), lanthanum silicate (La _x Si _y O _z) ), Dysprosium silicate (Dy _x Si _y O _z ), scandium silicate (Sc _x Si _y O _z ), yttrium silicate (Y _x Si _y O _z ), gadolinium silicate (Gd _x Si _y O _z ), neodymium silicate (Nd _x Si _y O _z ), cerium silicate (Ce _x Si _y O _z ) or praseodymium silicate (Pr _x Si _y O _z ).

As described above, it can be seen that the first charge blocking film 203A includes the metal element of the high dielectric film used as the second charge blocking film 203B. That is, the first charge blocking film 203A is a silicate of metal elements (Al, Hf, Zr or rare earth metal elements) mixed in the high dielectric film. As will be described later in the manufacturing method, this is because the first charge blocking film is formed by the radical oxidation process in the state where the high dielectric film is formed. The first charge blocking film 203A is formed by oxidizing silicon in the charge storage film 202. At this time, the metal elements of the high dielectric film are mixed to form a metal silicate.

The third charge blocking film 203C includes a dielectric film having a lower dielectric constant but a larger energy band gap than the second charge blocking film 203B. As the third charge blocking film 203C has a large energy band gap, charge loss can be further suppressed. For example, even if some charges are transferred to the first and second charge blocking films 203A and 203B, since the third charge blocking film 203C has a larger energy band gap than the second charge blocking film 203B, the second charge blocking film 203B. Charges do not move from the third charge blocking layer 203C to the third charge blocking layer 203C.

Preferably, the third charge blocking film 203C may have the same energy band gap as or larger than the first charge blocking film 203A. The third charge blocking layer 203C may include a metal oxide layer, for example, an aluminum oxide layer (Al ₂ O ₃ ). The aluminum oxide film has a very large energy band gap of about 8.7 eV. In the case where the third charge blocking film 203C includes an aluminum oxide film, the second charge blocking film 203C may be formed of an aluminum oxide film to give an energy band gap difference between the second charge blocking film 203B and the third charge blocking film 203C. May be excluded.

As described above, in the second embodiment, it can be seen that the charge blocking film 203 is a stacked structure of dielectric films having different energy band gaps. The energy band gap of the first charge blocking film 203A in contact with the charge storage film 202 and the third charge blocking film 203C in contact with the second conductive film 204 is the energy band gap of the second charge blocking film 203B. Since it is larger, the charge blocking effect is further increased than in the first embodiment.

FIG. 2B is a diagram comparing an energy band diagram between a conventional MANOS structure and a charge storage layer and a charge blocking layer according to a second embodiment of the present invention. In FIG. 2B, the MANOS structure has a charge storage film of silicon nitride film (Si ₃ N ₄ ) and a charge blocking film of aluminum oxide film (Al ₂ O ₃ ). The charge storage layer according to the second embodiment of the present invention uses a silicon nitride film (Si ₃ N ₄ ), the first charge blocking film is used zirconium silicate (ZrSiO), the second charge blocking film is a zirconium oxide film, 3 is a case where Al ₂ O ₃ is used. Zirconium silicate is a material in which silicon is mixed with a zirconium oxide film, and as the silicon is mixed, the energy band gap is higher than that of the zirconium oxide film. The energy band gap of Al ₂ O ₃ is 8.7 eV, the energy band gap of the zirconium oxide film is 7.8 eV, the energy band gap of the silicon nitride film (Si ₃ N ₄ ) is 5.3 eV, and the energy band gap of zirconium silicate (ZrSiO). Is larger than 7.8 eV. The energy band gap of each material is the difference in energy levels between the conduction band Ec and the valence band Ev.

Referring to FIG. 2B, when the charge storage layer is in contact with the charge blocking layer, a potential barrier is formed according to an energy band gap difference of each material. The conduction band offset BO2 between the silicon nitride film and the zirconium silicate is larger than the conduction band offset BO between the silicon nitride film and the aluminum oxide film.

Therefore, even if the electron (e) stored in the silicon nitride film, which is a charge storage film, does not exceed the high band offset (BO2) even if it is energized by heat or other surrounding environment (⑤), the data retention characteristic of the nonvolatile memory device is improved. do.

In the conventional MANOS structure, since the band offset (BO) between the conduction bands of the silicon nitride film and the aluminum oxide film is low, it can be seen that electrons e stored in the silicon nitride film jump over the aluminum oxide film (①).

In addition, since the zirconium silicate has a low trap site density, the probability that electrons e moved to the conduction band Ec of the silicon nitride film flows into the silicon oxide film is reduced (6).

According to the second embodiment of the present invention, even if electrons are trapped in the zirconium oxide film, which is the second charge blocking film, a band offset (BO3) between the zirconium oxide film and the aluminum oxide film exists, so that the trapped charge moves beyond the band offset from the trap level. (⑦) Therefore, since the charge blocking film includes the third charge blocking film, the loss of charge can be further minimized.

3A through 3E are cross-sectional views illustrating a method of manufacturing a nonvolatile memory device in accordance with a third embodiment of the present invention.

As shown in FIG. 3A, a tunneling layer 43 having a predetermined thickness is formed on the device isolation layer 42 and the semiconductor substrate 41 on which the ion implantation process is performed. The device isolation layer 42 is formed through a shallow trench isolation (STI) process, and the ion implantation process includes an ion implantation process for adjusting the threshold voltage. Although the surface of the device isolation layer 42 is shown higher than the semiconductor substrate 41 in the drawing, the height difference may be adjusted according to the process conditions. That is, the surfaces of the semiconductor substrate 41 and the device isolation film 42 may be formed in the same manner. The tunneling film 43 may include an oxide film or an oxide film including nitrogen. Preferably, the tunneling film 43 includes a pure silicon oxide film (pure SiO ₂ ) or a silicon oxynitride film (SiON).

Subsequently, the charge storage layer 44 is formed. The charge storage layer 44 includes a silicon nitride layer (Si ₃ N ₄ ) or a polysilicon layer. The charge storage film 44 is 50 to 200 microns thick.

After the charge storage film 44 is formed as described above, a charge blocking film is formed to block current flow due to charge transfer between the charge storage film 44 and the subsequent conductive film.

As shown in FIG. 3B, a high dielectric film 45 is formed on the charge storage film 44.

The high dielectric film 45 includes a metal oxide film containing at least one kind of metal element selected from Al, Hf, Zr, and rare earth metal elements. For example, the high-k dielectric film 45 may include an aluminum oxide film (Al _x O _y ), a hafnium oxide film (Hf _x O _y ), a zirconium oxide film (Zr _x O _y ), a lanthanum oxide film (La _x O _y ), and a dysprosium oxide film. (Dy _x O _y ), scandium oxide (Sc _x O _y ), yttrium oxide (Y _x O _y ), gadolinium oxide (Gd _x O _y ), neodymium oxide (Nd _x O _y ), cerium oxide (Ce _x O _y) ) Or praseodymium oxide film (Pr _x O _y ). Here, "at least one" includes a single layer, two layers, three layers, or a mixed film in which two or more high dielectric films are mixed. The high dielectric film 45 as described above has an energy band gap of about 4 to 8 eV.

The high dielectric film 45 is formed to have a thickness of 30 to 300 GPa using atomic layer deposition (ALD), chemical vapor deposition (CVD), or catalytic chemical vapor deposition (Catalytic CVD).

As described above, the high-k dielectric film 45 includes at least one metal element selected from Al, Hf, Zr, and rare earth metal elements in the film, and these metal elements accelerate oxidation by subsequent radical oxidation. It also serves as a catalyst that can oxidize the silicon of the charge storage film in time.

As illustrated in FIG. 3C, the surface of the charge storage layer 44 is oxidized through radical oxidation to form a metal silicate 46. In the radical oxidation process, the metal element 46 in the high dielectric film 45, in particular, the metal element in the high dielectric film 45 acts as an oxidation catalyst to form the metal silicate 46 in a short time.

Since the charge storage film 44 is a material containing silicon, the silicon of the charge storage film 44 is oxidized by the radical oxidation process to form the metal silicate 46. Preferably, the metal silicate 46 may be viewed as a partially mixed metal silicate in which metal elements of the high dielectric film 45 are diffused. For example, the metal silicate 46 may include aluminum silicate (Al _x Si _y O _z ), hafnium silicate (Hf _x Si _y O _z ), zirconium silicate (Zr _x Si _y O _z ), and lanthanum silicate (La _x Si _y O _z ). _y O _z ), dysprosium silicate (Dy _x Si _y O _z ), scandium silicate (Sc _x Si _y O _z ), yttrium silicate (Y _x Si _y O _z ), gadolinium silicate (Gd _x Si _y O _z ), neodymium Silicate (Nd _x Si _y O _z ), cerium silicate (Ce _x Si _y O _z ) or praseodymium silicate (Pr _x Si _y O _z ), any one selected from.

The radical oxidation proceeds to thermal radical oxidation or plasma radical oxidation.

The thermal radical oxidation process is performed using active oxygen radicals that are thermally dissociated in a furnace maintained at a high temperature of 600 ° C. or higher. The thermal radical oxidation process is performed by simultaneously injecting hydrogen-containing gas (H ₂ , D ₂ ) and oxygen gas (O ₂ ) gas into a heat treatment furnace at a temperature of 600 to 1200 ° C. and a pressure range of 1 mTorr to 100 Torr. 'D ₂ ' means deuterium. As described above, the active oxygen radicals are activated by simultaneously injecting the hydrogen-containing gas and the oxygen gas, and the active oxygen radicals oxidize the surface of the charge storage film 44.

The plasma radical oxidation process is a radical oxidation process using active oxygen radicals contained in the plasma. Since the plasma radical oxidation process uses plasma dissociated active oxygen radicals, the plasma radical oxidation process may be performed at a low temperature as compared with a thermal radical oxidation process using thermal dissociated active oxygen radicals.

The plasma radical oxidation process may be performed using oxygen gas alone or oxygen (O ₂ ) gas as a base, and at least one selected from argon (Ar), hydrogen (H ₂ ), or helium (He) as the oxygen gas. Proceed to mixed gas mixture. For example, the plasma radical oxidation process includes a mixed gas of argon, hydrogen, and oxygen (Ar / H ₂ / O ₂ ), a mixed gas of argon and oxygen (Ar / O ₂ ), a mixed gas of helium, hydrogen, and oxygen (He / H ₂ / O ₂ ), a mixed gas of helium and oxygen (He / O ₂ ), a mixed gas of hydrogen and oxygen (H ₂ / O ₂ ), or a mixed gas of at least two of these mixed gases You can also use The flow rate of the oxygen gas or the mixed gases is 5 to 2000 sccm.

Microwave or RF (Radio Frequency) is used as the plasma source, and plasma power is 100 to 3000W. The plasma treatment time is 5 to 600 seconds, and the substrate temperature is 0 to 600 ° C.

As described above, since the metal silicate 46 formed by the radical oxidation method is promoted by the metal element contained in the high-k dielectric film 45, the metal silicate 46 can be grown to a sufficient thickness even if the oxidation proceeds for a short time. . In the case of applying the thermal radical oxidation method, damage to the charge storage layer 44 is less because it can be grown even after only a short time. Plasma radical oxidation can be grown to a sufficient thickness even at low temperatures for a short time. The metal silicate 45 is a material having a larger energy band gap than the high dielectric film 46.

The charge blocking film is formed by the series of steps described above. The charge blocking film includes a metal silicate 46 and a high dielectric film 45. The metal silicate 46 is a film which forms an interface with the charge storage film 44, and the high dielectric film 45 is a film which forms an interface with a subsequent conductive film. The high dielectric film 45 and the charge storage film 44 can be separated by the metal silicate 46 while obtaining the charge blocking effect by the high dielectric film 45.

The metal silicate 46 according to the third embodiment is formed by radical oxidation, not formed by a deposition method such as chemical vapor deposition (CVD), and thus has excellent film characteristics. In addition, since oxygen vacancies present in the high-k dielectric layer 45 during the radical oxidation process are cured by active oxygen radicals, the trap density is further reduced.

As a result, the use of radical oxidation makes it possible to easily form the metal silicate 46 of excellent film quality, and to improve the film characteristics of the high dielectric film 45. This reduces the leakage current of the charge blocking film, improves the program and erase speeds, and improves data retention characteristics.

As shown in FIG. 3D, the first metal film 47, the polysilicon film 48, and the second metal film 49 are stacked on the high dielectric film 45. The first metal film 47 is a metal film having a high work function as a material for suppressing leakage current of the high dielectric film 45. The first metal film 47 is a material having a work function of at least a mid-gap and is selected from Pt, Ru, TiN, WN, TaN, Ir, Mo, Co, Ni, NiSi, NiPtSi, NiCSi, or CoSi. It includes at least one. The thickness of the first metal film 47 is 50 to 200 kPa. The polysilicon film 48 is used as a control gate. The second metal film 49 is a low resistive metal for lowering the resistance of the control gate and may include a tungsten film. A barrier metal film may be inserted to prevent mutual diffusion between the polysilicon film 48 and the second metal film 49.

The hard mask insulating layer 50 is formed on the second metal layer 49. The hard mask insulating layer 50 may be a material used as an etch barrier in a subsequent etching process, and may include a nitride layer.

As shown in FIG. 3E, the hard mask insulating film 50, the second metal film 49, the polysilicon film 48, the first metal film 47, the high dielectric film 45, the metal silicate 46 And the charge storage layer 44 are sequentially etched.

The structure formed as described above is a charge trapping nonvolatile memory device when the charge storage film 44 is a silicon nitride film, and a floating nonvolatile memory device when the charge storage film 44 is a polysilicon film.

4A through 4F are cross-sectional views illustrating a method of manufacturing a nonvolatile memory device in accordance with a fourth embodiment of the present invention.

As shown in FIG. 4A, a tunneling film 53 having a predetermined thickness is formed on the device isolation film 52 and the semiconductor substrate 51 on which the ion implantation process is performed. The device isolation layer 52 is formed through a shallow trench isolation (STI) process, and the ion implantation process includes an ion implantation process for adjusting the threshold voltage. Although the surface of the device isolation layer 52 is shown higher than the semiconductor substrate 51 in the drawing, the height difference may be adjusted according to the process conditions. That is, the surfaces of the semiconductor substrate 51 and the device isolation film 52 may be formed in the same manner. The tunneling film 53 may include an oxide film or an oxide film including nitrogen. Preferably, the tunneling film 53 includes a pure silicon oxide film (pure SiO ₂ ) or a silicon oxynitride film (SiON).

Subsequently, the charge storage layer 54 is formed. The charge storage layer 54 includes a silicon nitride layer Si ₃ N ₄ . The charge storage film 54 is 50 to 200 micrometers thick.

After the charge storage film 54 is formed as described above, a charge blocking film is formed to block current flow due to charge transfer between the charge storage film 54 and the subsequent conductive film.

As shown in FIG. 4B, a high dielectric film 55 is formed on the charge storage film 54.

The high dielectric film 55 includes a metal oxide film containing at least one metal element selected from Al, Hf, Zr or rare earth metal elements. For example, the high dielectric film 55 includes an aluminum oxide film (Al _x O _y ), a hafnium oxide film (Hf _x O _y ), a zirconium oxide film (Zr _x O _y ), a lanthanum oxide film (La _x O _y ), and a dysprosium oxide film. (Dy _x O _y ), scandium oxide (Sc _x O _y ), yttrium oxide (Y _x O _y ), gadolinium oxide (Gd _x O _y ), neodymium oxide (Nd _x O _y ), cerium oxide (Ce _x O _y) ) Or praseodymium oxide film (Pr _x O _y ). Here, "at least one" includes a single layer, two layers, three layers, or a mixed film in which two or more high dielectric films are mixed. The high dielectric film 55 as described above has an energy band gap of about 4 to 8 eV.

The high dielectric film 55 is formed to have a thickness of 30 to 300 占 퐉 using atomic layer deposition (ALD), chemical vapor deposition (CVD), or catalytic chemical vapor deposition (Catalytic CVD).

As described above, the high-k dielectric film 55 includes at least one metal element selected from Al, Hf, Zr, and rare earth metal elements in the film, and these metal elements accelerate oxidation by subsequent radical oxidation process. It also serves as a catalyst that can oxidize the silicon of the charge storage film in time.

As shown in FIG. 4C, the surface of the charge storage layer 54 is oxidized through radical oxidation to form a metal silicate 56. During the radical oxidation process, the metal element 56 in the high dielectric film 55, in particular, the metal element in the high dielectric film 55 serves as an oxidation catalyst to form the metal silicate 56 in a short time.

Since the charge storage film 54 is a material containing silicon, the silicon of the charge storage film 54 is oxidized by the radical oxidation process to form the metal silicate 56. Preferably, the metal silicate 56 may be viewed as a partially mixed metal silicate in which metal elements of the high dielectric film 55 are diffused. For example, the metal silicate 56 may include aluminum silicate (Al _x Si _y O _z ), hafnium silicate (Hf _x Si _y O _z ), zirconium silicate (Zr _x Si _y O _z ), and lanthanum silicate (La _x Si _y O _z ), dysprosium silicate (Dy _x Si _y O _z ), scandium silicate (Sc _x Si _y O _z ), yttrium silicate (Y _x Si _y O _z ), gadolinium silicate (Gd _x Si _y O _z ), neodymium Silicates (Nd _x Si _y O _z ), cerium silicates (Ce _x Si _y O _z ) or praseodymium silicates (Pr _x Si _y O _z ) include any one selected.

The radical oxidation proceeds to thermal radical oxidation or plasma radical oxidation.

The thermal radical oxidation process is performed using active oxygen radicals that are thermally dissociated in a furnace maintained at a high temperature of 600 ° C. or higher. The thermal radical oxidation process is performed by simultaneously injecting hydrogen-containing gas (H ₂ , D ₂ ) and oxygen gas (O ₂ ) gas into a heat treatment furnace at a temperature of 600 to 1200 ° C. and a pressure range of 1 mTorr to 100 Torr. 'D ₂ ' means deuterium. As described above, the active oxygen radicals are generated by simultaneously injecting the hydrogen-containing gas and the oxygen gas, and the active oxygen radicals oxidize the surface of the charge storage film 54.

The plasma radical oxidation process is a radical oxidation process using active oxygen radicals contained in the plasma. Since the plasma radical oxidation process uses plasma dissociated active oxygen radicals, the plasma radical oxidation process may be performed at a low temperature as compared with a thermal radical oxidation process using thermal dissociated active oxygen radicals.

The plasma radical oxidation process may be performed using oxygen gas alone or oxygen (O ₂ ) gas as a base, and at least one selected from argon (Ar), hydrogen (H ₂ ), or helium (He) as the oxygen gas. Proceed to mixed gas mixture. For example, the plasma radical oxidation process includes a mixed gas of argon, hydrogen and oxygen (Ar / H ₂ / O ₂ ), a mixed gas of argon and oxygen (Ar / O ₂ ), a mixture of helium, hydrogen and oxygen (He / H ₂ / O ₂ ), a mixed gas of helium and oxygen (He / O ₂ ), a mixed gas of hydrogen and oxygen (H ₂ / O ₂ ), or a mixed gas of at least two of these mixed gases You can also use The flow rate of the oxygen gas or the mixed gases is 5 to 2000 sccm.

Microwave or RF (Radio Frequency) is used as the plasma source, and plasma power is 100 to 3000W. The plasma treatment time is 5 to 600 seconds, and the substrate temperature is 0 to 600 ° C.

As described above, since the metal silicate 56 formed by the radical oxidation method is promoted by metal element contained in the high-k dielectric film 55, the metal silicate 56 can be grown to a sufficient thickness even if the oxidation proceeds for a short time. . In the case of applying the thermal radical oxidation method, damage to the charge storage film 54 is less because it can be grown even after only a short time. Plasma radical oxidation can be grown to a sufficient thickness even at low temperatures for a short time.

The metal silicate 55 described above is a material having a larger energy band gap than the high dielectric film 56.

As shown in FIG. 4D, an aluminum oxide film 57 is formed on the high dielectric film 55.

The aluminum oxide film 57 has a lower dielectric constant than the high dielectric film 56 but a larger energy band gap. As the aluminum oxide film 57 has a large energy band gap, charge loss can be further suppressed. For example, even if some charges are transferred to the metal silicate 56 and the high dielectric film 55, the aluminum oxide film 57 has a larger energy band gap than the high dielectric film 55, so that the aluminum oxide film is formed in the high dielectric film 55. The charge does not move to (57).

When the aluminum oxide film 57 is formed on the high dielectric film 56, the high dielectric film 56 may be excluded from the aluminum oxide film. The reason for this is to give an energy band gap difference between the high dielectric film 56 and the aluminum oxide film 57. The aluminum oxide film 57 has a very large energy band gap of about 8.7 eV.

The charge blocking film is formed by the series of steps described above. The charge blocking film includes a metal silicate 56, a high dielectric film 55, and an aluminum oxide film 57. The metal silicate 56 is a film that forms an interface with the charge storage film 54, and the aluminum oxide film 57 is a film that forms an interface with a subsequent conductive film. The high dielectric film 55 and the charge storage film 54 can be separated by the metal silicate 56 while obtaining the charge blocking effect by the high dielectric film 55 and the aluminum oxide film 57.

The metal silicate 56 according to the fourth embodiment is formed by radical oxidation, not by vapor deposition such as chemical vapor deposition, and thus has excellent film characteristics. In addition, since oxygen vacancies present in the high dielectric film during the radical oxidation process are cured by active oxygen radicals, the trap density is further reduced.

As a result, the use of radical oxidation makes it possible to easily form the metal silicate 56 of excellent film quality and to improve the film characteristics of the high dielectric film 55. This reduces the leakage current of the charge blocking film, improves the program and erase speeds, and improves data retention characteristics.

As shown in FIG. 4E, the first metal film 58, the polysilicon film 59, and the second metal film 60 are stacked on the third charge blocking film 57. The first metal film 58 is a metal film having a high work function as a material for suppressing leakage currents of the high dielectric film 55 and the aluminum oxide film 57. The first metal layer 58 is a material having a work function of at least a mid-gap and is selected from Pt, Ru, TiN, WN, TaN, Ir, Mo, Co, Ni, NiSi, NiPtSi, NiCSi, or CoSi. It includes at least one. The thickness of the first metal film 58 is 50 to 200 GPa. The polysilicon film 59 is used as a control gate. The second metal film 60 is a low resistive metal for lowering the resistance of the control gate and may include a tungsten film. A barrier metal film may be inserted to prevent mutual diffusion between the polysilicon film 59 and the second metal film 60.

The hard mask insulating layer 61 is formed on the second metal layer 60. The hard mask insulating layer 61 may be a material used as an etch barrier in a subsequent etching process, and may include a nitride layer.

As shown in FIG. 4F, the hard mask insulating film 61, the second metal film 60, the polysilicon film 59, the first metal film 58, the aluminum oxide film 57, and the high-k dielectric film 55. The metal silicates 56 and the charge storage layer 54 are sequentially etched.

The structure formed as described above is a charge trapping nonvolatile memory device when the charge storage film 54 is a silicon nitride film, and a floating nonvolatile memory device when the charge storage film 54 is a polysilicon film.

FIG. 5 is a photograph in which a high dielectric film is deposited to a predetermined thickness, where the charge storage film is a polysilicon film (Si). Referring to FIG. 5, it can be seen that a high dielectric film High k is formed on the charge storage layer Si with a predetermined thickness.

FIG. 6 is a photograph showing that a metal silicate is formed under a high-k film after radical oxidation. Referring to FIG. 6, it can be seen that a metal silicate is grown between the high-k film and the charge storage film Si.

On the other hand, when the radical oxidation is performed without the high dielectric film, the metal silicate is formed as thin as 30 kPa, but when the radical oxidation is performed after the high dielectric film is formed, the metal silicate is grown to a thickness of about 180 kPa. In view of this, it can be seen that the oxidation rate is increased by about 6 times by introducing the high dielectric film.

7 is a result of analyzing the composition of the specimen of FIG. 6 in the depth direction. Referring to FIG. 7, it can be seen that a metal silicate is formed between the high-k film and the charge storage film Si. In addition, it can be seen that in the metal silicate, a small amount of silicon (Si) and oxygen (O) as well as a metal element of the high dielectric film (see reference numeral High-k) are observed. That is, the metal silicate formed in the present invention may be referred to as a metal silicate in which a small amount of metal elements constituting the high dielectric film is present.

As can be seen from the results of FIGS. 6 and 7, the metal silicate used as the charge blocking film has a large dielectric constant because a small amount of metal elements are mixed into the film to form a silicate structure. The use of such a high dielectric constant metal silicate as a charge blocking film can additionally obtain the effect of reducing the leakage current while maintaining a thin equivalent oxide film thickness.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

1A is a diagram showing the structure of a nonvolatile memory device according to the first embodiment of the present invention;

Figure 1b is a comparison of the energy band diagram between the conventional MANOS structure and the charge storage film and charge blocking film according to the first embodiment of the present invention.

2A is a diagram showing the structure of a nonvolatile memory device according to the second embodiment of the present invention;

Figure 2b is a comparison of the energy band diagram between the conventional MANOS structure and the charge storage film and the charge blocking film according to the second embodiment of the present invention.

3A to 3E are cross-sectional views illustrating a method of manufacturing a nonvolatile memory device in accordance with a third embodiment of the present invention.

4A through 4F are cross-sectional views illustrating a method of manufacturing a nonvolatile memory device in accordance with a fourth embodiment of the present invention.

5 is a photograph of a high-k dielectric film deposited to a predetermined thickness.

Figure 6 is a photograph showing that the metal silicate is formed under the high-k dielectric (High-k) after radical oxidation.

7 is a result of analyzing the composition in the depth direction of the specimen of FIG.

* Explanation of symbols for the main parts of the drawings

100: first conductive film 101: tunneling film

102: charge storage film 103A: first charge blocking film

103B: second charge barrier

Claims (29)

A nonvolatile memory device including a charge blocking film for preventing the movement of charge stored in a charge storage film. The charge blocking film may include a first charge blocking film made of metal silicate and a second charge blocking film having an energy band gap greater than that of the first charge blocking film. Nonvolatile memory device comprising a. The method of claim 1, And the first charge blocking layer is disposed between the charge storage layer and the second charge blocking layer. The method of claim 1, And the metal silicate is a silicate of a metal element mixed in the second charge blocking layer. The method of claim 1, The metal silicate is a silicate containing at least one selected from Al, Hf, Zr or rare earth metal elements. The method of claim 4, wherein The rare earth metal element is any one selected from lanthanum (La), dysprosium (Dy), scandium (Sc), yttrium (Y), gadolinium (Gd), neodymium (Nd), cerium (Ce) or praseodymium oxide film (Pr) Nonvolatile memory device comprising a. The method of claim 1, The second charge blocking film,  A nonvolatile memory device, which is a metal oxide film including at least one selected from Al, Hf, Zr, and a rare earth metal element. The method of claim 1, The second charge blocking film, A nonvolatile memory device comprising at least one selected from an aluminum oxide film, a hafnium oxide film, a zirconium oxide film, a lanthanum oxide film, a lanthanum oxide film, a scandium oxide film, a yttrium oxide film, a gadolinium oxide film, a neodymium oxide film, a cerium oxide film, and a praseodymium oxide film. The method of claim 1, The metal silicate, Non-volatile memory device comprising any one selected from aluminum silicate, hafnium silicate, zirconium silicate, lanthanum silicate dysprosium silicate, scandium silicate, yttrium silicate, gadolinium silicate neodymium silicate, cerium silicate or praseodymium silicate. The method of claim 1, The charge storage layer includes a silicon nitride layer or a polysilicon layer. The method of claim 1, And a metal film formed on the charge blocking film and having a work function larger than an intermediate gap of silicon. The method of claim 10, The metal film includes at least one selected from Pt, Ru, TiN, WN, TaN, Ir, Mo, Co, Ni, NiSi, NiPtSi, NiCSi, or CoSi. The method according to any one of claims 1 to 11, The charge blocking layer further includes a third charge blocking layer formed on the second charge blocking layer and having an energy band gap greater than that of the second charge blocking layer. The method of claim 12, The third charge blocking layer includes a metal oxide layer. The method of claim 12, The third charge blocking layer includes an aluminum oxide layer (Al ₂ O ₃ ). Forming a tunneling film on the first conductive film; Forming a charge storage layer on the tunneling layer; Forming a dielectric film on the charge storage film; Oxidizing the surface of the charge storage layer through radical oxidation to form a metal silicate; And Forming a second conductive film on the dielectric film Nonvolatile memory device manufacturing method comprising a. The method of claim 15, And the dielectric film comprises a dielectric film mixed with a metal element serving as an oxidation catalyst during the radical oxidation. The method of claim 16, And the metal silicate is a silicate in which the metal elements mixed in the dielectric film are mixed. The method of claim 17, And the metal element comprises at least one selected from Al, Hf, Zr or a rare earth metal element. The method of claim 18, The rare earth metal element is any one selected from lanthanum (La), dysprosium (Dy), scandium (Sc), yttrium (Y), gadolinium (Gd), neodymium (Nd), cerium (Ce) or praseodymium oxide film (Pr) Nonvolatile memory device manufacturing method comprising a. The method of claim 15, The dielectric film, A method of manufacturing a nonvolatile memory device comprising at least one selected from aluminum oxide film, hafnium oxide film, zirconium oxide film, lanthanum oxide film, lanthanum oxide film, scandium oxide film, yttrium oxide film, gadolinium oxide film, neodymium oxide film, cerium oxide film and praseodymium oxide film. The method of claim 20, The metal silicate, A non-volatile memory device comprising any one selected from aluminum silicate, hafnium silicate, zirconium silicate, lanthanum silicate dysprosium silicate, scandium silicate, yttrium silicate, gadolinium silicate neodymium silicate, cerium silicate or praseodymium silicate. The method of claim 15, The radical oxidation is a non-volatile memory device manufacturing method that proceeds using thermal radical oxidation or plasma radical oxidation. The method of claim 22, The thermal radical oxidation, A method of manufacturing a nonvolatile memory device in which hydrogen-containing gas and oxygen gas are injected simultaneously into a heat treatment furnace at a temperature of 600 to 1200 ° C. and a pressure range of 1 mTorr to 100 Torr. The method of claim 22, The plasma radical oxidation, Proceed by using oxygen gas alone or oxygen (O ₂ ) gas as a basic mixed gas mixed with at least one selected from argon (Ar), hydrogen (H ₂ ) or helium (He). A method of manufacturing a nonvolatile memory device. The method of claim 22, The plasma radical oxidation uses a microwave or RF (Radio Frequency) as a plasma source, plasma power (100-3000W), and proceeds for 5 to 600 seconds at a substrate temperature of 0 ~ 600 ℃ A nonvolatile memory device manufacturing method. The method according to any one of claims 15 to 25, Before forming the second conductive film, And forming a metal oxide film having a larger energy band gap than the dielectric film. The method of claim 26, The metal oxide film is a non-volatile memory device manufacturing method comprising an aluminum oxide film (Al ₂ O ₃ ). The method of claim 26, And the second conductive film is formed on the metal oxide film and includes a metal film having a work function larger than an intermediate gap of silicon. The method of claim 28, And the metal film comprises at least one selected from Pt, Ru, TiN, WN, TaN, Ir, Mo, Co, Ni, NiSi, NiPtSi, NiCSi, or CoSi.

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