KR20100010709A - Driving scheme for multiple-fold gate lcd - Google Patents

Abstract

PURPOSE: A method for driving a multi gate LCD is provided to reduce a vertical stripe with a defect by averaging charge imbalance generated by a toggled common electrode voltage according to a space and a time. CONSTITUTION: A liquid crystal display(100) is driven for a horizontal scan cycle and has two banks or more comprised of a pixel electrode(10) in each horizontal row. Two banks or more of the first horizontal row are driven with a first driving order. Two banks or more of the second horizontal row are driven with a second driving order different from the first driving order. A line inversion is performed by spatially and visually inverting the polarity of the common electrode in an adjacent horizontal row. A dot inversion is performed by spatially and visually inverting the polarity of the common electrode of the adjacent pixel. The polarity of the common electrode is changed in the middle of the horizontal scan cycle.

Description

DRIVING SCHEME FOR MULTIPLE-FOLD GATE LCD

TECHNICAL FIELD The present invention relates to liquid crystal displays (LCDs) and, more particularly, to a driving method for a double gate LCD.

Liquid crystal displays (LCDs) typically include a horizontal row and a vertical column of pixels (pixels) arranged in matrix form. Each pixel includes a pixel electrode and a thin film transistor (TFT) formed on a substrate (or panel). The gates of the TFTs in the same horizontal column are connected to each other via a gate line, and are controlled by a gate driver (or scan driver). The sources of the TFTs in the same vertical column are connected to each other via a source line and controlled by a source driver (or data driver). The common electrode is formed on another board | substrate (or panel). A liquid crystal (LC) layer is sealed between the pixel electrode substrate and the common electrode substrate, and the display of the pixel is determined by the potential difference between the pixel electrode and the common electrode. To prevent the LC layer from deteriorating as the unidirectional electric field is applied for a long time, an inversion driving method (eg, a line inversion) in which the applied electric field is periodically inverted by boosting and lowering the common electrode voltage Vcom. line inversion or dot inversion).

The gate driver and the source driver are each formed of a plurality of driving integrated circuit (IC) chips. Since the source driver IC chip is usually more expensive than the gate driver IC chip, it is desirable to reduce the number of source driver IC chips in the LCD and increase the number of gate driver IC chips. Therefore, some double gate LCD structures are known, in which the number of source lines (source driving IC chips) is reduced by half, and the number of gate lines (gate driving IC chips) is doubled. have. In general, dual gate LCDs are less expensive than conventional LCDs. The operation of the double gate LCD is not turned on at the same time as in a conventional LCD, during a cycle of horizontal scan (generally referred to simply as "1H"), but the TFTs on the same line are turned on in turn.

However, there are cases where defective vertical stripe occurs on the display of a double gate LCD, which is an unbalanced charge for adjacent pixels due to unstable common electrode voltage Vcom resulting from RC loading on the common electrode. (unbalance charge). This defective vertical stripe phenomenon is mentioned in US Patent Application No. 2006/0164350 filed by Kim et al. Entitled "Thin Film Transistor Array Panel and Display Device."

For the reasons explained above, in order to effectively reduce or eliminate defective vertical stripes, a novel driving method for a double gate LCD is needed.

The present invention aims to improve the image quality of a display by proposing a driving method for a double gate LCD to effectively reduce or eliminate defective vertical stripes.

According to an embodiment of the present invention, the present invention provides a driving method for a multi-gate LCD such as a double gate liquid crystal display (LCD). A forward drive order is provided to drive banks A and B, which consist of pixel electrodes in multiple horizontal columns. Subsequently, a reverse driving order for driving banks A and B in neighboring multiple horizontal columns is provided.

According to the present invention, the charge imbalance caused by the toggling common electrode voltage can be visually averaged both over time and space, effectively reducing defective vertical stripes.

FIG. 1A shows a dual gate liquid crystal display (LCD) 100 comprising a horizontal column and a vertical column of pixel electrodes 10 arranged in a matrix form. FIG. 1B is a partial circuit diagram of FIG. 1A. A switching element 12 such as a thin film transistor TFT corresponds to each pixel electrode 10 in the pixel (or pixel). In a horizontal row, neighboring TFTs (e.g., 12A, 12B) share a source line (e.g., S1) driven by the source driver 14. The sources of the TFTs 12A, 12B in neighboring vertical columns are connected to each other via a shared source line S1, as shown in FIG. 1B. In the horizontal column, portions of the TFT 12 (e.g., odd-numbered TFTs) are connected to each other through a gate line (e.g., G1) driven by the gate driver A 16, and the TFT 12 The other part (e.g., even-numbered TFTs) are connected to each other through another gate line (e.g., G2) driven by another gate driver B (18). These two gate lines form a pair of gate lines for corresponding horizontal columns of pixels. Those skilled in the art will appreciate that gate driver A 16 and gate driver B 18 can be combined to form a single gate driver. For illustrative purposes, the odd-numbered TFTs and the pixel electrodes in the corresponding horizontal columns are referred to as bank A, and the even-numbered TFTs and the corresponding pixel electrodes in the horizontal columns referred to as bank B. The timing controller (T-con) 20 synchronizes the operation of the gate driver 16/18 and the source driver 14 in a controllable manner.

FIG. 1C is a timing diagram illustrating an operation of the dual gate LCD of FIG. 1A. The operation of the horizontal sync signal HS goes from logical high ("1") to logical low ("0") to start the cycle of horizontal sync scan. This horizontal synchronous scan is simply referred to as "1H". During the 1H cycle, bank A and bank B are operated in sequence in the pattern of AB-AB-AB-AB, so that the odd pixel electrode and the even pixel electrode are operated in turn, so that the source line from the source driver 14 can be operated. Video data is received through S1 to S6. By repeating this pattern, it is sequentially driven as shown from the first gate line G1 to the last gate line (G12 in the example shown in Fig. 1C). That is, the gate lines G1 to G12 of the double gate LCD are driven in the order of 1-2-3-4-5-6-7-8-9-10-11-12, as shown in FIG. 1D. do. Referring again to FIG. 1C, the polarity of the common electrode POL is inverted to realize line inversion such that the polarity of the scan line is inverted sequentially in the frame, and the polarity of the scan line is also sequentially through the frame. Is reversed. For example, as shown in FIG. 1E, scan line 1 ("line 1") has a positive polarity ("+"), and scan line 2 ("line 2") adjacent to it in the same frame is negative. Polarity ("-"). In addition, for the same scan line of successive frames, their polarities are also sequentially reversed through the frame. For example, as shown in FIG. 1E, when scan line 1 ("line 1") of frame 1 ("frame 1") has a positive polarity ("1"), neighboring frames ("frame 2"). The same scan line 1 of) has a negative polarity ("-").

For the dual gate LCD driven by the line inversion driving scheme of FIG. 1C, the common electrode voltage Vcom toggles (ie, logical high to logical low, or logical low to logical high) every horizontal scan (ie, 1H). To). Because the slew rate of the common electrode voltage is substantially governed by the RC load on the common electrode, the common electrode voltage Vcom is typically stable within half (1/2 * H) of the horizontal scan. Because of this, the charge at the charge capacitance (e.g., 10A or 10B in Fig. 1B) becomes unstable between the banks A and B. As a result, a charge difference occurs between neighboring pixels. The result is one or more vertical stripes that are defective on the display of the dual gate LCD.

2A is a timing diagram illustrating an operation of a driving method for a double gate LCD according to an exemplary embodiment of the present invention. Although a dual gate LCD is described herein, the present invention may be generally applied to other types of LCDs, such as triple gate LCD, quad gate LCD, or multi gate LCD, with or without modification. . FIG. 2B is a timing diagram illustrating a driving sequence of the gate lines G1 to G12 according to the driving method of FIG. 2A. Therefore, the gate lines G1 to G12 of the double gate LCD are driven in the order of 1-2-3-4-6-5-8-7-9-10-11-12, as shown in FIG. 2B. do. 2C illustrates an example of a common electrode polarity according to the driving method of FIG. 2A. Compared to the driving schemes of Figs. 1C to 1E, the bank driving sequence in this example is AB-AB-BA-BA for continuous scan lines (different from AB-AB-AB-AB in the driving scheme described above). Has a pattern. In other words, the bank drive order is reversed every two scan lines (AB to BA or BA to AB). Therefore, the gate line of the double gate LCD is driven in the order of 1-2-3-4-6-5-8-7-9-10-11-12. Although the bank driving order has been described as being inverted every two scan lines, the present invention can be appropriately changed such that the bank driving order is inverted, for example, one scan line alternately or every three scan lines.

Referring to FIG. 2C, the shaded pixels represent the charge imbalance caused by the toggling common electrode voltage Vcom. According to the specific driving method of this embodiment, it is important that the lines of the same polarity have an inverted bank driving order in the space region (ie, the same frame). For example, the first line ("line 1") and the third line ("line 3") have the same polarity ("+") in the first frame ("frame 1") and thus the first line (" Line 1 ") has a bank drive sequence AB inverted from the bank drive sequence BA of the third line (" line 3 "). In addition, lines of the same polarity have an inverted bank driving order in the time domain (ie, different frames). For example, the first line ("line 1") of the first frame ("frame 1") and the third frame ("frame 3") have the same polarity ("+"), and thus the first frame (" The first line of the frame 1 "has a bank driving order AB inverted from the bank driving order BA of the first line of the third frame (" Frame 3 "). Accordingly, each dot in the present embodiment is equally likely to have the common electrode voltage Vcom to toggle, so that a difference in charge occurs for each dot. For example, the first dot R1 in the first line ("line 1") receives a toggled common electrode voltage Vcom, which has a positive polarity in the first frame ("frame 1"); In the second frame (“frame 2”), it receives a common electrode voltage Vcom that toggles with negative polarity; In the third frame ("Frame 3"), it receives a common electrode voltage Vcom that toggles with positive polarity; Finally, in the fourth frame (“frame 4”), the common electrode voltage Vcom is toggled, which has a negative polarity. As a result, the human eye no longer visually recognizes a defective vertical stripe. In this embodiment, the inversion of the bank driving order and the polarity of the common electrode POL may be performed by the timing controller 20 (FIG. 1A) or the gate driver 16/18.

3A is a timing diagram illustrating an operation of a driving method according to another exemplary embodiment of the present invention. FIG. 3B is a timing diagram illustrating a driving sequence of gate lines G1 to G12 according to the driving method of FIG. 3A. Therefore, the gate lines G1 to G12 of the double gate LCD are driven in the order of 1-2-3-4-6-5-8-7-9-10-11-12, as shown in Fig. 3B. . 3C illustrates an example of a common electrode polarity according to the driving method of the LCD of FIG. 3A. In this embodiment, the polarity of the common electrode POL is arranged to be dot inversion (not line inversion). That is, the polarity of the common electrode POL of the dots is opposite to that of neighboring dots in the same frame. In addition, the polarity of the common electrode POL of a dot in a frame is opposite to that of the same dot in a frame adjacent thereto. In this embodiment, the polarity of the common electrode POL is changed in the middle of the horizontal scan (ie, the time corresponding to 1/2 * H). Compared to the driving schemes of Figs. 2A to 2C, the bank driving order in this embodiment has the same pattern of AB-AB-BA-BA for successive scan lines. In other words, the bank drive order is reversed every two scan lines (AB to BA or BA to AB). Therefore, the gate line of the double gate LCD is driven in the order of 1-2-3-4-6-5-8-7-9-10-11-12.

Referring to FIG. 3C, the shaded pixels represent the charge imbalance caused by the toggling common electrode voltage Vcom. According to the specific driving scheme of this embodiment, it is important that each dot is substantially visually averaged in both the time domain and the spatial domain. For example, with respect to the first frame ("frame 1"), the first dot R1 in the first line ("line 1") is the third line ("line 3") in the space region (that is, the same frame). Can be visually averaged to the first dot R1 at " In addition, the first line ("line 1") in the first frame ("frame 1") also has a first line ("" 3 ") in the time domain (that is, a different frame). Line 1 ") may be visually averaged. As a result, the human eye can no longer visually recognize a defective vertical stripe.

According to the embodiments described above, the dual gate LCD has substantially the same possibility that the common electrode voltage Vcom to which each dot toggles is applied, or each dot is substantially visible in both the time domain and the spatial domain. Because it is driven in such a way that it can be averaged, it is possible to effectively reduce or eliminate defective vertical stripes.

Although specific embodiments have been illustrated and described, it will be apparent to those skilled in the art that various modifications may be made without departing from the scope of the present invention and that the scope of the present invention is limited only by the claims.

1A shows a dual gate liquid crystal display (LCD).

FIG. 1B shows a partial circuit diagram of the liquid crystal display of FIG. 1A.

FIG. 1C is a timing diagram illustrating the operation of the liquid crystal display of FIG. 1A.

FIG. 1D is a timing diagram illustrating a driving order of gate lines according to the driving method of FIG. 1C.

1E shows an example of the polarity of the common electrode of the double gate LCD.

2A is a timing diagram illustrating an operation of a driving method according to an exemplary embodiment of the present invention.

FIG. 2B is a timing diagram illustrating a driving order of gate lines according to the driving method of FIG. 2A.

2C illustrates an example of the polarity of the common electrode according to the driving method of FIG. 2A.

3A is a timing diagram illustrating an operation of a driving method according to another exemplary embodiment of the present invention.

3B is a timing diagram illustrating a driving order of gate lines according to the driving method of FIG. 3A.

3C illustrates an example of the polarity of the common electrode according to the driving method of FIG. 3A.

Claims (5)

A method of driving a liquid crystal display (LCD) having two or more banks of pixel electrodes in each horizontal column, which are driven sequentially during a horizontal scan cycle, the method comprising: Driving at least two banks of the first horizontal row in a first driving order; And Driving two or more banks of a second horizontal row in a second driving order different from the first driving order; Comprising a drive method of the liquid crystal display. The method of claim 1, And a line inversing step for spatially and temporally inverting the polarity of the common electrodes of the neighboring horizontal columns. The method of claim 1, And a dot inversing step for spatially and temporally inverting the polarity of the common electrode of the neighboring pixel. The method of claim 3, And wherein the polarity of the common electrode changes approximately in the middle of the horizontal scan cycle. A method of driving a double gate liquid crystal display (LCD), Providing a horizontal synchronization signal to initiate a horizontal scan cycle; Providing a forward driving order for driving the banks A and B, which consist of pixel electrodes in a plurality of horizontal columns; And Inverting the forward driving order to obtain a reverse driving order for driving the banks A and B consisting of pixel electrodes in a plurality of neighboring horizontal columns; A drive method of a double gate liquid crystal display comprising a.

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