KR20090118645A - Plasma display device - Google Patents

Abstract

PURPOSE: A plasma display device is provided to improve image quality and circuit reliability by minimizing the driving time increase by the increase of the scan signal width in a part of sub fields. CONSTITUTION: A plasma display device includes a plasma display panel and a driver. A plurality of sub fields comprise one frame. The plurality of sub fields are divided into a first sub field group and a second sub field group. The peak voltage of a reset signal of the second sub field is lower than the first sub field. The width(W2) of a first scan signal supplied from the first sub field of the second sub field group is wider than the width of the scan signal supplied from the sub field after the second sub field of the second sub field group.

Description

Plasma display device

The present invention relates to a plasma display device, and more particularly, to an apparatus for driving a plasma display panel.

The plasma display panel (hereinafter referred to as PDP) displays an image by excitation and emitting phosphors by vacuum ultraviolet rays (VUV) generated when the inert gas is discharged.

Such a PDP is not only large in size and thin in thickness, but also has a simple structure and is easy to manufacture, and has a high luminance and high luminous efficiency compared to other flat display devices. In particular, the AC surface-discharge type 3-electrode plasma display panel has advantages of low voltage driving and long life because wall charges are accumulated on the surface during discharge to protect the electrodes from sputtering caused by the discharge.

The plasma display panel is time-division driven by a reset period for initializing all cells, an address period for selecting cells, and a sustain period for causing display discharge in the selected cells in order to realize gray levels of an image. do.

PDP accumulates wall charges and uses them for discharging. However, the PDP may cause a flashing and discharging phenomenon due to a lack of wall charges, thereby degrading a display image quality.

SUMMARY OF THE INVENTION In order to solve the above problems in the plasma display device, a technical problem of the present invention is to increase the width of the scan signal of some subfields so that sufficient address discharge is achieved, thereby stably driving the drive signal to improve the flashing misdischarge. It is an object of the present invention to provide a plasma display device that can be supplied to a panel.

A plasma display device of the present invention, the plasma display panel having a plurality of electrodes; And a driving unit supplying a driving signal to the plurality of electrodes, wherein the plurality of subfields constituting one frame have a maximum voltage of the reset signal supplied in the first subfield group and the reset period than the first subfield group. The second scan signal is divided into a lower second subfield group, and the width of the first scan signal supplied in the first subfield of the second subfield group is supplied in at least one of second and subsequent subfields of the second subfield group. It is characterized by greater than the width of.

According to the plasma display device according to the present invention, it is possible to increase the width of the scan signal to prevent blinking and discharging, and to increase the width of the scan signal in only some subfields, thereby minimizing the increase in driving time due to the increase of the scan signal width. A plasma display device with improved circuit reliability can be provided.

Hereinafter, a plasma display device according to the present invention will be described in detail with reference to the accompanying drawings. 1 is a perspective view illustrating an embodiment of a structure of a plasma display panel.

As shown in FIG. 1, the plasma display panel includes a scan electrode 11, a sustain electrode 12, a sustain electrode pair formed on the upper substrate 10, and an address electrode 22 formed on the lower substrate 20. It includes.

The sustain electrode pairs 11 and 12 generally include transparent electrodes 11a and 12a and bus electrodes 11b and 12b formed of indium tin oxide (ITO), and the bus electrodes 11b and 12b. 12b) may be formed of a metal such as silver (Ag) or chromium (Cr) or a stack of chromium / copper / chromium (Cr / Cu / Cr) or a stack of chromium / aluminum / chromium (Cr / Al / Cr). . The bus electrodes 11b and 12b are formed on the transparent electrodes 11a and 12a to serve to reduce voltage drop caused by the transparent electrodes 11a and 12a having high resistance.

Meanwhile, according to the exemplary embodiment of the present invention, the sustain electrode pairs 11 and 12 may not only have a structure in which the transparent electrodes 11a 12a and the bus electrodes 11b and 12b are stacked, but also the buses without the transparent electrodes 11a and 12a. Only the electrodes 11b and 12b may be configured. This structure does not use the transparent electrodes (11a, 12a), there is an advantage that can lower the cost of manufacturing the panel. The bus electrodes 11b and 12b used in this structure may be various materials such as photosensitive materials in addition to the materials listed above.

Light between the scan electrodes 11 and the sustain electrodes 12 between the transparent electrodes 11a and 12a and the bus electrodes 11b and 11c to absorb external light generated outside the upper substrate 10 to reduce reflection. A black matrix (BM, 15) is arranged that functions to block and to improve the purity and contrast of the upper substrate 10.

The black matrix 15 according to the exemplary embodiment of the present invention is formed on the upper substrate 10, the first black matrix 15 and the transparent electrodes 11a and 12a formed at positions overlapping the partition wall 21. And the second black matrices 11c and 12c formed between the bus electrodes 11b and 12b. Here, the first black matrix 15 and the second black matrices 11c and 12c, also referred to as black layers or black electrode layers, may be simultaneously formed and physically connected in the formation process, or may not be simultaneously formed and thus not physically connected. .

In addition, when physically connected and formed, the first black matrix 15 and the second black matrix 11c and 12c may be formed of the same material, but may be formed of different materials when they are formed separately.

The upper dielectric layer 13 and the passivation layer 14 are stacked on the upper substrate 10 having the scan electrode 11 and the sustain electrode 12 side by side. Charged particles generated by the discharge are accumulated in the upper dielectric layer 13, and the protective electrode pairs 11 and 12 may be protected. The protective film 14 protects the upper dielectric layer 13 from sputtering of charged particles generated during gas discharge, and increases emission efficiency of secondary electrons.

In addition, the address electrode 22 is formed in a direction crossing the scan electrode 11 and the sustain electrode 12. In addition, a lower dielectric layer 24 and a partition wall 21 are formed on the lower substrate 20 on which the address electrode 22 is formed.

In addition, the phosphor layer 23 is formed on the surfaces of the lower dielectric layer 24 and the partition wall 21. The partition wall 21 has a vertical partition wall 21a and a horizontal partition wall 21b formed in a closed shape, and physically distinguishes discharge cells, and prevents ultraviolet rays and visible light generated by the discharge from leaking into adjacent discharge cells.

In an embodiment of the present invention, not only the structure of the partition wall 21 illustrated in FIG. 1, but also the structure of the partition wall 21 having various shapes may be possible. For example, a channel in which a channel usable as an exhaust passage is formed in at least one of the differential partition structure, the vertical partition 21a, or the horizontal partition 21b having different heights of the vertical partition 21a and the horizontal partition 21b. A grooved partition structure having a groove formed in at least one of the type partition wall structure, the vertical partition wall 21a, or the horizontal partition wall 21b may be possible.

Here, in the case of the differential partition wall structure, the height of the horizontal partition wall 21b is more preferable, and in the case of the channel partition wall structure or the groove partition wall structure, it is preferable that a channel is formed or the groove is formed in the horizontal partition wall 21b. something to do.

Meanwhile, in one embodiment of the present invention, although the R, G and B discharge cells are shown and described as being arranged on the same line, it may be arranged in other shapes. For example, a Delta type arrangement in which R, G, and B discharge cells are arranged in a triangular shape may be possible. In addition, the shape of the discharge cell may be not only rectangular, but also various polygonal shapes such as a pentagon and a hexagon.

In addition, the phosphor layer 23 emits light by ultraviolet rays generated during gas discharge to generate visible light of any one of red (R), green (G), and blue (B). Here, an inert mixed gas such as He + Xe, Ne + Xe and He + Ne + Xe for discharging is injected into the discharge space provided between the upper / lower substrates 10 and 20 and the partition wall 21.

FIG. 2 illustrates an embodiment of an electrode arrangement of a plasma display panel, and a plurality of discharge cells constituting the plasma display panel are preferably arranged in a matrix form as shown in FIG. 2. The plurality of discharge cells are provided at the intersections of the scan electrode lines Y1 to Ym, the sustain electrode lines Z1 to Zm, and the address electrode lines X1 to Xn, respectively. The scan electrode lines Y1 to Ym may be driven sequentially or simultaneously, and the sustain electrode lines Z1 to Zm may be driven simultaneously. The address electrode lines X1 to Xn may be driven by being divided into odd-numbered lines and even-numbered lines, or sequentially driven.

Since the electrode arrangement shown in FIG. 2 is only an embodiment of the electrode arrangement of the plasma panel according to the present invention, the present invention is not limited to the electrode arrangement and driving method of the plasma display panel shown in FIG. 2. For example, a dual scan method in which two scan electrode lines among the scan electrode lines Y1 to Ym are simultaneously scanned is possible. In addition, the address electrode lines X1 to Xn may be driven by being divided up and down in the center portion of the panel.

3 is a timing diagram illustrating an embodiment of a time division driving method by dividing a frame into a plurality of subfields. The unit frame may be divided into a predetermined number, for example, eight subfields SF1, ..., SF8 to realize time division gray scale display. Each subfield SF1, ... SF8 is divided into a reset section (not shown), an address section A1, ..., A8 and a sustain section S1, ..., S8.

Here, according to an embodiment of the present invention, the reset period may be omitted in at least one of the plurality of subfields. For example, the reset period may exist only in the first subfield or may exist only in a subfield about halfway between the first subfield and all the subfields.

In each address section A1, ..., A8, a display data signal is applied to the address electrode X, and scan pulses corresponding to each scan electrode Y are sequentially applied.

In each of the sustain periods S1, ..., S8, a sustain pulse is alternately applied to the scan electrode Y and the sustain electrode Z to form wall charges in the address periods A1, ..., A8. Sustain discharge occurs in the discharge cells.

The luminance of the plasma display panel is proportional to the number of sustain discharge pulses in the sustain discharge periods S1, ..., S8 occupied in the unit frame. When one frame forming one image is represented by eight subfields and 256 gradations, each subfield in turn has different sustains at a ratio of 1, 2, 4, 8, 16, 32, 64, and 128. The number of pulses can be assigned. In order to obtain luminance of 133 gradations, cells may be sustained by addressing the cells during the subfield 1 section, the subfield 3 section, and the subfield 8 section.

The number of sustain discharges allocated to each subfield may be variably determined according to weights of the subfields according to the APC (Automatic Power Control) step. That is, in FIG. 3, a case in which one frame is divided into eight subfields has been described as an example. However, the present invention is not limited thereto, and the number of subfields forming one frame may be variously modified according to design specifications. . For example, a plasma display panel may be driven by dividing one frame into eight or more subfields, such as 12 or 16 subfields.

The number of sustain discharges allocated to each subfield can be variously modified in consideration of gamma characteristics and panel characteristics. For example, the gray level assigned to subfield 4 may be lowered from 8 to 6, and the gray level assigned to subfield 6 may be increased from 32 to 34.

4 is a timing diagram illustrating an embodiment of driving signals for driving a plasma display panel with respect to the divided subfield.

The subfield is a wall formed by a pre-reset section and a pre-reset section for forming positive wall charges on the scan electrodes Y and negative wall charges on the sustain electrodes Z. A reset section for initializing the discharge cells of the entire screen using the charge distribution, an address section for selecting the discharge cells, and a sustain section for maintaining the discharge of the selected discharge cells.

The reset section includes a setup section and a setdown section. In the setup section, rising ramp waveforms (Ramp-up) are simultaneously applied to all scan electrodes to generate fine discharges in all discharge cells. Thus, wall charges are generated. In the set-down period, a falling ramp waveform (Ramp-down) falling at a positive voltage lower than the peak voltage of the rising ramp waveform (Ramp-up) is simultaneously applied to all the scan electrodes (Y), thereby eliminating discharge discharge in all the discharge cells. Generated, thereby eliminating unnecessary charges during wall charges and space charges generated by the setup discharges.

In the address period, a negative scan signal scan is sequentially applied to the scan electrode, and at the same time, a data signal data having a positive address voltage Va is applied to the address electrode X. The address discharge is generated by the voltage difference between the scan signal and the data signal and the wall voltage generated during the reset period, thereby selecting the cell. Meanwhile, a signal for maintaining a sustain voltage is applied to the sustain electrode during the set down period and the address period.

In the sustain period, a sustain pulse having a sustain voltage Vs is alternately applied to the scan electrode and the sustain electrode to generate sustain discharge in the form of surface discharge between the scan electrode and the sustain electrode.

The driving waveforms shown in FIG. 4 are exemplary embodiments of signals for driving the plasma display panel according to the present invention, and the present invention is not limited to the waveforms shown in FIG. 4. For example, the pre-reset period may be omitted, and the polarity and the voltage level of the driving signals illustrated in FIG. 4 may be changed as necessary. After the sustain discharge is completed, an erase signal for erasing wall charge may be applied to the sustain electrode. May be authorized. In addition, the single sustain driving may be performed by applying the sustain signal to only one of the scan electrode (Y) and the sustain (Z) electrode to generate a sustain discharge.

A plasma display device of the present invention includes a plasma display panel having a plurality of electrodes; And a driving unit supplying a driving signal to the plurality of electrodes, wherein the plurality of subfields constituting one frame have a maximum voltage of a reset signal supplied in a first subfield group and a reset period. Divided into a second subfield group lower than the group,

The width of the first scan signal supplied from the first subfield of the second subfield group is greater than the width of the second scan signal supplied from at least one of the second and subsequent subfields of the second subfield group. do.

       In addition, the width of the first scan signal may be configured to be larger than the width of the scan signal supplied from second and subsequent subfields of the second subfield group, and the width of the first scan signal is the first subfield. The width of the scan signal supplied from the subfields of the group may be substantially the same.

More preferably, the width of the first scan signal may be 1.3 to 1.8 times the width of the second scan signal.

The total number of the sustain signals supplied from the subfields of the first subfield group and the first subfield of the second subfield group may be 50 or more.

5 is a timing diagram illustrating an embodiment of a waveform of a driving signal according to the present invention.

Referring to FIG. 5, the first to third subfields are first subfield groups, and the fourth to sixth subfields are second subfield groups to which a reset signal having a maximum voltage lower than that of the first subfield group is applied. to be. In the exemplary embodiment of FIG. 5, a reset signal having a low maximum voltage is applied from the fourth subfield, but the present invention is not limited thereto.

In general, the wall charge state formed on the electrodes of the panel is gradually stabilized as the sustain discharge is repeated. Therefore, in the subfields located in front of the plurality of subfields, for example, the first to fourth subfields, the wall charge state may be unstable and address mis-discharge may occur, and the address may be reduced if the period or width of the scan signal is reduced. The probability of false discharges can be even higher. In addition, when the reset discharge is not large enough, the wall charges may not be accumulated sufficiently, which increases the risk of false discharge. After the reset period, wall charges decrease due to a decrease in resistance between electrodes. The reduction of the wall charges reduces the wall voltages that can be used for the address discharges, so that the sum of the wall voltages and the applied voltages is reduced below the discharge start voltage, so that stable address discharges may not occur.

As shown in FIG. 5, the width W2 of the first scan signal supplied from the first subfield of the second subfield group is the second supplied from at least one of the second and subsequent subfields of the second subfield group. By making it larger than the width of the scan signal, it is possible to increase the width of the scan signal of the most vulnerable subfield to secure sufficient time for the address discharge to occur and to prevent the occurrence of address erroneous discharge.

In addition, the width of the first scan signal may be greater than the width of the scan signal supplied from the second and subsequent subfields of the second subfield group, thereby preventing address misfiring.

That is, the width W2 of the first scan signal supplied in the first subfield of the second subfield group is equal to the widths of the scan signals supplied in second and subsequent subfields of the second subfield group. It can be made larger than any one of.), More preferably, it can be made larger than all.

As described above, the wall charges formed on the electrodes of the panel as well as the subfields to which a small reset signal is supplied are gradually stabilized as the sustain discharges are repeatedly generated. The widths of the scan signals supplied from the subfields and the first to fourth subfields may be increased by increasing the widths of the scan signals to have substantially the same value.

That is, the width W2 of the first scan signal may be substantially the same as the width W1 of the scan signal supplied from the subfields of the first subfield group.

In addition, the present invention can be configured such that the total number of the sustain signals supplied from the subfields of the first subfield group and the first subfield of the second subfield group is 50 or more times. When the number of sustain discharges is 50 or more, the reset discharge is stabilized by the sustain discharge, and the possibility of the occurrence of flashing false discharge is significantly reduced. Therefore, even if the width of the scan signal is increased from the second subfield of the second subfield group, the blinking misdischarge improvement is not significant.

6 is a diagram illustrating a width of a scan signal in an address period of subfields.

As described with reference to FIG. 5, the possibility of an address misfiring occurring in the front subfield in which the wall charge state is unstable among the plurality of subfields constituting one frame, in the first to fourth subfields, may increase. In addition, in the above example, since the reset signal of a small voltage is applied to the fourth subfield, the width W2 of the scan signal of the fourth subfield, which is particularly susceptible to the discharge, is increased. The address discharge can be stably made larger than the width.

More preferably, the width W2 of the scan signal supplied from the first subfield of the second subfield group is 1.3 to 1.8 times the width of the scan signal supplied from the remaining subfields of the other second subfield group. can do.

If the width of the scan signal is smaller than 1.3 times, the scan signal is small and the discharge is not sufficiently matured. Therefore, sufficient wall charges necessary for maintaining the discharge during address discharge cannot be formed on the electrode.

If the width is longer than 1.8 times, the address period becomes longer than necessary. As a result, an address driving margin is reduced due to unnecessary voltage consumption, and a limitation in image representation occurs due to a decrease in the sustain period.

The width of the scan signal supplied to the scan electrode during the address period may vary, and the period of the scan signal may vary according to the variation of the scan signal width. When the scan signal period is kept constant, noise generated by a plurality of consecutively applied scan signals may be concentrated in a specific frequency region, causing distortion of the driving signal or degrading the image quality of the display image. You can.

Thus, by varying the period of the scan signal, noise generated by the scan signal can be prevented from being concentrated in a specific frequency region.

Referring to FIG. 6, the widths W3, W4,... Of the scan signals supplied from the second and subsequent subfields of the second subfield group may be configured identically, but the scans supplied from the respective subfields may be the same. The width of the signal may decrease as the driving order goes backwards. Accordingly, a scan signal having the largest width W3 of the scan signal supplied from the second subfield among the second subfield groups and having a smaller width W4 toward the subsequent subfield may be provided.

In general, the wall charge state formed on the electrodes of the panel is gradually stabilized as the sustain discharge is repeated. Therefore, it is not necessary to increase the width of the scan signal until the sustain discharge is sufficiently stable in the previous subfield. Therefore, the width of the scan signal may be reduced in the subfields having a slower driving order to secure the driving margin, thereby reducing unnecessary time lapse. .

Although a preferred embodiment of the present invention has been described in detail above, those skilled in the art to which the present invention pertains can make various changes without departing from the spirit and scope of the invention as defined in the appended claims. It will be appreciated that modifications or variations may be made. Accordingly, modifications to future embodiments of the present invention will not depart from the technology of the present invention.

1 is a perspective view showing an embodiment of the structure of a plasma display panel according to the present invention.

2 is a diagram illustrating an embodiment of an electrode arrangement of a plasma display panel.

FIG. 3 is a timing diagram illustrating an embodiment of a method of time-divisionally driving a plasma display panel by dividing one frame into a plurality of subfields.

4 is a timing diagram illustrating an embodiment of a waveform of a driving signal for driving a plasma display panel.

5 is a timing diagram illustrating an embodiment of a waveform of a driving signal for driving a plasma display panel according to the present invention.

6 is a view showing an embodiment of the variable width of the scan signal according to the present invention.

Claims (5)

A plasma display panel having a plurality of electrodes; And a driving unit supplying a driving signal to the plurality of electrodes. The plurality of subfields constituting one frame are divided into a first subfield group and a second subfield group having a maximum voltage of a reset signal supplied in a reset period lower than the first subfield group. The width of the first scan signal supplied from the first subfield of the second subfield group is greater than the width of the second scan signal supplied from at least one of the second and subsequent subfields of the second subfield group. Plasma display device. The method of claim 1, And the width of the first scan signal is greater than the width of the scan signal supplied from second and subsequent subfields of the second subfield group. The method of claim 1, The width of the first scan signal is a plasma display device, characterized in that 1.3 to 1.8 times the width of the second scan signal.       The method of claim 1,      And the width of the first scan signal is substantially the same as the width of the scan signal supplied from the subfields of the first subfield group. The method of claim 1, And a total number of the sustain signals supplied from the subfields of the first subfield group and the first subfield of the second subfield group is 50 or more times.

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