KR20090118370A - Menufacturing method of nitride semiconductor light emitting device and nitride semiconductor light emitting device by the same - Google Patents

Abstract

PURPOSE: A manufacturing method of a nitride semiconductor light emitting device and a nitride semiconductor light emitting device manufactured by the same are provided to improve light emitting efficiency by using a non-polar m surface. CONSTITUTION: An n-type nitride semiconductor layer is grown in order to form m surface on c surface of a sapphire substrate(100). An active layer(104) is grown in order to cover c surface and m surface of the n-type nitride semiconductor layer(103). A p-type nitride semiconductor layer(105) is grown in order to cover c surface and m surface of the active layer. The c surface of the active layer and the n-type nitride semiconductor layer is exposed to outside by removing a part of the active layer and the p-type semiconductor layer. An n-type electrode is formed on the c surface of the exposed n-type semiconductor layer. A p-type electrode(107) is formed on the m surface of the p-type semiconductor layer.

Description

Nitride Semiconductor Light Emitting Device and Nitride Semiconductor Light Emitting Device by the Same

A method of manufacturing a nitride semiconductor light emitting device and a nitride semiconductor light emitting device manufactured thereby.

In general, the group III nitride semiconductor has a characteristic of emitting a wide range of light not only in the entire visible light region, but also in the ultraviolet region, and has been widely spotlighted as a light emitting device material for implementing cyan. Nitride semiconductors are mainly grown on heterogeneous substrates such as sapphire (Al ₂ O ₃ ) or silicon carbide (SiC), vapor phase growth methods such as metal organic chemical vapor deposition (MOCVD), hydrogen vapor phase epitaxy (HVPE), or MBE (Molecular). It is grown using the Beam Epitaxy method.

GaN crystals generally form elements on a polar plane called the c plane (0001 plane) of a GaN crystal. In this case, the nonpolar plane refers to the plane in the normal direction with respect to the polar plane, and the semipolar plane refers to the plane inclined with respect to the polar plane. As such, in the related art, nitride single crystals grown in the c-axis direction of the hetero substrate are mainly used as nitride light emitting devices, but in this case, since they exhibit strong piezoelectricity, there is a problem that the efficiency of the light emitting devices is lowered. . That is, in the case of the c plane nitride layer, due to the inherent properties of GaN, an electric field due to a piezoelectric effect, i.e., a "piezoelectric field", is applied in the opposite direction to the external electric field inside the active layer. As shown in FIG. 1A, the wave functions of electrons and holes are spatially displaced, thereby reducing recombination efficiency.

In recent years, in order to control such polarization characteristics and increase luminous efficiency, a method of growing and applying a non-polar nitride layer of a surface or m surface to a light emitting device has been actively explored. In the case of the non-polar nitride layer, since there is no polarization in the crystal direction itself, unlike the polar nitride layer, no electric field is applied to the inside. Therefore, in the active layer to which the non-polar nitride layer is applied, the wave functions of electrons and holes can also almost match, as shown in FIG. 1B.

However, the m plane (10-10), the nitride layer is a non-polar surface having a lattice constant of 10.368Å to 6.368Å, c-axis direction with the a-axis direction, and a substrate for growth of LiAlO _2, m γ the surface plane ZnO, Only substrates such as m-side SiC and the like have been used experimentally. FIG. 2 schematically shows the bonding relationship between atoms in the case of growing m-plane GaN on a LiAlO ₂ substrate having a γ-plane. However, LiAlO ₂ substrates are too expensive and chemically unstable and readily degrade at GaN growth temperatures. In particular, the LiAlO ₂ substrate has a problem of easily reacting with water. In addition, ZnO substrates are chemically unstable, and SiC substrates are also limited in area like ZnO substrates, and thus, there is a great difficulty in utilizing m-plane nitride semiconductor growth.

The present invention is to solve the above problems, an object of the present invention to provide a method for manufacturing a nitride semiconductor light emitting device that can improve the luminous efficiency by using a non-polar m plane. In addition, another object of the present invention is to provide a nitride semiconductor light emitting device implemented by the manufacturing method.

In order to achieve the above object, one aspect of the present invention,

Growing an n-type nitride semiconductor layer on a c surface of the sapphire substrate such that a part of its side forms an m surface, and growing an active layer to cover the c surface and the m surface of the n-type nitride semiconductor layer; Growing a p-type nitride semiconductor layer to cover the c and m surfaces of the active layer, and partially removing the active layer and the p-type semiconductor layer to expose the n-type nitride semiconductor layer and the c surface of the active layer to the outside, respectively And forming a n-type electrode on an exposed c surface of the n-type semiconductor layer and forming a p-type electrode on an m surface of the p-type semiconductor layer. do.

In view of the structure of the nitride semiconductor light emitting device, the n-type nitride semiconductor layer preferably has a certain thickness. Accordingly, the growing of the n-type nitride semiconductor layer is preferably performed by a hybrid vapor deposition (HVPE) process. Specifically, the step of growing the n-type nitride semiconductor layer is preferably performed so that the thickness is 10㎛ or more.

Preferably, partially removing the active layer and the p-type semiconductor layer to expose the n-type nitride semiconductor layer and the c surface of the active layer to the outside, respectively, the exposed n-type nitride semiconductor layer and the active layer c The surface and the c surface of the remaining p-type semiconductor layer may be formed to be coplanar with each other.

In order to obtain a highly efficient reflective structure, before forming the n-type electrode, the method may further include etching the c surface of the exposed n-type nitride semiconductor layer to form a V-shaped groove. In this case, the n-type electrode may be formed along the shape of the V-shaped groove. In addition, the n-type electrode is preferably a highly reflective metal layer.

Preferably, growing the n-type nitride semiconductor layer may include growing a n-type nitride semiconductor layer through an open region of the dielectric pattern after forming a dielectric pattern on the c surface of the sapphire substrate. . In this case, the dielectric pattern may be a plurality of stripe patterns formed spaced apart from each other. In addition, each of the dielectric patterns may have a width of 5 to 20 μm. In addition, the dielectric pattern may have a distance between 5 to 20 μm between adjacent patterns.

Meanwhile, before growing the n-type nitride semiconductor layer, the method may further include growing a nitride buffer layer on the c surface of the sapphire substrate. The method may further include bonding a sub-mount substrate to the n-type electrode after the forming of the n-type electrode.

According to another aspect of the present invention, an n-type nitride semiconductor layer, an active layer formed on the m surface of the n-type nitride semiconductor layer, a p-type nitride semiconductor layer formed on the m surface of the active layer, and the n-type nitride semiconductor layer It provides an nitride semiconductor light emitting device comprising an n-type electrode formed on the c surface of the p-type electrode formed on the m surface of the p-type semiconductor layer.

In this case, the width of the m surface of the n-type nitride semiconductor layer is 10 µm or more to ensure a light emission area of a certain level or more.

Preferably, the active layer may be formed on both m surfaces of the n-type nitride semiconductor layer. Furthermore, the p-type nitride semiconductor layer may be formed on both m surfaces of the active layer.

As described above, according to the present invention, a nitride semiconductor light emitting device having improved luminous efficiency can be obtained by using a nonpolar m plane. In particular, the present invention provides a method in which a non-polar m plane can be used as an easier method in manufacturing a nitride semiconductor light emitting device.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. However, embodiments of the present invention may be modified in various other forms, and the scope of the present invention is not limited to the embodiments described below. In addition, the embodiments of the present invention are provided to more completely explain the present invention to those skilled in the art. Accordingly, the shape and size of elements in the drawings may be exaggerated for clarity, and the elements denoted by the same reference numerals in the drawings are the same elements.

3A to 3G are cross-sectional views of processes illustrating a method of manufacturing a nitride semiconductor light emitting device according to an embodiment of the present invention.

First, as shown in FIG. 3A, the sapphire substrate 100 is provided to form the dielectric pattern 102 on the c surface. The sapphire substrate 100 is a crystal having hexagonal-Rhombo R3c symmetry and has a lattice constant of 13.001Å in the c-axis direction and 4.765 4. in the a-axis direction, and C (0001). ) Surface, A (1120) surface, R (1102) surface, and the like. In this case, the C surface of the sapphire substrate 100 is relatively easy to grow a nitride thin film, and is mainly used as a nitride growth substrate because it is stable at high temperatures.

The dielectric pattern 102 may include a plurality of open areas for manufacturing a plurality of light emitting devices at a time, and a stripe pattern may be employed as a preferred form for separating light emitting devices and forming electrodes in the areas therebetween. The dielectric pattern 102 may be formed using a material such as SiO _2, and a desired shape may be appropriately obtained by a photolithography process. Meanwhile, although not necessarily required in the present invention, the nitride buffer layer 101 made of undoped GaN, n-type GaN, or the like may be grown on the sapphire substrate 100 before the dielectric pattern 102 is formed. Can be.

Next, as shown in FIG. 3B, the n-type nitride semiconductor layer 103 is grown through the open region of the dielectric pattern 102. The n-type nitride semiconductor layer 103 has an Al _x In _y Ga _(1-xy) N composition formula, where 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, and 0 ≦ x + y ≦ 1, respectively. The n-type dopant and the p-type dopant may be made of a semiconductor material doped with GaN. The n-type nitride semiconductor layer 103 is grown on the c surface of the sapphire substrate 100 so that the upper surface becomes the c surface. In particular, in this embodiment, the m surface 10-10 is exposed on some of the side surfaces. . The growth of the m plane to be exposed may be performed by appropriately adjusting the growth conditions, and the m plane is a nonpolar plane, and a light emitting device based on the m plane may have higher luminous efficiency than the polar plane.

In the present embodiment, the light emitting device is obtained using the m plane, but the m plane is formed on the side surface of the n-type nitride semiconductor layer 103. Therefore, it is preferable to grow the n-type nitride semiconductor layer 103 to be relatively thick so that the width of the m surface becomes a predetermined level or more in view of ensuring the light emitting area. In this context, in the present embodiment, it is more preferable to use a hybrid vapor deposition (HVPE) process rather than an organometallic vapor deposition (MOCVD) to grow the nitride semiconductor layer.

Next, as shown in FIG. 3C, the active layer 104 and the p-type nitride semiconductor layer 105 are sequentially grown on the n-type nitride semiconductor layer 103. More specifically, the active layer 104 and the p-type nitride semiconductor layer 105 are executed to cover the side surface (m surface) in addition to the top surface (c surface) of the n-type nitride semiconductor layer 103 and the active layer 104, respectively. . As described above, in the present embodiment, since the structure stacked in the m-plane direction of the nitride semiconductor is used as the light emitting element, the n-type nitride semiconductor layer (the n-type nitride semiconductor layer of the active layer 104 and the p-type nitride semiconductor layer 105 ( A portion formed on the side of 103 is included in the light emitting element. Accordingly, since the thicknesses of the side surfaces of the active layer 104 and the p-type nitride semiconductor layer 105 are also more than a predetermined level, it is preferable in terms of securing the light emitting area, so that the desired thickness can be more easily obtained using the HVPE process. will be.

Next, as illustrated in FIG. 3D, etching is performed from the top surface of the p-type nitride semiconductor layer 105 to expose the c surface of the n-type nitride semiconductor layer 103 to the outside. The etching process may mainly use a dry etching process, and for example, a method such as inductively coupled plasma-reactive ion etching (ICP-RIE) may be used. In this step, exposing the c surface of the n-type nitride semiconductor layer 103 to the outside is to form the n-type electrode on the c surface rather than the m surface due to the structural characteristics.

By the etching process, the c surface of the active layer 104 is exposed in addition to the n-type nitride semiconductor layer 103. 3E shows a structure after the etching process, and it can be seen that the c planes of the n-type nitride semiconductor layer 103, the active layer 104, and the p-type nitride semiconductor layer 105 form the same plane. have. As shown in FIG. 3E, in contrast to the conventional structure in which an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer are sequentially grown on a sapphire substrate, in the present embodiment, among the side surfaces of the n-type nitride semiconductor layer 103. A structure in which the active layer 104 and the p-type nitride semiconductor layer 105 are formed on two m surfaces facing each other can be obtained. Accordingly, the stacked structure of the light emitting structure is formed based on the non-polar m surface, and thus the nitride semiconductor light emitting device using the light emitting structure can obtain high light emission efficiency without being affected by polarization characteristics.

Subsequently, as illustrated in FIG. 3F, the n-type electrode 106 is formed on the c surface of the exposed n-type nitride semiconductor layer 104 by deposition, sputtering, or the like. Although the present invention is not limited by the shape or material of the n-type electrode 106 proposed in the present embodiment, the n-type electrode 106 reflects the light emitted from the active layer 104 to the sapphire substrate 100. It is preferable to form a large area as much as possible, and also to be made of a highly reflective metal, such as aluminum, having a high reflectance.

Next, as shown in FIG. 3G, the p-type electrode 107 is formed on the m surface of the p-type nitride semiconductor layer 105. In this case, in FIG. 3G, the light emitting device structure is illustrated upside down in addition to the addition of the p-type electrode 107. Accordingly, the light emitted from the active layer 104 is formed by the n-type and p-type electrodes 106 and 107. It can be seen that it is reflected and emitted upward. In the present embodiment, the p-type electrode 107 is formed after the n-type electrode 106 is formed, but the order of electrode formation can be changed. The p-type electrode 107 may be formed by depositing or sputtering a metal such as silver (Ag) in consideration of an ohmic forming function and a light reflecting function.

In the present embodiment, the manufacturing of one light emitting device has been described. However, as shown in FIG. 5, in the case of manufacturing a plurality of light emitting devices on the sapphire substrate 100 at once, the dielectric pattern 102 may emit light from each other. Functions to distinguish To this end, the dielectric pattern 102 may have a width and a spacing of about 5 to 20 μm to secure a space between adjacent light emitting devices, thereby forming the p-type electrode 107 of the light emitting structure. It can be easily formed from the side to the lower portion (side adjacent to the sapphire substrate).

As described above, in the case of the nitride semiconductor light emitting device manufactured according to the present embodiment, the nitride semiconductor layer was grown on the c plane of the sapphire substrate, but the nitride semiconductor layer was also grown on the m plane, and only the m plane growth structure was used for the light emitting device. It features. Accordingly, in order to obtain an m plane nonpolar nitride semiconductor light emitting device, there is no need to use LiAlO _{2 on} the γ plane, ZnO on the m plane, m surface SiC, or the like. Conventionally, the c plane of the sapphire substrate can be used, so that the m plane nonpolar nitride semiconductor light emitting device can be easily obtained, whereby a large improvement in luminous efficiency can be expected.

4A to 4C are cross-sectional views of processes for illustrating a method of manufacturing a nitride semiconductor light emitting device according to an embodiment modified from the embodiment of FIG. 3. The difference from the embodiment of FIG. 3 lies in the shape of the n-type electrode, and the rest is the same, and the description thereof is as described above. First, as shown in FIG. 4A, after forming the photoresist pattern P, only the c surface of the exposed n-type nitride semiconductor layer 103 is etched. Specifically, the n-type nitride semiconductor layer 103 to have a V-shaped groove, ICP can be used as an etching method.

Next, as shown in FIG. 4B, the n-type electrode 106 is formed along the V-shaped groove, and as shown in FIG. 4C, the p-type electrode 107 is formed. As in the present embodiment, as the n-type electrode 106 has a V shape, the light reflection efficiency can be further improved. 4D is not an essential step in the present embodiment. In FIG. 4C, the sapphire substrate 100 and the nitride buffer layer 101 are removed. When the nitride semiconductor layer is used as a light emitting device structure after growth, the sapphire substrate 100 and the nitride buffer layer 101 may be removed, and thus the sapphire substrate 100 may be removed through a laser lift-off (LLO) or an appropriate etching process. The nitride buffer layer 101 can be removed.

5 is a cross-sectional view showing a nitride semiconductor light emitting device according to another embodiment of the present invention. In the present embodiment, a plurality of nitride semiconductor light emitting devices are included on one sapphire substrate 500 and nitride buffer layer 501. In this case, each of the nitride semiconductor light emitting devices can be understood to be the same as the structure described with reference to FIG. 4, and each of the n-type nitride semiconductor layer 503 having a V-shaped groove and the m of the n-type nitride semiconductor layer 503 An active layer 504, a p-type nitride semiconductor layer 505, and a p-type electrode 507, which are sequentially formed on a surface, and an n-type electrode 506 at a V-shaped groove of the n-type nitride semiconductor layer 503. ) Is formed. The n-type electrode 506 may be connected to a power source through a submount substrate 508 connected thereto, and the p-type electrode 507 may be connected to the p-type common electrode 510. In addition, an insulating layer 509 is interposed between the p-type common electrode 510 and the submount 508. In the nitride semiconductor light emitting device according to the present embodiment, a decrease in luminous efficiency due to the piezoelectric effect can be minimized by using an m-plane nonpolar nitride semiconductor layer. In addition, a high light reflecting structure can be provided to increase the light extraction efficiency.

The present invention is not limited by the above-described embodiment and the accompanying drawings, but is intended to be limited by the appended claims. Accordingly, various forms of substitution, modification, and alteration may be made by those skilled in the art without departing from the technical spirit of the present invention described in the claims, which are also within the scope of the present invention. something to do.

1A and 1B are graphs showing energy band diagrams of active layers and wave functions of electrons and holes for explaining the influence of piezoelectric fields.

FIG. 2 schematically shows the bonding relationship between atoms when growing GaN on a γ-plane LiAlO ₂ substrate.

3A to 3G are cross-sectional views of processes illustrating a method of manufacturing a nitride semiconductor light emitting device according to an embodiment of the present invention.

4A to 4C are cross-sectional views of processes for illustrating a method of manufacturing a nitride semiconductor light emitting device according to an embodiment modified from the embodiment of FIG. 3.

5 is a cross-sectional view showing a nitride semiconductor light emitting device according to another embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

100, 500: sapphire substrate 101, 501: nitride buffer layer

102 and 502 dielectric patterns 103 and 503 n-type nitride semiconductor layer

104, 504: active layer 105, 505: p-type nitride semiconductor layer

106, 506: n-type electrode 107, 507: p-type electrode

508: submount 509: insulating layer

510 p-type common electrode

Claims (19)

Growing an n-type nitride semiconductor layer such that a part of its side forms an m surface on the c surface of the sapphire substrate; Growing an active layer to cover c and m surfaces of the n-type nitride semiconductor layer; Growing a p-type nitride semiconductor layer to cover c and m surfaces of the active layer; Partially removing the active layer and the p-type semiconductor layer to expose the n-type nitride semiconductor layer and the c surface of the active layer to the outside; Forming an n-type electrode on the c surface of the exposed n-type semiconductor layer; And Forming a p-type electrode on the m surface of the p-type semiconductor layer; Nitride semiconductor light emitting device manufacturing method comprising a. The method of claim 1, Growing the n-type nitride semiconductor layer is performed by a hybrid vapor deposition method (HVPE) process. The method of claim 1, And growing the n-type nitride semiconductor layer so as to have a thickness of 10 μm or more. The method of claim 1, Partially removing the active layer and the p-type semiconductor layer to expose the n-type nitride semiconductor layer and the c surface of the active layer to the outside, And the c surface of the exposed n-type nitride semiconductor layer and the active layer and the c surface of the remaining p-type semiconductor layer are coplanar with each other. The method of claim 1, Before forming the n-type electrode, And etching the c surface of the exposed n-type nitride semiconductor layer to form a V-shaped groove. The method of claim 5, And the n-type electrode is formed along the shape of the V-shaped groove. The method of claim 1, The n-type electrode is a nitride semiconductor light emitting device manufacturing method, characterized in that the highly reflective metal layer. The method of claim 1, Growing the n-type nitride semiconductor layer, And forming a dielectric pattern on c surface of the sapphire substrate and growing an n-type nitride semiconductor layer through an open region of the dielectric pattern. The method of claim 8, The dielectric pattern is a nitride semiconductor light emitting device manufacturing method characterized in that the plurality of stripe patterns formed spaced apart from each other. The method of claim 8, The dielectric pattern is a nitride semiconductor light emitting device manufacturing method, characterized in that each width of 5 ~ 20㎛. The method of claim 8, The dielectric pattern is a nitride semiconductor light emitting device manufacturing method, characterized in that the distance between the adjacent pattern is 5 ~ 20㎛. The method of claim 1, And growing a nitride buffer layer on c surface of the sapphire substrate before growing the n-type nitride semiconductor layer. The method of claim 1, After forming the n-type electrode, And attaching the sub-mount substrate to the n-type electrode. an n-type nitride semiconductor layer; An active layer formed on the m surface of the n-type nitride semiconductor layer; A p-type nitride semiconductor layer formed on the m surface of the active layer; An n-type electrode formed on c surface of the n-type nitride semiconductor layer; And A p-type electrode formed on the m surface of the p-type semiconductor layer; Nitride semiconductor light emitting device comprising a. The method of claim 14, A nitride semiconductor light emitting device, characterized in that the width of the m surface of the n-type nitride semiconductor layer is 10㎛ or more. The method of claim 14, The n-type electrode is a nitride semiconductor light emitting device, characterized in that the highly reflective metal layer. The method of claim 14, And the active layer is formed on both m surfaces of the n-type nitride semiconductor layer. The method of claim 17, And the p-type nitride semiconductor layer is formed on both m planes of the active layer. The method of claim 14, A c-shaped groove is formed on c surface of the n-type nitride semiconductor layer, and the n-type electrode is formed along the shape of the groove.

Images