KR20090103506A - Method of fabricating wiring pattern and method of fabricating wafer level package using the same - Google Patents

Abstract

PURPOSE: A method of fabricating wiring pattern and a method of fabricating wafer level package using the same are provided to prevent wafer broken since there is no need to transfer a wafer along each process. CONSTITUTION: A method of fabricating wiring pattern and a method of fabricating wafer level package using the same are comprised of the steps: adhering a metal layer to a base(Base) film(102); forming a photosensitive film(106) and a mask for a wiring pattern successively on the metal layer; etching the photosensitive film by using the mask for the wiring pattern as an etch mask; removing the mask for wiring pattern; and forming the wiring pattern(110) on the film and etching the metal layer by using the photosensitive film as the etch mask.

Description

Wiring pattern forming method and manufacturing method of wafer level package using same {METHOD OF FABRICATING WIRING PATTERN AND METHOD OF FABRICATING WAFER LEVEL PACKAGE USING THE SAME}

The present invention relates to a wiring pattern forming method and a wafer level package manufacturing method using the same, and more particularly, by using a wiring pattern formed by redistribution to prevent damage to the wafer, and to reduce yield and cost. The present invention relates to a method of forming a wiring pattern and a method of manufacturing a wafer level package using the same.

The trend in today's electronics industry is to make products that are lighter, smaller, faster, more versatile, more powerful and more reliable. One of the key technologies that enables these product design goals is package assembly technology. This package assembly technique is a technique for securing the operation reliability of the semiconductor chip by protecting the semiconductor chip on which the integrated circuit is formed through the wafer assembly process from the external environment and easily mounted on the substrate.

Existing packages are manufactured by cutting a wafer into separate semiconductor chips and then packaging the semiconductor chips. However, the packaging process itself includes many unit processes, that is, chip attaching, wire bonding, molding, trim / forming, etc., and thus, a conventional package in which each packaging process must be performed for each semiconductor chip. The manufacturing method has a problem that the packaging time for all the semiconductor chips is too large, considering the number of semiconductor chips obtained from one wafer.

Therefore, in recent years, assembling does not proceed in a state of being separated into individual semiconductor chips, and wafer level packages manufactured by rewiring in a wafer state, formation of ball-type external connection terminals, and work of separating individual semiconductor chips (Wafer Level) Package technology has been proposed.

On the other hand, briefly looking at the manufacturing method of the wafer-level package, first, an insulating film is formed on the entire upper surface of the semiconductor chip having a circuit pattern formed thereon, the bonding pad is exposed through a photo process, and an electrical signal is formed on a portion of the upper surface of the semiconductor chip formed of the insulating film. A metal layer is deposited for the connection.

Next, after plating the metal layer and the ball land deposited on the semiconductor chip by using a photo process again, the metal layer is etched to expose the region where the solder bumps are to be formed and bonded with the region where the solder bumps are to be formed. The redistribution layer is formed so that the pads are electrically connected to each other.

Then, a solder mask is formed over the entire area except the region where the solder bumps are to be formed, and the solder is attached to the exposed solder bumps to mount, and then sawed into each unit package. Prepare a wafer level package.

However, although not shown and described in detail, conventional wafer-level packages as described above are mostly formed on the wafer, during the manufacturing process, to form a wiring pattern by plating and etching through the photosensitive film, wherein the pattern is formed. Since lithography, development, plating, strip, and etching processes must be performed to form a wafer, chemicals used during the above processes may damage the wafer.

In addition, in order to perform various processes for forming the wiring pattern as described above, since the wafer is moved according to each process, a cracking phenomenon of the wafer occurs accordingly.

Accordingly, the wafer cracking phenomenon lowers the yield of the wafer, thereby raising the process terminal.

The present invention provides a wiring pattern forming method that can prevent damage such as cracking of a wafer, and a wafer level package manufacturing method using the same.

In addition, the present invention provides a wiring pattern forming method and a method of manufacturing a wafer level package using the same, which can prevent damage such as cracking of the wafer as described above, thereby preventing a decrease in wafer yield and a process cost.

The wiring pattern forming method according to the present invention comprises the steps of: attaching a metal film on the base film; Sequentially forming a photoresist film and a wiring pattern forming mask on the metal film; Etching the photosensitive film by using the wiring pattern forming mask as an etching mask; Removing the wiring pattern forming mask; Etching the metal layer using the photosensitive layer as an etching mask to form a wiring pattern on the upper surface of the film; And removing the photosensitive film.

The photosensitive film is formed of a polymer.

The wiring pattern forming mask includes redistribution.

The base film is characterized in that consisting of UV (Ultra Violet) film.

In addition, a method of manufacturing a wafer level package using the wiring pattern forming method according to the present invention includes a base film having a wiring pattern formed by the configuration of claim 1, wherein each of the semiconductor chips is formed on a wafer composed of a plurality of semiconductor chips. Attaching the wiring patterns to correspond to each other; And sawing the wafer at the semiconductor chip level.

The base film is formed of a UV film.

Between the step of attaching the base film having the wiring pattern on the wafer consisting of a plurality of semiconductor chips so as to correspond between the respective semiconductor chip and the wiring pattern, and the step of sawing the wafer with the film attached to the semiconductor chip level, And removing the film of the portion where the connection terminal on the wafer is to be formed.

Removing the film of the portion where the connection terminal on the wafer is to be formed is performed by UV irradiation.

The present invention provides a wafer level package by attaching a film on which a wiring pattern is formed by redistribution on a wafer, thereby damaging the wafer due to chemicals used in various processes to form the wiring pattern in a conventional wafer level package. Can be prevented.

In addition, since the present invention does not need to move the wafer in accordance with each step of forming the wiring pattern, as in the prior art, to form the wiring pattern by attaching only the film having the wiring pattern formed thereon to manufacture the wafer level package. The cracking phenomenon of the wafer can be prevented.

Therefore, the present invention can prevent a decrease in the yield of the wafer, thereby minimizing the process cost.

1A to 1E are perspective views illustrating processes for forming a wiring pattern according to an exemplary embodiment of the present invention.

2A and 2B are perspective views illustrating a method of manufacturing a wafer level package according to an embodiment of the present invention.

3 is a plan view illustrating a method of manufacturing a wafer level package according to an embodiment of the present invention.

The present invention attaches a film on which a wiring pattern is formed by rewiring onto a wafer to manufacture a wafer level package.

In this way, unlike conventional wafer level packages manufactured by performing a process such as lithography, development, plating, stripping and etching through the photosensitive film to form a photoresist film directly on the wafer and to form a wiring pattern on the wafer. By attaching a film having a wiring pattern as described above onto a wafer to manufacture a wafer level package, damage to the wafer due to chemicals used to perform the processes may be prevented.

In addition, by manufacturing a wafer-level package by attaching only the film on which the wiring pattern is formed as described above, it is not necessary to move the wafer according to each process in order to form the wiring pattern as in the related art, thereby preventing the wafer from breaking. Can be.

Therefore, it is possible to prevent a decrease in the yield of the wafer, thereby minimizing the process cost.

Hereinafter, with reference to the accompanying drawings will be described in detail a preferred embodiment of the present invention.

In detail, Figures 1a to 1e is a perspective view for each process for explaining a wiring pattern forming method according to an embodiment of the present invention, as follows.

Referring to FIG. 1A, a metal film 104 made of a thin film is attached onto the base film 102. In this case, the base film 102 is used as a base film having a general adhesive force, or is used as a UV (Ultra Violet) film.

Referring to FIG. 1B, a photosensitive film 106 made of a polymer is formed on the base film 102 to which the metal film 104 made of the thin film is attached. Then, a wiring pattern is formed on the photosensitive film 106. A wiring pattern forming mask 108 having a pattern 110 having a predetermined shape for forming is formed.

In this case, the pattern 110 having a predetermined shape formed on the wiring pattern forming mask 108 is formed by redistribution.

Referring to FIG. 1C, the photosensitive film 106 is etched using the wiring pattern forming mask 108 as an etching mask.

Referring to FIG. 1D, the wiring pattern forming mask is removed, and then the metal film 104 is formed such that a wiring pattern having a predetermined shape is formed on the upper surface of the film 102 by using the etched photosensitive film 106 as a mask. Etch).

Referring to FIG. 1E, the photoresist layer 106 on the base film 102 on which the wiring pattern 150 formed by etching of the metal film is formed and the remaining metal layer on which the wiring pattern 150 is not formed are removed.

2A and 2B are perspective views illustrating processes for manufacturing a wafer level package using a wiring forming method according to an embodiment of the present invention, and FIG. 3 is a wafer level using the wiring forming method according to an embodiment of the present invention. As a plan view for explaining the manufacturing method of the package, this will be described.

Referring to FIG. 2A, a base film 102 having a wiring pattern 150 formed on an upper surface thereof is attached to a wafer 112 formed of a plurality of semiconductor chips (not shown) so as to correspond to each of the semiconductor chips.

In this case, when the base film 102 on which the wiring pattern 150 is formed is attached onto the wafer 112, the base film 102 is attached to coincide with a bonding pad (not shown) of each semiconductor chip on the wafer 112.

Here, the base film 102 is preferably used as a base film having a general adhesive force, or is used as a UV (Ultra Violet) film.

Meanwhile, after attaching the base film 102 on which the wiring pattern 150 is formed on the wafer 112, as shown in FIG. 3, a portion to which an external connection terminal such as a solder ball is attached, for example, a ball land B The portions of the film 102 to which the solder balls are attached may be selectively removed, and then the remaining portions of the film 102 may be removed to manufacture a wafer level package.

At this time, when the optional film 102 is removed, when the film 102 is a UV film, it is preferable to remove by UV irradiation method.

Referring to FIG. 2B, the wafer 112 having the film 102 attached thereto is sawed at the semiconductor chip level to complete a wafer level package according to an embodiment of the present invention.

As described above, according to the present invention, a film having a wiring pattern formed by redistribution as described above is attached to a wafer to manufacture a wafer level package, thereby forming a photosensitive film directly on a conventional wafer, and forming a wiring pattern on the wafer. To this end, it is possible to prevent damage to the wafer due to chemicals used to perform processes such as lithography, development, plating, stripping and etching through the photosensitive film.

In addition, by manufacturing a wafer-level package by attaching only the film on which the wiring pattern is formed as described above, it is not necessary to move the wafer according to each process in order to form the wiring pattern as in the related art, thereby preventing the wafer from breaking. Can be.

Therefore, it is possible to prevent a decrease in the yield of the wafer, thereby minimizing the process cost.

In the above-described embodiments of the present invention, the present invention has been described and described with reference to specific embodiments, but the present invention is not limited thereto, and the scope of the following claims is not limited to the scope of the present invention. It will be readily apparent to those skilled in the art that the present invention may be variously modified and modified.

Claims (8)

Attaching a metal film on a base film; Sequentially forming a photoresist film and a wiring pattern forming mask on the metal film; Etching the photosensitive film by using the wiring pattern forming mask as an etching mask; Removing the wiring pattern forming mask; Etching the metal layer using the photosensitive layer as an etching mask to form a wiring pattern on the upper surface of the film; And Removing the photosensitive film; Wiring pattern forming method comprising a. The method of claim 1, And the photosensitive film is formed of a polymer. The method of claim 1, And the wiring pattern forming mask comprises redistribution. The method of claim 1, The base film is a wiring pattern forming method, characterized in that consisting of UV (Ultra Violet) film. Attaching a base film having a wiring pattern formed by the configuration of claim 1 to correspond between the respective semiconductor chips and the wiring patterns on a wafer made of a plurality of semiconductor chips; And Sawing the wafer at the semiconductor chip level; Method of manufacturing a wafer level package comprising a. The method of claim 5, wherein The base film is a manufacturing method of the wafer level package, characterized in that formed by UV film. The method of claim 5, wherein Between the step of attaching the base film having the wiring pattern on the wafer consisting of a plurality of semiconductor chips so as to correspond between the respective semiconductor chip and the wiring pattern, and the step of sawing the wafer with the film attached to the semiconductor chip level, Removing the film of the portion where the connection terminal on the wafer is to be formed; Method of manufacturing a wafer-level package further comprising. The method of claim 7, wherein Removing the film of the portion where the connection terminal on the wafer is to be formed, characterized in that for performing a wafer level package, characterized in that performed by UV irradiation.