KR20090080864A - Semiconductor device and method for manufacturing the same - Google Patents

Abstract

A semiconductor device and a manufacturing method thereof are provided to easily perform a fuse cutting process by relieving a stress applied to a bottom part of a fuse. A semiconductor device includes a dummy isolation film(120), a dummy tap(130), an interlayer insulation film, and a fuse(140). The dummy isolation film is formed on a top part of a semiconductor substrate(100). The dummy tap is formed in both sides of the dummy isolation film. The interlayer insulation film is formed on a top part of the semiconductor substrate including the dummy isolation film and the dummy tap. The fuse is formed on a top part of the interlayer insulation film.

Description

Semiconductor device and method for manufacturing same {SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME}

1 is a layout showing a semiconductor device according to the prior art.

2 is a cross-sectional view showing a problem of a semiconductor device according to the prior art.

3 is a layout showing a semiconductor device and a method of forming the same according to the present invention.

The present invention relates to a semiconductor device and a method of forming the same, and does not form a dummy gate pattern formed under the fuse to prevent cracking due to the dummy gate pattern, and adds a dummy tab in the width direction of the dummy device isolation layer. A semiconductor device which improves the uniformity of the fuse CD by preventing area pattern defects and reduces the stress applied to the lower part of the fuse, thereby making the fuse cutting process easier, and improves the reliability of the semiconductor device by improving the yield. It relates to a method of forming.

In semiconductor devices such as DRAM (DRAM), there are memory cells that do not operate partially inside the fabricated chip, and these defective memory cells are repaired by chip manufacturing. By replacing the redundancy cells previously made in the city, the actual chip has no effect on the operation, and the method increases the yield of the manufactured chip.

In the repair process, a program for selecting a bad memory cell and replacing a corresponding address with an address signal of a redundancy cell is performed in an internal circuit. Therefore, when an address signal corresponding to a bad line is input in actual use, the selection is switched to the line of the redundancy cell instead.

Among the repair program methods, the metal wires are blown off by the laser beam, and the metal wires broken by the laser beam are called fuses. It is called a fuse box.

In general, the fuse may be formed by a separate manufacturing process, but may also be formed together with the same material as the plate layer or the metal wiring during the plate layer or the metal wiring manufacturing process.

First, the fuse is formed in the same process as the metal wiring forming process of the cell region on the semiconductor substrate provided with a predetermined substructure.

1 is a layout showing a semiconductor device according to the prior art.

Referring to FIG. 1, the dummy device isolation layer 30 and the dummy gate pattern 20 are formed on the semiconductor substrate 10 on which the lower structure is formed.

Subsequently, an interlayer insulating film is formed on the semiconductor substrate 10 including the dummy device isolation layer 30 and the dummy gate pattern 20, and a fuse 40 is formed on the interlayer insulating film.

Here, the dummy device isolation layer 30 and the dummy gate pattern 20 may prevent the influence of the underlying structure when the interlayer insulating layer for forming the fuse 40 is chemically mechanical polished (CMP), and the CD of the fuse 40 may be critical dimension) Formed to ensure uniformity.

In addition, the fuse 40 is formed by forming a conductive film on the interlayer insulating film and etching the conductive film by an etching process using a fuse mask. Here, the case where the fuse 40 is formed using the 1st metal line M1 is demonstrated, for example.

2 is a cross-sectional view showing a problem of a semiconductor device according to the prior art.

Referring to FIG. 2, it can be seen that a crack is generated by the dummy gate pattern 20 formed in the lower layer of the fuse 40. That is, the dummy gate pattern 20 formed at the lower end of the fuse 40 is damaged when the fuse 40 is blown by a laser, thereby causing cracks. Therefore, the resistance of the semiconductor device is increased, the semiconductor device is abnormally operated, which causes a decrease in the manufacturing yield of the semiconductor device and a decrease in reliability.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor device and a method of forming the same, which improves the CD uniformity of the fuse and reduces the stress applied to the lower part of the fuse to facilitate the fuse cutting process.

The semiconductor device according to the present invention

A dummy device isolation layer formed on the semiconductor substrate;

Dummy tabs formed on both sides of the dummy device isolation layer;

An interlayer insulating layer formed on the semiconductor substrate including the dummy device isolation layer and the dummy tab; And

And a fuse formed on the interlayer insulating layer.

In addition, the width of the dummy device isolation layer may be 1.2 to 2.0 times the width of the fuse.

In addition, the method of manufacturing a semiconductor device according to the present invention

Forming a dummy device isolation layer on the semiconductor substrate and dummy tabs on both sides of the dummy device isolation layer;

Forming an interlayer insulating layer on the semiconductor substrate including the dummy device isolation layer and the dummy tab; And

Forming a fuse on the interlayer insulating layer.

In addition, the step of forming the fuse

Forming a conductive film on the interlayer insulating film; And

Etching the conductive film in an etching process using a fuse mask, Forming the dummy device isolation layer and the dummy tab

Etching the semiconductor substrate in the fuse blowing region to form a trench; And

Burying the trench using an insulating material;

The width of the dummy device isolation layer may be 1.2 to 2.0 times the width of the fuse.

Hereinafter, a semiconductor device and a method of forming the same according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

3 is a layout illustrating a semiconductor device and a method of forming the same according to the present invention, and FIG. 4 is a cross-sectional view taken along line AA ′ of FIG. 3.

3 and 4, the dummy device isolation layer 120 is formed on the semiconductor substrate 100 on which the lower structure is formed.

Subsequently, an interlayer insulating layer is formed on the semiconductor substrate 100 including the dummy device isolation layer 120, and a fuse 140 is formed on the interlayer insulating layer. At this time, the dummy gate pattern formed in the undefined portion of the fuse 140 is not formed. Therefore, the process can be simplified, and a problem that a crack occurs due to a dummy gate pattern when blowing the fuse 140 can be solved.

Here, the dummy device isolation layer 120 is formed by partially etching the semiconductor substrate 100 in the blowing region of the region where the fuse 140 is formed, and forming a trench, and then filling an insulating material. In this case, the width of the dummy device isolation layer 120 may be formed to be 1.2 to 2.0 times the width of the fuse 140.

Meanwhile, when forming the dummy device isolation layer 120, a dummy tab 130 is further formed in the width direction of the dummy device isolation layer 120 to define an active region defined by the dummy device isolation layer 120. prevents pattern defects in the area).

In addition, the fuse 140 is formed by forming a conductive film on the interlayer insulating film and etching the conductive film by an etching process using a fuse mask. Here, an example in which the fuse 140 is formed using the first metal line M1 will be described.

As described above, the present invention does not form a dummy gate pattern formed in the lower portion of the fuse to prevent cracking due to the dummy gate pattern, and by adding a dummy tab in the width direction of the dummy device isolation layer to prevent the defective active region pattern. Disclosed is a technique for improving the uniformity of the fuse CD and relieving stress applied to the lower part of the fuse to facilitate the fuse cutting process, and to improve the yield to improve the reliability of the semiconductor device.

The semiconductor device and the method of forming the same according to the present invention do not form a dummy gate pattern formed under the fuse to prevent cracking by the dummy gate pattern, and add a dummy tab in the width direction of the dummy device isolation layer to form an active region. It prevents a bad pattern to improve the uniformity of the fuse CD and to reduce the stress applied to the lower part of the fuse to facilitate the fuse cutting process, improve the yield and improve the reliability of the semiconductor device. .

In addition, a preferred embodiment of the present invention is for the purpose of illustration, those skilled in the art will be able to various modifications, changes, substitutions and additions through the spirit and scope of the appended claims, such modifications and changes are the following claims It should be seen as belonging to a range.

Claims (6)

A dummy device isolation layer formed on the semiconductor substrate; Dummy tabs formed on both sides of the dummy device isolation layer; An interlayer insulating layer formed on the semiconductor substrate including the dummy device isolation layer and the dummy tab; And And a fuse formed on the interlayer insulating layer. The method of claim 1, The width of the dummy device isolation layer is a semiconductor device, characterized in that 1.2 to 2.0 times the fuse CD. Forming a dummy device isolation layer on the semiconductor substrate and dummy tabs on both sides of the dummy device isolation layer; Forming an interlayer insulating layer on the semiconductor substrate including the dummy device isolation layer and the dummy tab; And And forming a fuse on the interlayer insulating film. The method of claim 3, wherein Forming the fuse Forming a conductive film on the interlayer insulating film; And And etching the conductive film by an etching process using a fuse mask. The method of claim 3, wherein Forming the dummy device isolation layer and the dummy tab Etching the semiconductor substrate in the fuse blowing region to form a trench; And Embedding the trench using an insulating material. The method of claim 3, wherein The width of the dummy device isolation layer is a semiconductor device manufacturing method, characterized in that 1.2 to 2.0 times the width of the fuse.

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