KR20090073707A - Array substrate of in-plane switching mode liquid crystal display device - Google Patents

Abstract

An array substrate of an in-plane switching mode liquid crystal display device is provided to extend vertical units of a common electrode and a pixel electrode to an upper part where the first and second common lines are overlapped, thereby improving aperture. A pixel electrode(170) comprises an extension unit(170a) and a plurality of vertical units(170b). The extension unit comprises a plurality of first depressed parts corresponding to an upper part overlapped with the second common line(150b). The vertical units are vertically branched from the extension unit. A common electrode is contacted with the first common line. The common electrode comprises the extension unit and the vertical units. The extension unit includes the second depressed parts corresponding to an upper part overlapped with the first common line.

Description

Array Substrate of In-Plane Switching Mode Liquid Crystal Display Device}

The present invention relates to a liquid crystal display device, and more particularly, to improving an aperture ratio in an array substrate for a transverse electric field type liquid crystal display device in which a common electrode and a pixel electrode are formed on the same plane.

In general, the driving principle of the liquid crystal display device uses the optical anisotropy and polarization of the liquid crystal. Since the liquid crystal is thin and long in structure, the liquid crystal has directivity in the arrangement of molecules, and the direction of the molecular arrangement can be controlled by artificially applying an electric field to the liquid crystal.

Accordingly, when the molecular arrangement direction of the liquid crystal is arbitrarily adjusted, the molecular arrangement of the liquid crystal is changed, and light is refracted in the molecular arrangement direction of the liquid crystal due to optical anisotropy to express image information.

Currently, an active matrix liquid crystal display (AM-LCD) in which a thin film transistor and pixel electrodes connected to the thin film transistor are arranged in a matrix manner has been attracting the most attention because of its excellent resolution and ability to implement video.

The liquid crystal display device includes an upper substrate, which is a color filter substrate on which a common electrode is formed, and a lower substrate, which is an array substrate on which pixel electrodes are formed, and a liquid crystal filled between the upper and lower substrates.

In the liquid crystal display device, the common electrode and the pixel electrode are vertically formed, and when the liquid crystal is driven by vertical vertical electric fields generated therein, there are vertices such as transmittance and aperture ratio, but they have excellent viewing angle characteristics. It has a disadvantage.

Therefore, a new technique has been proposed to overcome the above-described disadvantages, and the liquid crystal display device to be described below has an advantage of excellent viewing angle characteristics as a driving method using a transverse electric field.

1 is a plan view illustrating a unit pixel of a conventional array substrate for a transverse electric field type liquid crystal display device.

As shown in the drawing, the gate wiring 20 and the data wiring 30 defining the pixel region P are formed in a direction perpendicular to the gate wiring 20 in one direction on the substrate 10. The data line 30 has at least one refractive portion.

The first and second common wires 50a and 50b are formed to correspond to the upper side and the lower side which are spaced in parallel with the gate line 20. The first and second common lines 50a and 50b receive the same common voltage.

The thin film transistor T is formed at the intersection of the gate line 20 and the data line 30. The thin film transistor T may include a gate electrode 25 extending from the gate wiring 20, a semiconductor layer (not shown) formed on an upper portion of the thin film transistor and overlapping the gate electrode 25, and positioned on the semiconductor layer. A source electrode 32 extending from the wiring 30 and a drain electrode 34 spaced apart from the source electrode 32 are included.

The semiconductor layer includes an active layer 40 made of pure amorphous silicon (a-Si: H), and an ohmic contact layer (not shown) made of amorphous silicon (n + a-Si: H) containing impurities.

The pixel electrode 70 in contact with the drain electrode 34 through the drain contact hole CH1 exposing a part of the drain electrode 34 is configured to correspond to the pixel region P. Referring to FIG. The pixel electrode 70 includes an extension part 70a in contact with the drain electrode 34, and a plurality of vertical parts 70b vertically branched from the extension part 70a to the pixel area P.

In addition, the common electrode 80 is in contact with the first common line 50a through the common contact hole CMH1 exposing a part of the first common line 50a. The common electrode 80 includes an extension part 80a in contact with the first common line 50a and a plurality of vertical parts 80b vertically branched from the extension part 80a to the pixel area P. .

The pixel electrode vertical portion 70b and the common electrode vertical portion 80b spaced apart from each other in parallel with the data line 30 have at least one refraction portion and are alternately arranged in the pixel region P alternately.

The second common wiring 50b is used as the first electrode, and the pixel electrode extension part 70b overlapping the first electrode is used as the second electrode, and is interposed in the interposed space between the first and second electrodes. A storage capacitor Cst having the insulating film as a dielectric layer is constructed.

In this case, the pixel electrode extension 70b is generally designed to have a rectangular shape in order to secure sufficient storage capacity.

However, the above-described configuration causes a problem that a uniform horizontal electric field is not formed between the pixel electrode vertical part 70b and the common electrode vertical part 80 adjacent to the pixel electrode extension part 70a and the common electrode extension part 80b. Doing.

This will be described in detail with reference to the accompanying drawings.

FIG. 2 is an enlarged plan view of a portion corresponding to a storage capacitor, and FIG. 3 is a cross-sectional view taken along line III-III 'of FIG. 2 and illustrates a state in which a color filter substrate and an array substrate are opposed to each other. In this case, the drain electrode and the drain contact hole are not illustrated, and the storage capacitor unit will be described as an example.

As shown in FIGS. 2 and 3, the array substrate 10 and the color filter substrate 5 respectively divided into the display area AA and the non-display area NAA are opposed to each other, and the array substrate 10 is bonded to each other. ) And a space between the color filter substrate 5 and the liquid crystal layer 15. The array substrate 10, the color filter substrate 5, and the liquid crystal layer 15 may be referred to as a liquid crystal panel 90.

On the upper surface of the transparent substrate 2 of the array substrate 10, a second common wiring 50b, a gate insulating film 45 and a protective film 55 covering the second common wiring 50b, and the protective film 55 The pixel electrode extension and vertical portions 70a and 70b and the common electrode vertical portion 80b configured to correspond to the pixel region P on the (), and the pixel electrode extension and vertical portions 70a and 70b and the common electrode vertical, respectively. The lower alignment layer 19 covering the portion 80b is sequentially disposed.

In this case, the second common wiring 50b is made of the same material as the gate wiring 20 of FIG. 1.

Meanwhile, the black matrix 12 corresponding to the non-display area NAA on the lower surface of the transparent substrate 1 of the color filter substrate 5, the color filter layer 16 on the black matrix 12, and the color The upper alignment layer 18 under the filter layer 16 is sequentially disposed.

In this case, the liquid crystal 35 positioned in a space between the pixel electrode vertical part 70b and the common electrode vertical part 80b is a horizontal electric field between the pixel electrode vertical part 70b and the common electrode vertical part 80b. Although uniformly controllable, the liquid crystals 35 corresponding to the F and G portions cause a problem in which foreground lines are generated due to the abnormal arrangement.

In detail, the pixel electrode extension part and the vertical parts 70a and 70b and the common electrode vertical part 80b are formed of indium tin oxide (ITO) or indium zinc oxide (IZO) for the purpose of improving transmittance. It is formed in the same layer with the transparent conductive material containing).

In this case, there is a problem in that the pixel electrode extension part and the vertical parts 70a and 70b and the common electrode vertical part 80b are designed to be spaced at regular intervals in order to prevent occurrence of a short defect in advance. In particular, in the process of designing the pixel electrode extension part 70a and the common electrode vertical part 80b apart from each other, the pixel electrode vertical part and the extension parts 70a and 70b and the common electrode vertical part 70b corresponding to the F and G parts are separated. The problem of not forming a uniform horizontal electric field in the liver results in a failure to uniformly control the liquid crystal 35 corresponding to this portion.

The portion in which the foreground line is generated due to the abnormal arrangement of the liquid crystal 35 not only lowers the transmittance of light but also may cause light leakage, which is shielded by the black matrix 12. As a result, it is inevitable that the aperture ratio decreases due to the shielding design of the portions corresponding to the F and G portions by the black matrix.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problem, and an object thereof is to improve aperture ratio by changing a pixel design of an array substrate for a transverse electric field type liquid crystal display device.

An array substrate for a transverse electric field type liquid crystal display device according to the present invention for achieving the above object is a substrate; A gate wiring formed in one direction on the substrate; First and second common lines spaced apart from and parallel to the gate lines; A data line defining a pixel area vertically crossing the gate line; A thin film transistor configured at an intersection point of the gate and data line; A pixel electrode in contact with the thin film transistor, the extension part including a plurality of first depressions corresponding to an upper portion overlapping the second common line, and a plurality of vertical parts vertically branched from the extension part; An extension part in contact with the first common wire and including a plurality of second depressions corresponding to an upper portion overlapping with the first common wire, and a common electrode including a plurality of vertical parts vertically branched from the extension part; do.

In this case, the first and second recesses are empty spaces patterned with a mask in forming the common electrode with the pixel electrode. The first and second recesses may be designed as a polygon including a rectangle.

The pixel electrode and the common electrode may be selected from the group of transparent conductive metal materials including indium tin oxide or indium zinc oxide in the same layer.

The first and second common wires receive the same common voltage from the common voltage generator. In this case, the second common wiring is a first electrode, and the pixel electrode extension part positioned at an upper portion overlapping the second common wiring is a second electrode, and is disposed in an overlapping space between the first and second electrodes. The storage capacitor which uses the interlayer insulation film as a dielectric layer is comprised.

According to the present invention, the aperture ratio can be improved by extending the common electrode vertical portion and the pixel electrode vertical portion upwardly and overlapping with the first and second common wirings.

--- Example ---

According to the present invention, a plurality of recesses designed in the pixel electrode extension part and the common electrode vertical part may cause a short defect even when the ends of each of the pixel electrode vertical part and the common electrode vertical part are extended to the upper part overlapping with the first and second common wirings. It is characterized by providing a pixel design that can improve the aperture ratio with the advantage that this does not occur.

Hereinafter, an array substrate for a transverse electric field type liquid crystal display device according to the present invention will be described with reference to the accompanying drawings.

4 is a plan view illustrating unit pixels of an array substrate for a transverse electric field type liquid crystal display device according to an exemplary embodiment of the present invention.

As shown in the drawing, the gate line 120 and the data line 130 defining the pixel region P are formed to cross the gate line 120 in one direction on the substrate 110. The data line 130 has at least one refraction portion.

The first and second common wires 150a and 150b are formed to correspond to the upper side and the lower side which are spaced in parallel with the gate line 120. The first and second common wires 150a and 150b receive the same common voltage from a common voltage generator not shown.

A thin film transistor T is formed at an intersection point of the gate line 120 and the data line 130. The thin film transistor T may include a gate electrode 125 extending from the gate line 120, a semiconductor layer (not shown) formed on an upper portion of the thin film transistor and overlapping the gate electrode 125, and positioned on the semiconductor layer. A source electrode 132 extending from the wiring 130 and a drain electrode 134 spaced apart from the source electrode 132.

The semiconductor layer includes an active layer 140 made of pure amorphous silicon (a-Si: H) and an ohmic contact layer (not shown) made of amorphous silicon (n + a-Si: H) containing impurities.

The pixel electrode 170 in contact with the drain electrode 134 through the drain contact hole CH2 exposing a part of the drain electrode 134 is configured to correspond to the pixel region P. The pixel electrode 170 is in contact with the drain electrode 134 and includes an extension part 170a including first and second depressions T1 and T2, and the extension part 170a from the extension part 170a to the pixel area P. FIG. It includes a plurality of vertical branches 170b vertically branched.

In addition, the common electrode 180 is in contact with the first common line 150a through the common contact hole CMH2 exposing a portion of the first common line 150a. The common electrode 180 is in contact with the first common wire 150a and includes an extension part 180a including third, fourth, and fifth recessions T3, T4, and T5, and the extension part 180a. Includes a plurality of vertical portions 180b vertically branched into the pixel region P in FIG.

The first and second recesses T1 and T2 of the pixel electrode extension 170a and the third, fourth and fifth recesses T3, T4 and T5 of the common electrode extension 180b may be formed. The forming of the pixel electrode 170 and the common electrode 180 corresponds to an empty space patterned with a mask.

In this case, the first and second recesses T1 and T2 of the pixel electrode extension 170a and the third, fourth, and fifth recesses T3, T4, and T5 of the common electrode extension 180b. Although the shape of is illustrated as being designed as a rectangle, this is only one example and may be designed as a polygon including a rectangle.

Particularly, in the present invention, the pixel electrode vertical portion 170b is formed by the first to fifth recesses T1, T2, T3, T4, and T5 respectively designed for the pixel electrode extension 170a and the common electrode extension 180a. And the common electrode vertical part 180b are designed to extend to the upper part overlapping with the first and second common wires 150a and 150b, respectively, so that a short failure does not occur.

That is, the first to fifth recesses T1, T2, T3, T4, T5, and T6 may be manufactured in a design range in which short shortage between the pixel electrode 170 and the common electrode 180 does not occur. .

The pixel electrode vertical part 170b and the common electrode vertical part 180b that are spaced apart from each other in parallel with the data line 130 have at least one refraction part and are alternately arranged in the pixel area P alternately.

In this case, the second common wiring 150b is used as the first electrode, and the pixel electrode extension 170b overlapping the first electrode is used as the second electrode, and the interspaced space between the first and second electrodes is overlapped. The storage capacitor Cst which uses the insulating film interposed in the dielectric layer is comprised.

In the above-described configuration, the first and second common wires are connected to the ends of each of the pixel electrode vertical part 170b and the common electrode vertical part 180b through the first to fifth recesses T1, T2, T3, T4, and T5. Even if it is designed to extend to the top overlapping the (150a, 150b) there is an advantage that can improve the aperture ratio with the advantage that the short failure does not occur.

This will be described in detail with reference to the accompanying drawings.

5 is an enlarged plan view of a portion corresponding to a storage capacitor, and FIG. 6 is a cross-sectional view taken along line VI-VI ′ of FIG. 5, and shows a state in which a color filter substrate and an array substrate are opposed to each other. In this case, the drain electrode and the drain contact hole are not illustrated, and the storage capacitor unit will be described as an example.

As shown in FIGS. 5 and 6, the array substrate 110 and the color filter substrate 105 respectively divided into the display area AA and the non-display area NAA are opposed to each other, and the array substrate 110 is bonded to each other. ) And a space between the color filter substrate 105 and the color filter substrate 105 are interposed therebetween. The array substrate 110, the color filter substrate 105, and the liquid crystal layer 115 may be referred to as a liquid crystal panel 190.

On the upper surface of the transparent substrate 102 of the array substrate 110, a second common wiring 150b, a gate insulating film 145 and a protective film 155 covering the second common wiring 150b, and the protective film 155 Pixel electrode extension and vertical portions 170a and 170b and common electrode vertical portion 180b configured to correspond to the pixel region P on the The lower alignment layer 119 covering the portion 180b is sequentially disposed.

In this case, the second common wiring 150b is made of the same material as the gate wiring 120 (in FIG. 4).

Meanwhile, the black matrix 112 corresponding to the non-display area NAA on the lower surface of the transparent substrate 101 of the color filter substrate 105, the color filter layer 116 on the black matrix 112, and the color The upper alignment layer 118 under the filter layer 116 is sequentially located.

The pixel electrode extension part and the vertical part 170a and 170b and the common electrode vertical part 180b are transparent including indium tin oxide (ITO) or indium zinc oxide (IZO) for the purpose of improving transmittance. It is formed in the same layer with a conductive material.

At this time, in the present invention, the first and second recesses T1 and T2 designed in the pixel electrode extension part 170a move the ends of the common electrode vertical part 180b to the upper part overlapping the second common wiring 150b. By extending the design, there is an advantage in that the separation distance between the pixel electrode vertical part 170b corresponding to the pixel region P and the common electrode vertical part 180b is uniformly secured. That is, in the present invention, the F and G portions corresponding to the conventional storage capacitor (Cst of FIG. 2) are not generated.

Since a uniform horizontal electric field can be secured to a portion corresponding to the ends of the pixel electrode vertical part 170b and the common electrode vertical part 180b, the pixel electrode vertical part 170b corresponding to the first half of the pixel area P is provided. And all liquid crystals 135 positioned in the spaced apart space of the common electrode vertical part 180b.

Therefore, in the present invention, since the F and G portions corresponding to the conventional storage capacitor (Cst of FIG. 2) are designed at positions corresponding to the second common wiring 250b, the opening ratio is improved by the area corresponding to the F and G portions. It is effective.

However, the present invention is not limited to the above embodiments, and it will be apparent that various changes and modifications can be made without departing from the spirit and the spirit of the present invention.

1 is a plan view showing a unit pixel of a conventional array substrate for a transverse electric field type liquid crystal display device.

2 is an enlarged plan view of a portion corresponding to a storage capacitor;

3 is a cross-sectional view taken along the line III-III ′ of FIG. 2.

4 is a plan view showing unit pixels of an array substrate for a transverse electric field type liquid crystal display device according to the present invention;

5 is an enlarged plan view of a portion corresponding to a storage capacitor;

6 is a cross-sectional view taken along the line VI-VI 'of FIG. 5.

* Explanation of symbols for the main parts of the drawings *

110 substrate 135 liquid crystal

150b: second common wiring 170: pixel electrode

180b: pixel electrode vertical portions T1 and T2: first and second depressions

P: pixel area Cst: storage capacitor

Claims (7)

A substrate; A gate wiring formed in one direction on the substrate; First and second common lines spaced apart from and parallel to the gate lines; A data line defining a pixel area vertically crossing the gate line; A thin film transistor configured at an intersection point of the gate and data line; A pixel electrode in contact with the thin film transistor, the extension part including a plurality of first depressions corresponding to an upper portion overlapping the second common line, and a plurality of vertical parts vertically branched from the extension part; A common electrode in contact with the first common wire and including an extension part including a plurality of second depressions corresponding to an upper portion overlapping the first common wire, and a plurality of vertical parts vertically branched from the extension part; Array substrate for a transverse electric field type liquid crystal display device comprising a. The method of claim 1, And the first and second recessed portions are empty spaces patterned with a mask in the step of forming the pixel electrode and the common electrode. The method of claim 2, And the first and second recesses are designed as polygons including rectangles. The method of claim 1, And the pixel electrode and the common electrode are formed of the same material as the same layer. The method of claim 4, wherein And wherein the same material is one selected from the group of transparent conductive metal materials including indium tin oxide or indium zinc oxide. The method of claim 1, And the first and second common wirings receive the same common voltage from the common voltage generator. The method of claim 1, The second common wiring is a first electrode, and the pixel electrode extension part positioned at an upper portion overlapping with the second common wiring is a second electrode, and is interposed in an overlapping space between the first and second electrodes. An array substrate for a transverse electric field type liquid crystal display device comprising a storage capacitor having an insulating layer as a dielectric layer.

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