KR20090071769A - Semiconductor device and method for forming pad - Google Patents

Abstract

A semiconductor device and a method of forming a pad are provided to have the number of metal pad required for the electrical test by dividing the metal pad into plural. A pad(212) and a connection wiring are formed in a semiconductor substrate(200). An etch stopping layer(214) and insulating layers(220,230,250) are successively formed on the pad of the semiconductor substrate. A metal pad is formed by selectively etching the insulating layer and the etch stopping layer, and etching the exposed etch stopping layer with the photosensitive pattern. The passivation layer is formed on the metal pad. A ball(270) is installed at the metal pad exposed by the removal of the passivation layer through the bonding. The etch stopping layer is the layer of the nitride series.

Description

Semiconductor device and method for forming pad

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method for forming the pad, and more particularly, a semiconductor device and a pad capable of producing a semiconductor chip having various functions by dividing a plurality of metal pads, which are limited due to the miniaturization of the semiconductor chip. It relates to a formation method.

As semiconductor devices become more integrated, the size of semiconductor chips becomes smaller. Therefore, a plurality of semiconductor chips are formed at the same time through a semiconductor device manufacturing process on a wafer, and then sawed by dies or chips and packaged on each die or chip. By performing the semiconductor chip can be completed.

In this case, a predetermined distance must be secured between the chip or the chip or between the die and the die so as not to damage the die or the chip during the sawing operation. This constant distance is called a scribe lane.

The scribe lane can include alignment keys, overlay keys, and monitoring patterns for various processes to perform photo processes, and also process monitoring and feedback after process completion. Electrical Test Patterns for (Feed Back) may be included. Therefore, a large number of pads for electrical probing according to the electrical test pattern may be formed in the scribe lane, and a connection made of metal for connection between the pad and the pad or between the pad and the test pattern may be formed. Inter-Connection Lines can also be formed quite a lot.

1A to 1E are cross-sectional views illustrating processes of manufacturing a semiconductor device according to the related art, in order.

In FIG. 1A, the semiconductor substrate 100 includes a scribe lane region in which a scribe lane is formed and a semiconductor chip region in which a semiconductor chip is formed. The pad 110 and the connection wiring 111 formed of the metal are formed in the scribe lane region of the semiconductor substrate 100, and the pad 112 formed of the metal is formed in the chip region. Here, the pad 110, the connection wiring 111, and the pad 112 are formed by a metal wiring process using copper (Cu).

Next, as shown in FIG. 1B, the first insulating film 120 is coated on the pad 110, the connection wiring 111, and the pad 112, and the pad 110 of the scribe area is formed using a mask for pre pad opening. ) And the pad 112 of the chip region.

Next, in FIG. 1C, a metal pad 130 made of aluminum (Al) is formed on the pad 110 and the pad 112.

Next, as shown in FIG. 1C, the second insulating layer 140 and the third insulating layer 150 are sequentially coated on the first insulating layer 120 and the metal pad 130. The second insulating layer 140 and the third insulating layer 150 are used as a passivation film.

As illustrated in FIG. 1D, a photosensitive film pattern 160 for exposing the metal pad 130 is formed by using a mask for final pad opening.

In the sawing operation, when the second insulating film 140 and the third insulating film 150 which are passivation films remain in the scribe lane without being removed, the impact due to sawing is transferred along the thickly applied passivation film, thereby significantly increasing the chip area. As a result, when the metal pad 130 is exposed, the passivation layer, that is, the second insulating layer 140 and the third insulating layer 150, must be removed by etching. Therefore, the photoresist pattern 160 is patterned as shown in FIG. 1D so that the second and third insulating layers 140 and 150 formed on the metal pad 130 of the chip region and the metal pad 130 of the scribe region are removed.

Subsequently, as shown in FIG. 1E, when the photoresist pattern 160 is etched, the second insulating layer 140 and the third insulating layer 150 are etched to expose the metal pad 130.

Although not shown, the semiconductor substrate 100 is loaded in test equipment to measure electrical characteristics of the semiconductor device before the package process. The test equipment includes a probe pin for electrically connecting with the metal pad 130. The probe pins are subjected to electrical die sorting (EDS).

When the electrical test is completed, the ball (260) is bonded onto the metal pad 130. At this time, the metal layer constituting the pad to be bonded must remain at a certain thickness to maintain the bondability of the ball. have.

However, when the metal pad 130 and the passivation layer 140 and 150 are etched, some surfaces of the lower pad 112 are also etched, which may damage adjacent fuses, for example, fuses connected to a normal memory cell. Occurs.

In addition, in recent years, semiconductor chips are required to have a variety of functions, such as miniaturization. In the case of currently manufactured semiconductor chips, metal pads are manufactured to check wafer-level yield and to connect external circuits due to size limitations. Since the number of is limited, there is a disadvantage that can not satisfy the number of metal pad of the chip that requires a variety of functions.

Accordingly, an object of the present invention is to provide a semiconductor device in which an etch stop layer is formed to prevent etching of a lower pad when the lower pad is exposed by etching of an insulating layer, and a method of forming the pad.

In addition, the present invention provides a semiconductor device and a method for forming the pad, which can have as many metal pads as required for the electrical test for the chip-level verification or the electrical property verification at the wafer level by dividing and forming a plurality of metal pads. It is for that purpose.

In order to achieve the above object, the present invention provides a semiconductor substrate in which pads and connection wirings are formed, an etch stop film and an insulating film sequentially formed on an upper surface of a pad of the semiconductor substrate, and selectively etched and exposed an insulating film and an etch stop film. Provided is a semiconductor device including a metal pad formed by etching through a photoresist pattern on an etch stop layer, a passivation film formed on the metal pad, and a ball installed by bonding to the metal pad exposed by removing the passivation film. .

In addition, the present invention provides a method for forming a pad of a semiconductor device, comprising the steps of forming a pad on a semiconductor substrate, sequentially forming an etch stop film and an insulating film on the upper surface of the pad, and selectively using an insulating film as a pad release mask. Exposing the etch stop layer by etching; forming a metal pad on the exposed etch stop layer; forming a photoresist pattern on the metal pad; dividing the metal pad by etching using the mask; Forming a passivation film on the metal pad, forming a photoresist pattern on the metal pad and removing the passivation film to expose the metal pad, and installing the ball through bonding to the exposed metal pad. It provides a method for forming a pad of a semiconductor device comprising.

Preferably, the etch stop film is formed of a nitride film having a thickness of 170 to 230 nm.

Preferably, in the step of exposing the etch stop film by selective etching using an insulating film using a pad opening mask, the etch stop thickness of the etch stop film is 30 to 70 nm, and to expose the metal pad, In the step of forming the pattern and removing the passivation film, the loss thickness of the etch stop film etched through the divided metal pads is 50 to 150 nm.

Also preferably, in the step of forming a photoresist pattern on the metal pad and dividing the metal pad by etching using the mask, a plurality of metal pads may be equally divided according to the photoresist pattern.

Further preferably, after the step of installing the ball through the bonding to the exposed metal pad, the step of performing a probe test through the ball further includes.

As described above, according to the semiconductor device and the method for forming the pad of the present invention, an etch stop layer is formed between the metal pad and the lower pad to prevent loss of the lower pad during etching, and furthermore, by forming a plurality of metal pads, It is possible to have the number of metal pads required for the electrical test to check the chip yield and electrical characteristics at the wafer level, thereby enabling the design of a smaller semiconductor chip.

Hereinafter, the operating principle of the present invention will be described in detail with reference to the accompanying drawings. In the following description of the present invention, when it is determined that a detailed description of a known function or configuration may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted. Terms to be described later are terms defined in consideration of functions in the present invention, and may be changed according to intentions or customs of users or operators. Therefore, the definition should be made based on the contents throughout the specification.

2A through 2E are cross-sectional views illustrating a method of forming a pad of a semiconductor device in accordance with an embodiment of the present invention, and FIGS. 3A through 3B are plan views illustrating the division of metal wires in accordance with an embodiment of the present invention.

In the semiconductor device as illustrated in FIGS. 2A to 2E, the pad 212 is formed on the semiconductor substrate 200 in the semiconductor chip region, and the etch stop layer 214 and the etching are sequentially formed on the upper surface of the pad 212. An insulating layer 220 is formed on the stop layer 214, the insulating layer 220 and the etch stop layer 214 are selectively etched, and the metal pads are etched through the photoresist pattern on the exposed etch stop layer 214. 230 is divided.

The passivation layers 240 and 250 are formed on the divided metal pads 230, and the balls 270 are bonded to the metal pads 230 exposed by the removal of the passivation layers 240 and 250. .

Here, the etch stop film 214 is formed of a nitride-based film having a thickness of 170 to 230 nm, and the metal pad 230 has a structure in which a plurality of portions are evenly formed.

Therefore, in the following, each step will be described in more detail with reference to the process cross section.

Referring to FIG. 2A, a pad 212 formed of a metal is formed in a semiconductor chip region semiconductor substrate 200 on which a semiconductor chip is formed. Here, the pad 212 is formed by a metal wiring process using copper (Cu).

An etch stop layer 214 and a first insulating layer 220 are sequentially formed on the pad 212.

The etch stop film 214 is preferably a nitride film and has a thickness of 170 to 230 nm.

Next, as shown in FIG. 2B, the first insulating layer 220 is etched in the first insulating layer 220 using a mask for pre-pad open to etch stop corresponding to the exposed portion of the pad 212. The film 214 is exposed.

Here, the etching loss thickness of the etch stop layer 214 that is overetched and lost, such as the etching of the first insulating layer 220, is defined to be 30 to 70 nm.

Next, in FIG. 2C, a metal pad 230 made of aluminum (Al) is formed on the exposed etch stop layer 214.

Then, a photosensitive film pattern (mother) is coated on the formed metal pad 230, and the metal pad 230 is divided by etching using the photosensitive film pattern as a mask. At this time, the divided metal pad is divided evenly, and preferably, as shown in FIGS. 3A to 3B, the metal pad 230 is divided into two or four portions.

Subsequently, the photoresist layer pattern is removed, and the second insulation layer 240 and the third insulation layer 250 are sequentially applied on the first insulation layer 220 and the divided metal pad 230. In this case, the second insulating film 240 and the third insulating film 250 are used as a passivation film.

As shown in FIG. 2D, a photosensitive film pattern 260 for exposing the metal pad 230 is formed using a mask for final pad opening.

In the sawing operation, when the second insulating film 240 and the third insulating film 250, which are passivation films, remain in the scribe lane without being removed, the impact caused by sawing is transferred along the thickly applied passivation film, which is quite large in the chip region. In this case, when the metal pad 230 is exposed, the passivation layer, that is, the second insulating layer 240 and the third insulating layer 250 in the scribe area should be removed by etching. Accordingly, the photoresist pattern 260 is patterned as shown in FIG. 1D so that the second and third insulating layers 240 and 250 formed on the metal pad 230 of the chip region and the metal pad 230 of the scribe region are removed.

Next, as shown in FIG. 2E, when the photoresist pattern 260 is etched as a mask, the second insulating film 240 and the third insulating film 250 are etched to expose the metal pad 230.

In the step of removing the passivation film, the loss thickness of the etch stop film 214 that is etched through the divided metal pads 230 is defined to be 50 to 150 nm.

Then, the ball 270 is installed through bonding to the exposed metal pad 230.

On the other hand, before the semiconductor substrate 200 package process configured as described above is loaded into the test equipment to measure the electrical characteristics of the semiconductor device. In the test equipment, the electric die sorting (EDS) is performed by electrically contacting the chip chip pin (not shown) with the ball 270 rather than when the divided metal pads 230 contact each other.

Therefore, in the present invention, the number of metal pads 230 may be increased to improve the number limit of the metal pads 230 due to the miniaturization of the chip, and to send signals to various modules through the plurality of metal pads 230. It became.

As described above, the semiconductor device and the method for forming the pad according to the present invention are just one preferred embodiment, and the present invention is not limited to the above-described embodiments, and as claimed in the following claims, Without departing from the gist of the present invention, one of ordinary skill in the art will have the technical spirit of the present invention to the extent that various modifications can be made.

1A to 1E are cross-sectional views illustrating a manufacturing process of a semiconductor device according to the prior art in order.

2A through 2E are cross-sectional views illustrating a method of forming a pad of a semiconductor device in accordance with an embodiment of the present invention.

3A to 3B are plan views illustrating the division of the metal wiring according to the embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

200: semiconductor substrate 212: pad

214: etching stop film 220, 240, 250: first, second, third insulating film

230: metal pad 260: photosensitive film pattern

270 ball

Claims (11)

A semiconductor substrate having pads and connection wirings formed thereon; An etch stop layer and an insulating layer sequentially formed on an upper surface of the pad of the semiconductor substrate; A metal pad selectively etching the insulating layer and the etch stop layer and separately formed by etching through a photoresist pattern on the exposed etch stop layer; A passivation film formed on the metal pad; A ball installed by bonding to the metal pad exposed by removing the passivation film. Semiconductor device comprising a. The method of claim 1, The etch stop film is a semiconductor device of the nitride-based film. The method of claim 1, The etch stop layer is a semiconductor device formed to a thickness of 170 ~ 230nm. The method of claim 1, The metal pad is equally divided into a plurality of semiconductor devices. As a pad forming method of a semiconductor device, Forming a pad on the semiconductor substrate, Sequentially forming an etch stop layer and an insulating layer on an upper surface of the pad; Exposing the etch stop layer by selective etching using the insulating film on the insulating film; Forming a metal pad on the exposed etch stop layer; Forming a photoresist pattern on the metal pad and dividing the metal pad by etching using the mask; Removing the photoresist pattern and forming a passivation layer on the metal pad; Forming a photoresist pattern on the metal pad and removing the passivation film to expose the metal pad; Installing a ball through bonding to the exposed metal pad Method for forming a pad of a semiconductor device comprising a. The method of claim 5, wherein The etch stop layer is a nitride film forming method of the semiconductor device pad. The method of claim 5, wherein The etch stop layer is a pad forming method of a semiconductor device formed to a thickness of 170 ~ 230nm. The method of claim 5, wherein Exposing the etch stop layer by selective etching using the insulating film on the pad release mask; An etching loss thickness of the etch stop layer is 30 ~ 70nm of pad formation method of a semiconductor device. The method of claim 5, wherein Forming a photoresist pattern on the metal pad and removing the passivation film to expose the metal pad; And a loss thickness of the etch stop layer etched through the divided metal pads is 50 to 150 nm. The method of claim 5, wherein Forming a photoresist pattern on the metal pad and dividing the metal pad by etching using the mask; The metal pad is a pad forming method of a semiconductor device is evenly divided according to the photosensitive film pattern. The method of claim 5, wherein After installing the ball through the bonding to the exposed metal pad, The method of forming a pad of a semiconductor device further comprises the step of performing a probe test through the ball.

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