KR20090058319A - Organic light emitting display and method of driving the same - Google Patents

Abstract

An organic light emitting display and a method of driving the same are provided to set a threshold voltage of a driving transistor by connecting the driving transistor to a diode within a blank time. In an organic light emitting display and a method of driving the same, a plurality of sub pixels are arranged in the display unit(120). Each sub pixel is composed of a first switching transistor, a capacitor, a driving transistor, an organic light-emitting diode, and a second switching transistor. A capacitor receives a data signal and stores it as a data voltage in response to an operation of a first switching transistor. The driving transistor operates in response to the data voltage stored in the capacitor. The organic light-emitting diode emits light by receiving power in response to an operation of the driving transistor. A second switching transistor connects the driving transistor to the diode in response to a control signal.

Description

Organic Light Emitting Display and Method of Driving the Same

The present invention relates to an organic light emitting display device and a driving method thereof.

An organic light emitting display device used in an organic light emitting display device is a self-light emitting device in which a light emitting layer is formed between two electrodes positioned on a substrate.

In addition, the organic light emitting display device may include a top-emission method, a bottom-emission method, or a dual-emission method according to a direction in which light is emitted. According to the driving method, it is divided into a passive matrix type and an active matrix type.

In the organic light emitting display device, when a scan signal, a data signal, and a power are supplied to a plurality of sub pixels arranged in a matrix form, the selected sub pixel emits light, thereby displaying an image.

On the other hand, in the organic light emitting display device, the driving transistor must be continuously turned on in order for the organic light emitting diode to emit light. As a result, when the driving signal is continuously supplied to the gate of the driving transistor, a threshold voltage Vth increases and a current flow decreases over time. If this phenomenon continues, the performance of the driving transistor is deteriorated, and thus the organic light emitting diode cannot be normally emitted, and the lifespan of the panel is also shortened, thereby reducing reliability.

SUMMARY OF THE INVENTION An object of the present invention is to provide an organic light emitting display device and a driving method thereof that can improve a phenomenon in which luminance between subpixels is uneven.

The present invention provides a first switching transistor for driving in response to a scan signal, a capacitor for receiving a data signal as the first switching transistor is driven, and storing the data signal as a data voltage. A plurality of subpixels including a driving transistor for driving in response to a data voltage, an organic light emitting diode that receives power as the driving transistor drives, and a second switching transistor for diode-connecting the driving transistor in response to a control signal A display unit arranged; A scan driver which supplies a scan signal and a control signal; And a data driver for supplying a data signal, wherein the scan driver is configured to supply a control signal to the second switching transistor so as to set a threshold voltage of the driving transistor by diode-connecting the driving transistor within a blank time at which the organic light emitting diode does not emit light. An electroluminescent display device is provided.

The blank time may correspond to the width obtained by adding the front porch of the vertical synchronizing signal, the width of the vertical synchronizing signal, and the back porch of the vertical synchronizing signal supplied from the outside to the scan driver.

The ground voltage supplied to the subpixel within the blank time may be switched from a level corresponding to the power supply voltage to a level corresponding to the ground voltage.

The subpixel includes a first switching transistor having a gate connected to a scan line to which a scan signal is supplied and one end to a data line to which a data signal is supplied, and one end to the other end of the first switching transistor, and the other end to the first node. A second switching transistor having a gate connected to a capacitor connected to the capacitor, a signal line to which a control signal is supplied, one end connected to a first node, and the other end connected to a second node, and a first electrode connected to a first power line; The organic light emitting diode may include a organic light emitting diode having a second electrode connected to a node, and a driving transistor having a gate connected to the first node, one end connected to the second node, and the other end connected to the second power line.

The voltage applied to the second node before the second switching transistor is turned on becomes high due to the time that the ground voltage supplied through the second power wiring is switched to a level corresponding to the power supply voltage supplied through the first power wiring. High) voltage can be set.

The voltage applied to the first node in the period where the second switching transistor is turned on and the driving transistor is diode-connected may be sampled as the threshold voltage of the driving transistor as the power voltage supplied to the second power line is switched to the ground voltage.

The transistors included in the sub pixel may be N-type transistors.

On the other hand, in another aspect, the present invention, by turning on the second switching transistor in the blank time that the organic light emitting diode of the sub-pixel including the first switching transistor, the second switching transistor, the capacitor, the driving transistor and the organic light emitting diode does not emit light. Diode-connecting the driving transistor and setting a threshold voltage of the driving transistor; And turning on the first switching transistor, storing the data voltage equal to the sum of the threshold voltage and the data signal in the capacitor, and emitting the organic light emitting diode by using the driving transistor configured to drive corresponding to the data voltage stored in the capacitor. A method of driving an electroluminescent display device is provided.

The blank time may correspond to the width obtained by adding the front porch of the vertical sync signal, the width of the vertical sync signal, and the back porch of the vertical sync signal.

The ground voltage supplied to the subpixel within the blank time may be switched from a level corresponding to the power supply voltage to a level corresponding to the ground voltage.

The present invention has the effect of providing an organic light emitting display device and a driving method thereof that can improve a phenomenon in which luminance between subpixels is uneven.

Hereinafter, with reference to the accompanying drawings, the specific content for the practice of the present invention will be described.

1 is a schematic plan view of an organic light emitting display device according to an embodiment of the present invention.

As illustrated in FIG. 1, the organic light emitting display device may include a display unit 120 in which a plurality of sub pixels P are positioned. Since the plurality of sub pixels P are vulnerable to moisture or oxygen, the display unit 120 may be sealed by a sealing substrate.

Meanwhile, the plurality of sub pixels P may be driven by the drivers 140 and 150 to represent an image.

The drivers 140 and 150 may include a scan driver 140 supplying scan signals to the plurality of subpixels P and a data driver 150 supplying data signals to the plurality of subpixels P. Referring to FIG.

The scan driver 140 may receive a vertical synchronization signal Vsync from the outside and generate a scan signal and a control signal to be supplied to the plurality of subpixels P with reference to the vertical synchronization signal Vsync. The scan driver 140 includes a shift register 141 that receives a vertical synchronization signal Vsync, a level shifter 142 that adjusts a level of a signal received from the shift register 141, and a level shifter 142. It may include, but is not limited to, an output buffer 143 for outputting a signal received from.

The data driver 150 may receive the horizontal sync signal Hsync and the image signals R, G, and B from the outside, and generate a data signal with reference to the horizontal sync signal Hsync. The data driver 150 may include a shift register 151 for receiving the horizontal sync signal Hsync and a latch for storing the image data signals R, G, and B with reference to the signal received from the shift register 151. 152 and an output buffer 153 for converting the signal received from the latch 152 and the image data signals R, G, and B into analog (or digital) and outputting the same.

A detailed description of the sub-pixel which selectively receives the scan signal, the control signal and the data signal from the scan driver and the data driver will be described in more detail with reference to the accompanying drawings.

Hereinafter, the structure of the subpixel will be described in more detail with reference to the cross-sectional view of the above-described subpixel.

2A is a cross-sectional view of the subpixel illustrated in FIG. 1.

As shown in FIG. 2A, a buffer layer 105 is positioned on a substrate 110. The buffer layer 105 is formed to protect the transistor formed in a subsequent process from impurities such as alkali ions flowing out of the substrate 110, and selectively using silicon oxide (SiO ₂ ), silicon nitride (SiNx), or the like. Can be formed.

Here, the substrate 110 may be glass, plastic, or metal.

The semiconductor layer 111 is positioned on the buffer layer 105. The semiconductor layer 111 may include amorphous silicon or crystallized polycrystalline silicon.

In addition, the semiconductor layer 111 may include a source region and a drain region including p-type or n-type impurities, and may include a channel region other than the source region and the drain region.

The first insulating layer 115, which may be a gate insulating layer, is disposed on the semiconductor layer 111. The first insulating film 115 may be a silicon oxide film (SiOx), a silicon nitride film (SiNx), or a multilayer thereof.

The gate electrode 120c may be positioned at a predetermined region of the semiconductor layer 111 positioned on the first insulating layer 115, that is, at a position corresponding to a channel region in which impurities are injected. The scan wiring 120a and the capacitor lower electrode 120b may be positioned on the same layer as the gate electrode 120c.

The gate electrode 120c is selected from the group consisting of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). It may be made of any one or alloys thereof.

In addition, the gate electrode 120c is formed of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). It may be a multilayer formed of any one or an alloy thereof.

In addition, the gate electrode 120c may be a double layer of molybdenum / aluminum-neodymium or molybdenum / aluminum.

The scan wiring 120a is selected from the group consisting of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). It may be made of any one or alloys thereof. In addition, the scan wiring 120a includes molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). It may be a multilayer formed of any one or an alloy thereof. In addition, the scan wiring 120a may be a double layer of molybdenum / aluminum-neodymium or molybdenum / aluminum.

The second insulating layer 125, which is an interlayer insulating layer, is positioned on the substrate 110 including the scan wiring 120a, the capacitor lower electrode 120b, and the gate electrode 120c. The second insulating layer 125 may be a silicon oxide layer (SiOx), a silicon nitride layer (SiNx), or a multilayer thereof.

Contact holes 130b and 130c exposing portions of the semiconductor layer 111 are disposed in the second insulating layer 125 and the first insulating layer 115.

Drain and source electrodes 140c and 140d electrically connected to the semiconductor layer 111 through contact holes 130b and 130c penetrating through the second insulating film 125 and the first insulating film 115 are formed in the pixel region. Located.

The drain electrode and the source electrodes 140c and 140d may be formed of a single layer or multiple layers. When the drain electrode and the source electrodes 140c and 140d are a single layer, molybdenum (Mo), aluminum (Al), and chromium (Cr) may be used. , Gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd) and copper (Cu) may be made of any one or an alloy thereof. In addition, when the drain electrode and the source electrodes 140c and 140d are multiple layers, the double layer of molybdenum / aluminum-neodymium and the triple layer of molybdenum / aluminum / molybdenum or molybdenum / aluminum-neodymium / molybdenum may be used.

The data line 140a, the capacitor upper electrode 140b, and the power line line 140e may be positioned on the same layer as the drain electrode and the source electrodes 140c and 140d.

The data line 140a and the power line 140e positioned in the non-pixel region may be formed of a single layer or multiple layers. When the data line 140a and the power line 140e are a single layer, molybdenum (Mo) and aluminum may be used. (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd) and copper (Cu) may be made of any one or an alloy thereof.

In addition, when the data line 140a and the power line line 140e are multiple layers, the double layer of molybdenum / aluminum-neodymium and the triple layer of molybdenum / aluminum / molybdenum or molybdenum / aluminum-neodymium / molybdenum may be used.

In addition, the data line 140a and the power line line 140e may be formed of a triple layer of molybdenum / aluminum-neodymium / molybdenum.

The third insulating layer 145 is disposed on the data line 140a, the capacitor upper electrode 140b, the drain and source electrodes 140c and 140d, and the power line line 140e. The third insulating layer 145 may be a planarization layer for alleviating the step difference of the lower structure. The third insulating layer 145 may be an organic material such as polyimide, benzocyclobutene series resin, acrylate, or silicon oxide. It may be formed of an inorganic material such as spin on glass (SOG), which is coated in the form and then cured.

Alternatively, the third insulating layer 145 may be a passivation layer, and may be a silicon nitride layer (SiNx), a silicon oxide layer (SiOx), or a multilayer thereof.

A via hole 165 is disposed in the third insulating layer 145 to expose one of the drain and source electrodes 140c and 140d. The drain and source electrode 140c is disposed on the third insulating layer 145 through the via hole 165. , The first electrode 160 is electrically connected to any one of 140d.

The first electrode 160 may be an anode and may be a transparent electrode or a reflective electrode. Herein, when the structure of the organic light emitting display device is a backside or double-sided light emission, the first electrode 160 may be a transparent electrode, and among indium tin oxide (ITO), indium zinc oxide (IZO), or zinc oxide (ZnO) It can be either.

In addition, when the structure of the organic light emitting display device is a top emission, the first electrode 160 may be a reflective electrode, and aluminum (Al), silver (Ag), or It may further include a reflective layer made of any one of nickel (Ni), and may further include a reflective layer between two layers made of any one of ITO, IZO, or ZnO.

A fourth insulating layer 155 is formed on the first electrode 160 to insulate adjacent first electrodes and includes an opening 175 exposing a portion of the first electrode 160. The emission layer 170 is positioned on the first electrode 160 exposed by the opening 175.

The second electrode 180 is positioned on the emission layer 170. The second electrode 180 may be a cathode electrode, and may be made of magnesium (Mg), calcium (Ca), aluminum (Al), silver (Ag), or an alloy thereof having a low work function.

Here, when the organic light emitting display device has a front or double-sided light emitting structure, the second electrode 180 may be formed to a thickness thin enough to transmit light, and when the organic light emitting display device has a rear light emitting structure, It can be formed thick enough to reflect light.

In the above-described embodiment, a total of seven masks, that is, a semiconductor layer, a gate electrode (including a scan wiring and a capacitor lower electrode), contact holes, a source electrode and a drain electrode (including a data wiring, a power wiring and a capacitor upper electrode), An example structure of an organic light emitting display device in which a mask is used to form a via hole, a first electrode, and an opening is described.

Hereinafter, an embodiment in which an organic light emitting display device is formed using a total of five masks is described. In the following exemplary embodiments, descriptions of portions overlapping with the above description will be omitted.

FIG. 2B is another exemplary cross-sectional view of the sub-pixel illustrated in FIG. 1.

As shown in FIG. 2B, the buffer layer 105 is positioned on the substrate 110, and the semiconductor layer 111 is positioned on the buffer layer 105. The first insulating layer 115 is positioned on the semiconductor layer 111, and the gate electrode 120c, the capacitor lower electrode 120b, and the scan wiring 120a are positioned on the first insulating layer 115. The second insulating layer 125 is positioned on the gate electrode 120c.

The first electrode 160 is positioned on the second insulating layer 125, and contact holes 130b and 130c exposing the semiconductor layer 111 are positioned. The first electrode 160 and the contact holes 130b and 130c may be formed at the same time.

The source electrode 140d, the drain electrode 140c, the data line 140a, the capacitor upper electrode 140b, and the power source line 140e are positioned on the second insulating layer 125. A portion of the drain electrode 140c may be located on the first electrode 160.

The third insulating layer 145, which may be a pixel definition layer or a bank layer, is positioned on the substrate 110 on which the above-described structure is formed, and the opening 175 exposing the first electrode 160 is positioned in the third insulating layer 145. do. The emission layer 170 is positioned on the first electrode 160 exposed by the opening 175, and the second electrode 180 is positioned on the emission layer 170.

As described above, a total of five masks, that is, a semiconductor layer, a gate electrode (including a scan wiring and a capacitor lower electrode), a first electrode (including a contact hole), and a source / drain electrode (including a data wiring, a power wiring and a capacitor upper electrode) And the organic light emitting display device using a mask in the process of forming the opening has the advantage of reducing the number of masks to reduce the manufacturing cost and increase the efficiency of mass production.

On the other hand, the organic light emitting display device may have a variety of methods for implementing a color image, with reference to Figures 3a to 3b will be described in the implementation method.

3A and 3B illustrate exemplary color images of subpixels.

First, the color image implementation method illustrated in FIG. 3A illustrates a color image implementation method including a red light emitting layer 170R, a green light emitting layer 170G, and a blue light emitting layer 170B separately emitting red, green, and blue light, respectively. .

As shown in FIG. 3A, red light, green light, and blue light are respectively provided from the light emitting layers 170R, 170G, and 170B, so that red light, green light, and blue light may be mixed to display a color image.

Here, the upper and lower portions of each of the light emitting layers 170R, 170G, and 170B may further include an electron transport layer (ETL) and a hole transport layer (HTL), and various modifications may be made to the arrangement and structure thereof.

In addition, the color image implementation method illustrated in FIG. 3B illustrates a color image implementation method including a white emission layer 270W, a red color filter 290R, a green color filter 290G, and a blue color filter 290B.

As shown in FIG. 3B, the white light provided from the white light emitting layer 270W passes through the red color filter 290R, the green color filter 290G, and the blue color filter 290B, respectively. By generating and mixing each, a color image can be displayed.

Here, the upper and lower portions of the white light emitting layer 270W may further include an electron transport layer ETL, a hole transport layer HTL, and the like, and various modifications may be made to the arrangement and structure thereof.

Here, the back light emitting structure is illustrated and described with reference to FIGS. 3A to 3B, but is not limited thereto, and various modifications may be made to the arrangement and structure according to the front light emitting structure.

In addition, although two types of driving methods are illustrated and described with respect to the color image implementation method, the present invention is not limited thereto, and various modifications may be made as necessary.

4 is a hierarchical structure diagram of an organic light emitting diode included in a subpixel.

Referring to FIG. 4, an organic light emitting diode according to an embodiment of the present invention includes a substrate 110, a first electrode 160 positioned on the substrate 110, and an organic light emitting diode positioned on the first electrode 160. The hole injection layer 171, the hole transport layer 172, the light emitting layer 170, the electron transport layer 173, the electron injection layer 174 and the second electrode 180 positioned on the electron injection layer 174 may be included. Can be.

First, the hole injection layer 171 is positioned on the first electrode 160. The hole injection layer 171 may play a role of smoothly injecting holes from the first electrode 160 to the light emitting layer 170, and may include CuPc (cupper phthalocyanine) and PEDOT (poly (3,4) -ethylenedioxythiophene). ), PANI (polyaniline) and NPD (N, N-dinaphthyl-N, N'-diphenyl benzidine) may be made of any one or more selected from the group consisting of, but not limited to.

The hole injection layer 171 described above may be formed using an evaporation method or a spin coating method.

The hole transport layer 172 serves to facilitate the transport of holes, NPD (N, N-dinaphthyl-N, N'-diphenyl benzidine), TPD (N, N'-bis- (3-methylphenyl) -N , N'-bis- (phenyl) -benzidine), s-TAD and MTDATA (4,4 ', 4 "-Tris (N-3-methylphenyl-N-phenyl-amino) -triphenylamine) It may be made of one or more, but is not limited thereto.

The hole transport layer 172 may be formed using an evaporation method or a spin coating method. The light emitting layer 170 described above may be formed of a material emitting red, green, blue, and white light, and may be formed using phosphorescent or fluorescent materials.

When the light emitting layer 170 is red, it includes a host material including CBP (carbazole biphenyl) or mCP (1,3-bis (carbazol-9-yl), and PIQIr (acac) (bis (1-phenylisoquinoline) acetylacetonate Phosphorescent light containing a dopant including any one or more selected from the group consisting of iridium), PQIr (acac) (bis (1-phenylquinoline) acetylacetonate iridium), PQIr (tris (1-phenylquinoline) iridium), and PtOEP (octaethylporphyrin platinum) It may be made of a material, alternatively may be made of a fluorescent material including PBD: Eu (DBM) 3 (Phen) or perylene, but is not limited thereto.

When the light emitting layer 170 is green, it may include a host material including CBP or mCP, and may be made of a phosphor including a dopant material including Ir (ppy) 3 (fac tris (2-phenylpyridine) iridium). Alternatively, the composition may be made of a fluorescent material including Alq3 (tris (8-hydroxyquinolino) aluminum), but is not limited thereto.

When the light emitting layer 170 is blue, the light emitting layer 170 may include a host material including CBP or mCP, and may be made of a phosphor including a dopant material including (4,6-F2ppy) 2Irpic.

Alternatively, it may be made of a fluorescent material including any one selected from the group consisting of spiro-DPVBi, spiro-6P, distilbenzene (DSB), distriarylene (DSA), PFO-based polymer and PPV-based polymer, but It is not limited.

Here, the electron transport layer 173 serves to facilitate the transport of electrons, at least one selected from the group consisting of Alq3 (tris (8-hydroxyquinolino) aluminum), PBD, TAZ, spiro-PBD, BAlq and SAlq. It may be made but not limited thereto.

The electron transport layer 173 may be formed using an evaporation method or a spin coating method. The electron transport layer 173 may also prevent the holes injected from the first electrode from moving through the light emitting layer to the second electrode. In other words, it may serve as a hole blocking layer to efficiently bond holes and electrons in the emission layer.

Here, the electron injection layer 174 serves to facilitate the injection of electrons, Alq3 (tris (8-hydroxyquinolino) aluminum), PBD, TAZ, spiro-PBD, BAlq or SAlq may be used, but is not limited thereto. .

The electron injection layer 174 may form an organic material and an inorganic material constituting the electron injection layer by vacuum deposition.

The hole injection layer 171 or the electron injection layer 174 may further include an inorganic material, and the inorganic material may further include a metal compound. The metal compound may include an alkali metal or an alkaline earth metal. Metal compound including an alkali metal or alkaline earth metal LiQ, LiF, NaF, KF, RbF, CsF, FrF, BeF 2, MgF 2, CaF 2, SrF 2, BaF any one selected from the group consisting of ₂ and RaF ₂ or more But it is not limited thereto.

In other words, the inorganic material in the electron injection layer 174 facilitates hopping of electrons injected from the second electrode 180 into the light emitting layer 170, thereby achieving a luminous efficiency by balancing the holes and electrons injected into the light emitting layer. Can be improved.

In addition, the inorganic material in the hole injection layer 171 reduces the mobility of holes injected from the first electrode 160 to the light emitting layer 170, thereby improving the light emission efficiency by balancing the holes and electrons injected into the light emitting layer 170. You can.

The present invention is not limited to FIG. 4, and at least one of the electron injection layer 174, the electron transport layer 173, the hole transport layer 172, and the hole injection layer 171 may be omitted.

Meanwhile, the manufacturing method, structure, material, and the like of the above-described subpixels are described as examples only for better understanding of the description, and the organic light emitting display device according to the exemplary embodiment of the present invention is not limited thereto.

Hereinafter, an organic light emitting display device according to an exemplary embodiment of the present invention will be described in detail with reference to a circuit configuration diagram of a subpixel. However, reference is also made to FIG. 1 to help understand the description.

5 is a circuit diagram illustrating a subpixel according to an exemplary embodiment of the present invention.

As illustrated in FIG. 5, a subpixel according to an embodiment of the present invention may include a gate connected to a scan line SCAN to which a scan signal is supplied and one end connected to a data line DATA to a data signal. One switching transistor S1 may be included. In addition, one end is connected to the other end of the first switching transistor (S1) and may include a capacitor (Cst) is connected to the other end of the first node (node A). Also, a second switching transistor S2 having a gate connected to the signal line CTL to which the control signal is supplied, one end connected to the first node A, and the other end connected to the second node B, may be included. Can be. The organic light emitting diode D may include an organic light emitting diode D connected to a first power line VDD and a second electrode connected to a second node B. In addition, the driving transistor T1 may include a gate connected to the first node A, one end connected to the second node B, and the other end connected to the second power line VSS.

The circuit configuration of such a subpixel is implemented with three transistors, one capacitor, and one organic light emitting diode to describe an example of the embodiment, but is not limited thereto. In addition, the transistors S1, S2, and T1 included in the subpixel are implemented as N-types to explain an example of the embodiment, but the present disclosure is not limited thereto.

Meanwhile, the scan driver 140 diode-connects the driving transistor T1 during a blank time in which the organic light emitting diode D included in the subpixel does not emit light to set the threshold voltage of the driving transistor T1. A control signal can be supplied to S2.

Here, the blank time is the front porch of the vertical sync signal Vsync and the width of the vertical sync signal Vsync supplied to the scan driver 140, and the back porch of the vertical sync signal Vsync. Corresponds to the combined width of porch).

As such, when the threshold voltage of the driving transistor T1 included in the subpixel is set within the blank time when the organic light emitting diode D does not emit light, the driving transistor within the light emitting time that is the time at which the organic light emitting diode D emits light. The light emission time can be increased rather than setting the threshold voltage of (T1).

On the other hand, when the threshold voltage of the driving transistor T1 is set within the blank time, the ground voltage supplied to the second power supply line VSS of the subpixel corresponds to the power supply voltage supplied to the first power supply wiring VDD. The level can be switched from the level corresponding to the ground voltage.

This will be described in more detail as follows.

First, before the second switching transistor S2 is turned on, the ground voltage supplied through the second power supply line VSS is raised to a level corresponding to the power supply voltage supplied through the first power supply line VDD. Switch. That is, the second power supply line VSS is pulled up to the power supply voltage level supplied to the first power supply line VDD. Then, the voltage of the second node B may be set to a high voltage corresponding to a difference between the power supply voltage supplied through the first power supply line VDD and the threshold voltage of the organic light emitting diode D. .

Thereafter, the second switching transistor S2 is turned on to switch the voltage of the second power supply line VSS, which is raised to the power supply voltage, to the ground voltage in the period where the driving transistor T1 is diode-connected. Then, the high voltage applied to the second node node B is discharged through one end (drain) of the driving transistor T1 through the other end (source), and the gate voltage of the driving transistor T1 is a threshold voltage. Since the battery is discharged until it reaches, the first node node A may be programmed to the threshold voltage of the driving transistor T1.

As described above, in the process of setting the threshold voltage of the driving transistor T1, all the subpixels may proceed at the same time or may proceed for each subpixel.

Thereafter, when the first switching transistor S1 is turned on, the capacitor Cst may store the data voltage. However, the scan signal for turning on the first switching transistor S1 may be sequentially supplied to all subpixels.

In this process, the first node node A may have a "Vdata + Vth" voltage obtained by adding the threshold voltage of the data signal and the driving transistor T1 due to the coupling phenomenon of the capacitor Cst. Therefore, the data voltage stored in the capacitor Cst may be "Vdata + Vth".

According to the driving scheme as described above, the amount of current flowing in the driving transistor T1 may be set irrespective of the threshold voltage of the driving transistor T1. Can be explained.

In Equation 1 above, I _{ds_ DRTFT} : Current flowing through the drain and the source of the driving transistor T1, I _OLED : Current flowing through the organic light emitting diode (D), V _GS The voltage may be applied to a gate and a source of the driving transistor T1, the V _th may be a threshold voltage of the driving transistor T1, the V _DATA may be a data voltage, and the voltage may be a voltage applied to the second power line VSS.

According to Equation 1, since the current flowing through the organic light emitting diode D can maintain a constant value regardless of the change in the threshold voltage of the driving transistor T1, the luminance of the display unit of the organic light emitting display device is uniformly improved. Can be.

Hereinafter, the driving method of the organic light emitting display device described above will be described in more detail. However, in order to help the understanding of the description, reference is made to FIGS. 1 and 5 described above.

6 is a diagram illustrating a driving waveform according to an embodiment of the present invention.

As shown in FIG. 6, a driving method according to an embodiment of the present invention may be largely divided into a blank time and an emission time.

First, the second switching transistor S2 is turned on during a blank time in which the organic light emitting diode D of the subpixel does not emit light to diode-connect the driving transistor T1, and the threshold voltage of the driving transistor T1 is reduced. Perform the setting step.

Here, the blank time refers to the front porch of the vertical sync signal Vsync and the width of the vertical sync signal Vsync supplied to the scan driver and the back of the vertical sync signal Vsync. Corresponds to the width of the porch (Back Porch).

In order to set the threshold voltage of the driving transistor T1 included in the subpixel, the ground voltage Vss supplied to the second power supply line VSS is the power supply voltage Vdd supplied to the first power supply line VDD. It can switch from the level corresponding to the level corresponding to the ground voltage (Vss).

That is, the second power supply line VSS is pulled up to the power supply voltage Vdd level supplied to the first power supply line VDD. Then, the voltage of the second node (node B) is set to a high voltage corresponding to the difference between the power supply voltage Vdd supplied through the first power supply line VDD and the threshold voltage of the organic light emitting diode D. Can be.

Thereafter, the scan driver may supply the control signal Ctl to the second switching transistor S2 within the blank time. Thus, when the driving transistor T1 is diode connected, the voltage of the second power supply line VSS raised to the power supply voltage Vdd is switched to the ground voltage Vss. Then, the high voltage applied to the second node node B is discharged through one end (drain) of the driving transistor T1 through the other end (source), and the gate voltage of the driving transistor T1 is a threshold voltage. Since the battery is discharged until it reaches, the first node node A may be programmed to the threshold voltage of the driving transistor T1.

Here, in the process of setting the threshold voltage of the driving transistor T1, all the subpixels may proceed simultaneously or for each subpixel.

Next, the driving transistor T1 turns on the first switching transistor S1, stores the data voltage equal to the sum of the threshold voltage and the data signal in the capacitor Cst, and drives the driving transistor T1 corresponding to the data voltage stored in the capacitor Cst. Light emitting the organic light emitting diode (D).

As illustrated, the scan driver may sequentially supply the scan signal Scan1 .. Scan [n] to each subpixel to turn on the first switching transistor S1 included in the subpixel, and the data driver may switch the first switching transistor S1. The transistor S1 may supply a data signal Data1..Data [n] to the turned-on subpixel.

When the first switching transistor S1 is turned on, the capacitor Cst may receive the data signal Data1 through the turned on first switching transistor S1. In this case, the first node node A may have a "Vdata + Vth" voltage obtained by adding the threshold voltages of the data signal Data1 and the driving transistor T1 due to the coupling phenomenon of the capacitor Cst. Therefore, the data voltage stored in the capacitor Cst may be "Vdata + Vth".

According to such a driving scheme, the amount of current flowing in the driving transistor T1 may be set irrespective of the threshold voltage of the driving transistor T1. When the current equation of the driving transistor T1 is expressed by the equation, It can be described as Equation 1.

Thereafter, when the turned-on first switching transistor S1 is turned off, the driving transistor T1 may drive in response to the data voltage stored in the capacitor Cst. Then, the organic light emitting diode D may emit light corresponding to the voltage applied to the gate of the driving transistor T1.

On the other hand, as described above, when the threshold voltage of the driving transistor T1 included in the sub-pixel is set within the blank time in which the organic light emitting diode D does not emit light, the emission time which is the time at which the organic light emitting diode D emits light is emitted. It is possible to increase the emission time rather than setting the threshold voltage of the driving transistor T1 within.

As described above, the threshold voltages of all the subpixels of the display unit may be programmed in a blank time of one frame period in a subpixel having a simple structure including three transistors and one capacitor. Thereafter, the gate voltage of the driving transistor may have the sum of the data voltage and the threshold voltage by supplying the data signal through the normal scan signal supply. By such a process, the subpixel included in the organic light emitting display device can improve the luminance imbalance caused by the change of the threshold voltage of the driving transistor.

Although the embodiments of the present invention have been described above with reference to the accompanying drawings, the technical configuration of the present invention described above may be modified in other specific forms by those skilled in the art to which the present invention pertains without changing its technical spirit or essential features. It will be appreciated that it may be practiced. Therefore, the embodiments described above are to be understood as illustrative and not restrictive in all aspects. In addition, the scope of the present invention is shown by the claims below, rather than the above detailed description. Also, it is to be construed that all changes or modifications derived from the meaning and scope of the claims and their equivalent concepts are included in the scope of the present invention.

1 is a schematic plan view of an organic light emitting display device according to an embodiment of the present invention;

FIG. 2A is an exemplary cross-sectional view of the subpixel illustrated in FIG. 1. FIG.

FIG. 2B is another exemplary cross sectional view of the sub-pixel illustrated in FIG. 1; FIG.

3A and 3B are exemplary views for implementing a color image of a subpixel.

4 is a hierarchical structure diagram of an organic light emitting diode included in a subpixel.

5 is a circuit diagram illustrating a subpixel according to an exemplary embodiment of the present invention.

6 is an exemplary driving waveform diagram according to an embodiment of the present invention.

<Explanation of symbols on main parts of the drawings>

120: display unit 140: scan driver

150: data driver P: subpixel

Claims (10)

A first switching transistor driving in response to a scan signal, a capacitor receiving a data signal as the first switching transistor drives and storing the data signal as a data voltage, and driving in response to the data voltage stored in the capacitor A display unit including a plurality of subpixels including a driving transistor, an organic light emitting diode that receives power as the driving transistor is driven, and emits light and a second switching transistor that diode-connects the driving transistor in response to a control signal ; A scan driver supplying the scan signal and the control signal; And Including a data driver for supplying the data signal, The scan driver, And supplying the control signal to the second switching transistor so as to set the threshold voltage of the driving transistor by diode-connecting the driving transistor within a blank time when the organic light emitting diode does not emit light. The method of claim 1, The blank time is, An organic light emitting display device corresponding to a width obtained by adding a front porch of a vertical synchronizing signal, a width of a vertical synchronizing signal, and a back porch of a vertical synchronizing signal supplied from the outside to the scan driver. The method of claim 1, The ground voltage supplied to the sub pixel within the blank time is An organic light emitting display device for switching from a level corresponding to a power supply voltage to a level corresponding to the ground voltage. The method of claim 1, The sub pixel is, A gate connected to a scan line supplied with the scan signal and one end connected to a data line supplied with the data signal, and one end connected to the other end of the first switching transistor, and the other end connected to the first node. A second switching transistor having a gate connected to the capacitor connected to the signal line to which the control signal is supplied, one end connected to the first node, and the other end connected to the second node, and a first electrode connected to the first power line; The organic light emitting diode connected to the second node and the second electrode connected to the second node, and the driving transistor connected to a gate of the first node, one end of which is connected to the second node, and the other end of which is connected to a second power line; Organic light emitting display device. The method of claim 4, wherein The voltage applied to the second node before the second switching transistor is turned on, And a high voltage as the ground voltage supplied through the second power line is switched for a predetermined time to a level corresponding to the power voltage supplied through the first power line. The method of claim 5, The voltage applied to the first node while the second switching transistor is turned on and the driving transistor is diode-connected, And sampling the threshold voltage of the driving transistor as the power voltage supplied to the second power line is switched to the ground voltage. The method of claim 1, Transistors included in the sub pixel, An organic light emitting display device that is an N-type transistor. Diode-connecting the driving transistor by turning on the second switching transistor during a blank time in which the organic light emitting diode of the subpixel including the first switching transistor, the second switching transistor, the capacitor, the driving transistor, and the organic light emitting diode does not emit light; Setting a threshold voltage of the driving transistor; And The organic light emitting diode is turned on by using the driving transistor that turns on the first switching transistor, stores a data voltage equal to the sum of the threshold voltage and the data signal, and drives the first switching transistor to correspond to the data voltage stored in the capacitor. A driving method of an organic light emitting display device comprising the step of making. The method of claim 8, The blank time is, A method of driving an organic light emitting display device, the width corresponding to the sum of the front porch of the vertical sync signal, the width of the vertical sync signal, and the back porch of the vertical sync signal. The method of claim 8, The ground voltage supplied to the sub pixel within the blank time is A method of driving an organic light emitting display device which switches from a level corresponding to a power supply voltage to a level corresponding to the ground voltage.

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