KR20090045493A - Mask for manufacturing semiconductor device, method for manufacturing semiconductor device using the mask, and semiconductor device manufactured by the mask and manufacturing method - Google Patents

Mask for manufacturing semiconductor device, method for manufacturing semiconductor device using the mask, and semiconductor device manufactured by the mask and manufacturing method Download PDF

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Publication number
KR20090045493A
KR20090045493A KR1020070111336A KR20070111336A KR20090045493A KR 20090045493 A KR20090045493 A KR 20090045493A KR 1020070111336 A KR1020070111336 A KR 1020070111336A KR 20070111336 A KR20070111336 A KR 20070111336A KR 20090045493 A KR20090045493 A KR 20090045493A
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KR
South Korea
Prior art keywords
pattern
mask
semiconductor device
manufacturing
main
Prior art date
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KR1020070111336A
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Korean (ko)
Inventor
전영두
Original Assignee
주식회사 동부하이텍
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Priority to KR1020070111336A priority Critical patent/KR20090045493A/en
Publication of KR20090045493A publication Critical patent/KR20090045493A/en

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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/26—Phase shift masks [PSM]; PSM blanks; Preparation thereof
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/36—Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70433—Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors
    • G03F7/70441—Optical proximity correction [OPC]

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mask for manufacturing a semiconductor device, a method for manufacturing a semiconductor device using the same, and a semiconductor device manufactured by the mask and the manufacturing method. It relates to a semiconductor device comprising a mask, a method of manufacturing a semiconductor device which can improve the manufacturing efficiency of the semiconductor device using the mask, and a contact hole manufactured by the mask and the manufacturing method, and to prevent distortion of the pattern. .

A method of manufacturing a semiconductor device according to an embodiment of the present invention includes forming a plurality of main patterns on a mask to form a predetermined pattern on a semiconductor substrate, and forming a plurality of auxiliary patterns around the main pattern; And forming a pattern on the semiconductor substrate by performing a photolithography process and an etching process using a mask on which the main pattern and the auxiliary pattern are formed.

The method of manufacturing a semiconductor device according to an embodiment of the present invention may prevent distortion of the contact hole pattern due to an optical proximity effect, thereby improving reliability and manufacturing efficiency of the semiconductor device.

 Mask, pattern, contact hole, main pattern, auxiliary pattern

Description

Mask for manufacturing a semiconductor device and a method for manufacturing a semiconductor device using the same, and a semiconductor device manufactured by the mask and the manufacturing method (mask for manufacturing semiconductor device, method for manufacturing semiconductor device using the mask, and semiconductor device manufactured by the mask and manufacturing method}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mask for manufacturing a semiconductor device, a method for manufacturing a semiconductor device using the same, and a semiconductor device manufactured by the mask and the manufacturing method. It relates to a semiconductor device comprising a mask, a method of manufacturing a semiconductor device which can improve the manufacturing efficiency of the semiconductor device using the mask, and a contact hole manufactured by the mask and the manufacturing method, and to prevent distortion of the pattern. .

In general, a mask pattern forming technique for semiconductors has a great influence on the accuracy of patterns of various elements formed on a semiconductor substrate. In particular, the higher the degree of integration of the semiconductor pattern, the less space there is to insert the optical proximity compensation pattern, and unlike the original intention of the photo lithography process, a bridge is generated between the patterns. This results in the semiconductor device deteriorating its characteristics.

The photolithography process is a technique for precisely adjusting the amount of light emitted by the mask by elaborating the mask design, and the optical proximity compensation technology and the phase shifting mask technology have emerged. In order to minimize the distortion of light due to the pattern shape formed on the mask, various techniques have been developed.

In recent years, the development of chemically amplified photoresists with excellent photosensitivity to light of far ultraviolet wavelengths (248 mm or 194 mm) has been developed to improve the resolution. A dummy pattern (auxiliary pattern) forming technique has been proposed.

The technique disclosed in Korean Patent Laid-Open Publication No. 10-2005-0069507 (July 05, 2005), which has been previously applied for a patent, arranges one dummy pattern between end portions of a main pattern of a semiconductor device, and in a direction perpendicular to the dummy pattern. By arranging a plurality of divided auxiliary patterns, a manufacturing method capable of compensating for the pattern distortion caused by the optical proximity effect and producing a uniform line width has been proposed. However, this manufacturing method is applicable to the prevention of the pattern distortion of the SRAM, but has a problem that is difficult to apply to the manufacturing method for forming a contact hole (contact hole).

The technique described in Korean Patent Laid-Open Publication No. 10-2005-0069507 (July 05, 2005) reduces contact distortion by preventing shrinkage caused by interference between adjacent patterns, thereby reducing contact holes. There is a limit to the application of the method of forming contact holes. This is because the contact hole is not only the reduction of the pattern but also the shape of the contact hole formed.

FIG. 1 is a diagram illustrating contact holes arranged in a vertical direction according to the prior art, and FIG. 2 is a simulation diagram illustrating a distortion phenomenon of contact holes formed and arranged in the vertical direction shown in FIG. 1.

1 and 2, in the photolithography process, interaction between surrounding patterns occurs when forming a pattern. This interaction is an interference phenomenon between patterns, which greatly affects the size or shape of the pattern. For this reason, as shown in FIG. 1, when the plurality of contact holes 20 are formed vertically on the semiconductor substrate 10, interactions are generated between the contact holes 20 formed in the contact holes 20. This affects the shape. That is, as shown in FIGS. 1 and 2, the shape of the contact hole 20 has an elliptical shape that is long in the vertical direction rather than circular. The distortion of the shape of the contact hole 20 is a disadvantage in reducing the performance and productivity of the semiconductor device.

Recently, as the degree of integration of semiconductor devices increases, the possibility of a bridge phenomenon due to distortion of a contact hole shape increases in a reality in which a margin of design is insufficient. There is a need for a mask for manufacturing a semiconductor device for improving such a problem, and a manufacturing method capable of improving the manufacturing efficiency of the device.

In the pattern formation method according to the prior art, the interaction between the surrounding patterns occurs when the pattern is formed. This interaction is an interference phenomenon between patterns, which greatly affects the size or shape of the pattern. For this reason, when a plurality of contact holes are formed in a predetermined direction on a semiconductor substrate, interactions are generated between the contact holes, which affect the shape of the contact holes. The shape of the contact hole is not circular, but has an elliptical shape that is long in the vertical direction or the left and right directions. The distortion of the contact hole shape is a disadvantage in reducing the performance and productivity of the semiconductor device.

The present invention for solving the above problems provides a mask for manufacturing a semiconductor device for preventing the distortion of the contact hole pattern due to the optical proximity effect.

The present invention for solving the above problems provides a method of manufacturing a semiconductor device that can improve the manufacturing efficiency of the semiconductor device using the mask.

The present invention provides a semiconductor device having a contact hole manufactured by the mask and the manufacturing method to prevent the distortion of the pattern.

In accordance with another aspect of the present invention, a method of manufacturing a semiconductor device includes: forming a plurality of main patterns on a mask to form a predetermined pattern on a semiconductor substrate; And forming a pattern on the semiconductor substrate by performing a photolithography process and an etching process using a mask on which the main pattern and the auxiliary pattern are formed. .

A method of manufacturing a semiconductor device according to an embodiment of the present invention is characterized in that the auxiliary pattern is formed to have a size of 5% to 15% of the main pattern size.

A method of manufacturing a semiconductor device according to an embodiment of the present invention is characterized in that the gap between the main pattern and the auxiliary pattern is formed to be equal to or larger than the size of the auxiliary pattern.

A method of manufacturing a semiconductor device according to an embodiment of the present invention is characterized in that the plurality of main patterns are formed in one direction.

A method of manufacturing a semiconductor device according to an embodiment of the present invention is characterized in that the auxiliary pattern is formed on the left and right of each of the plurality of main patterns when the plurality of main patterns are formed in the vertical direction.

A method of manufacturing a semiconductor device according to an embodiment of the present invention is characterized in that the auxiliary pattern is formed above and below each of the plurality of main patterns when the plurality of main patterns are formed in the left and right directions.

A method of manufacturing a semiconductor device according to an embodiment of the present invention is characterized in that the auxiliary pattern is formed on the top, bottom, left, and right sides of each of the plurality of main patterns when the plurality of main patterns are formed in up, down, left, and right directions.

The mask of the method of manufacturing a semiconductor device according to an embodiment of the present invention is characterized in that the phase shift mask (PSM).

Mask for manufacturing a semiconductor device according to an embodiment of the present invention is a main pattern for forming a predetermined pattern on a semiconductor substrate, and the main pattern size of 5% to 15% of the main pattern size to prevent distortion of the pattern shape Characterized in that it comprises a plurality of auxiliary patterns formed in the periphery of the pattern.

The mask for manufacturing a semiconductor device according to an exemplary embodiment of the present invention may be formed such that an interval between the main pattern and the auxiliary pattern is equal to or larger than the size of the auxiliary pattern.

The semiconductor device according to an exemplary embodiment of the present invention manufactured by the mask and the manufacturing method may include a plurality of contact holes arranged in one direction by the manufacturing method using the mask.

The mask and the method of manufacturing the semiconductor device using the same according to the embodiment of the present invention can prevent the distortion of the contact hole pattern due to the optical proximity effect, thereby improving the reliability and manufacturing efficiency of the semiconductor device.

In addition, the semiconductor device according to the embodiment of the present invention may include contact holes in which pattern distortion is prevented, thereby improving performance and reliability of the device.

Hereinafter, the technical objects and features of the present invention will be apparent from the description of the accompanying drawings and the embodiments. Looking at the present invention in detail.

In general, a semiconductor device is manufactured by the following steps.

1. Single Crystal Growth: Process of growing single crystal silicon rods while contacting and rotating seed crystals to a highly purified silicon melt.

2. Silicon Rod Cutting: The grown silicon rod is cut into thin wafers of uniform thickness. At this time, the size of the wafer is determined according to the diameter of the silicon rod and made of 3 inches, 4 inches, 6 inches, 8 inches, 12 inches, and technology is gradually developed to large diameter wafers.

3. Polishing the surface of the wafer: Polish one or both sides of the wafer to make it like a mirror surface, and form a circuit pattern on the polished surface.

4. Circuit Design: Design a circuit pattern to be drawn on the electronic circuit and the actual wafer using a CAD (Computer Aided Design) system.

5. Mask manufacturing: Draw a designed circuit pattern on the substrate to form a mask.

6. Oxidation process: Oxygen or water vapor is chemically reacted with silicon wafer surface at 800 ℃ ~ 1200 ℃ to form a thin and uniform silicon oxide film (SiO2).

7. Photo Resist Coating: Photoresist (PR), a light-sensitive material, is evenly applied on the wafer surface.

8. Exposure process: Take a photo of the circuit pattern on the wafer on which the photoresist film is formed by passing light through the circuit pattern drawn on the mask using an exposure machine.

9. Development process: Develops a film on the surface of the wafer where light is received.

10. Etching process: Use chemicals or reactive gases to selectively remove unwanted parts to form circuit patterns.

11. Ion Implantation Process: The characteristics of electronic devices are made by accelerating impurities into the inside of the wafer by accelerating impurities in the form of fine gas particles in the part connected with the circuit pattern. This is also done by a diffusion process in which particles are diffused into the wafer and injected.

12. Chemical Vapor Deposition (CVD) process: A process of depositing particles formed by chemical reaction between reaction gases on the wafer surface to form an insulating film or conductive film.

13. Metallization process: This is a process of connecting each circuit formed on the wafer surface with aluminum wire. Recently, a wiring method using copper wire instead of aluminum has been developed and used.

14. Wafer automatic selection (EDS Test): Inspection of the electrical operation of the IC chips formed on the wafer with inspection equipment to automatically select defective products.

15. Sawing: A wafer is delivered using a diamond saw to separate many chips formed on the wafer.

16. Chip Bonding: A process of attaching chips on the lead frame, which are judged as good in the EDS test, among the separated chips.

17. Wire Bonding: This process connects the external connection terminal inside the chip and the lead frame with thin wiring.

18. Molding: The process of sealing with the chemical resin to protect the connecting gold wire part. The semiconductor device is finally completed.

A mask for manufacturing a semiconductor device according to an embodiment of the present invention and a method for manufacturing a semiconductor device using the same are related to a manufacturing process ranging from manufacturing a mask to an etching process among the semiconductor device manufacturing processes described above. By improving the mask fabrication process and the photolithography process performed to form the contact hole on the substrate, the distortion of the contact hole pattern due to the optical proximity effect can be prevented, thereby improving the reliability, performance and manufacturing efficiency of the device.

3 is a view showing a contact hole forming method according to an embodiment of the present invention.

Referring to FIG. 3, in the method of manufacturing a semiconductor device according to an embodiment of the present disclosure, in order to prevent distortion of a contact hole shape formed when a plurality of contact holes are formed in a vertical direction on a semiconductor substrate. As illustrated in FIG. 1, a plurality of auxiliary patterns 140 are formed around (mainly left and right) the main pattern 130 formed on the mask 115. Here, "A" is a mask size of the main pattern 130 when 6% Phase Shift Mask (PSM) is applied, and "B" is a space between the main pattern 130 and the auxiliary pattern 140. The interval "C" is a mask size of the auxiliary pattern 140 and has a size of 5% to 15% of the size of the main pattern 130 (preferably 10% of the size of the main pattern). The photolithography process and the etching process using the mask on which the main pattern 130 and the auxiliary pattern 140 are formed are performed to form contact holes on the semiconductor substrate.

Here, the plurality of auxiliary patterns 140 formed around the main pattern 130 (left and right) may be formed in the same size in a size range of 5% to 15% of the size of the main pattern 130, and also main The pattern 130 may be formed to have different sizes in a size range of 5% to 15% of the size.

The mask used in the exposure process has a maximum resolution of about several micrometers, and diffraction occurs when light is irradiated onto the pattern. In the diffraction phenomenon, light enters the bottom of the light shielding layer due to constructive interference and destructive interference, or light of the bottom of the light transmitting layer is weakened. Therefore, in order to compensate for such interference, an offset interference is deliberately formed where the light should not enter or vice versa.

The Phase Shift Mask (PSM) applied to the embodiment of the present invention forms a plurality of slits in the light shielding pattern so as to form a diffraction image, but a phase delay pattern of 180 degrees may be selectively formed in the slits to cancel the diffraction images of adjacent slits.

In the method of manufacturing a semiconductor device according to an embodiment of the present invention, in the process of forming a plurality of contact holes in a vertical direction on a semiconductor substrate, an auxiliary pattern 140 is formed around the main pattern 140 of the contact hole on the mask (left and right). As shown in FIG. 4, it is possible to prevent the shape distortion of the contact holes arranged up and down. This can improve the reliability, performance and manufacturing efficiency of the semiconductor device.

When forming the contact holes arranged up and down through the manufacturing method according to the prior art, as shown in Figure 1, the distortion occurred in the shape of the contact hole 20, but if applying the manufacturing method according to an embodiment of the present invention As illustrated in FIG. 5, the contact hole 120 may be formed on the semiconductor substrate 110 in which distortion of the shape is prevented (improved).

6 is a view showing a contact hole forming method according to a second embodiment of the present invention.

The method of manufacturing a semiconductor device according to the second embodiment of the present invention is illustrated in FIG. 6 to prevent distortion of a contact hole shape formed when a plurality of contact holes are formed in a left and right direction on a semiconductor substrate. Likewise, a plurality of auxiliary patterns 240 may be formed around (upper and lower) the main pattern 230 formed on the mask 215. Here, "A" is a mask size of the main pattern 130 when the 6% Phase Shift Mask is applied, and "B" is an interval between the main pattern 130 and the auxiliary pattern 140. "C" is a mask size of the auxiliary pattern 140 and has a size of 5% to 15% of the size of the main pattern 130 (preferably 10% of the size of the main pattern). Here, the interval "B" between the main pattern 130 and the auxiliary pattern 140 is formed to be equal to or larger than the size ("C") of the auxiliary pattern 140. The photolithography process and the etching process using the mask on which the main pattern 230 and the auxiliary pattern 240 are formed are performed to form contact holes on the semiconductor substrate.

Here, the plurality of auxiliary patterns 240 formed around the main pattern 230 (upper and lower) may be formed in the same size in the size range of 5% to 15% of the size of the main pattern 230, and also the main The pattern 230 may be formed to have different sizes in a size range of 5% to 15% of the size.

In the method of manufacturing a semiconductor device according to the second exemplary embodiment of the present invention, in the process of forming a plurality of contact holes in a left and right direction on a semiconductor substrate, the semiconductor device is assisted around the main pattern 240 of the contact holes (up and down). The pattern 240 may be formed to prevent shape distortion of the contact holes formed by being arranged in the left and right directions.

When the contact hole is formed in one direction through the manufacturing method according to the prior art, as shown in FIG. 1, distortion occurs in the shape of the contact hole 20, but the manufacturing method according to the second embodiment of the present invention is applied. Referring to FIG. 5, a contact hole 120 may be formed on the semiconductor substrate 110 in which shape distortion is prevented (improved). This can improve the reliability, performance and manufacturing efficiency of the semiconductor device.

7 is a view showing a contact hole forming method according to a third embodiment of the present invention.

The manufacturing method of the semiconductor device according to the third embodiment of the present invention combines the manufacturing methods according to the first and second embodiments of the present invention described above, and forms a plurality of contact holes on the semiconductor substrate in the directions of up, down, left and right. In this case, distortion of a contact hole shape formed by interference between adjacent contact holes can be prevented.

In the method of manufacturing a semiconductor device according to the third exemplary embodiment of the present invention, as illustrated in FIG. 7, the semiconductor device may be formed around the main pattern 330 (upper, lower, left, right) of the mask 310 for forming the contact hole. The auxiliary pattern 340 is formed.

Here, the plurality of auxiliary patterns 340 formed around the main pattern 330 (upper, lower, left, right) may be formed in the same size in a size range of 5% to 15% of the size of the main pattern 330. It may also be formed to have different sizes in the size range of 5% to 15% of the size of the main pattern 330.

Through the main pattern 330 and the auxiliary pattern 340, it is possible to prevent the shape distortion of the contact hole formed on the semiconductor substrate in the up, down, left, and right directions.

When forming the contact holes arranged up and down through the manufacturing method according to the prior art, as shown in Figure 1, the distortion occurred in the shape of the contact hole 20, the manufacturing method according to the third embodiment of the present invention When applied, as shown in FIG. 5, the contact hole 120 having the improved shape distortion may be formed on the semiconductor substrate 110. This can improve the reliability and manufacturing efficiency of the semiconductor device.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes can be made without departing from the technical spirit of the present invention. It will be evident to those who have knowledge of. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

1 is a view showing contact holes arranged in a vertical direction by the prior art;

FIG. 2 is a simulation diagram illustrating a distortion phenomenon of contact holes formed by being arranged in the vertical direction shown in FIG. 1.

3 is a view showing a contact hole forming method according to a first embodiment of the present invention.

Figure 4 is a simulation showing the improvement of the contact hole distortion phenomenon by the manufacturing method according to an embodiment of the present invention.

5 is a SEM diagram showing a contact hole formed by the manufacturing method according to an embodiment of the present invention.

6 is a view showing a contact hole forming method according to a second embodiment of the present invention;

7 is a view showing a contact hole forming method according to a third embodiment of the present invention;

<Explanation of symbols for the main parts of the drawings>

10, 110: semiconductor substrate 20, 120: contact hole

115: mask 130: the main pattern

140: auxiliary pattern

Claims (12)

Forming a plurality of main patterns on a mask to form a predetermined pattern on the semiconductor substrate, Forming a plurality of auxiliary patterns around the main pattern; And forming a pattern on the semiconductor substrate by performing a photolithography process and an etching process using a mask having the main pattern and the auxiliary pattern formed thereon. The method of claim 1, The auxiliary pattern has a size of 5% to 15% of the main pattern size. The method of claim 2, The gap between the main pattern and the auxiliary pattern is formed to be equal to or larger than the size of the auxiliary pattern. The method of claim 3, wherein The plurality of main patterns is a semiconductor device manufacturing method characterized in that formed in one direction. The method of claim 4, wherein The auxiliary pattern is formed on the left and right of each of the plurality of main patterns when the plurality of main patterns are formed in the vertical direction. The method of claim 4, wherein The auxiliary pattern is formed above and below each of the plurality of main patterns when the plurality of main patterns are formed in the left and right directions. The method of claim 4, wherein The auxiliary pattern is formed on the top, bottom, left, and right sides of each of the plurality of main patterns when the plurality of main patterns are formed in up, down, left and right directions. The method of claim 1, The mask is a method of manufacturing a semiconductor device, characterized in that the phase shift mask (PSM). The method of claim 1, The pattern is a manufacturing method of a semiconductor device, characterized in that the contact hole. A main pattern for forming a predetermined pattern on the semiconductor substrate, And a plurality of auxiliary patterns formed around the main pattern in a size of 5% to 15% of the main pattern size to prevent distortion of the pattern shape. The method of claim 10, And a gap between the main pattern and the auxiliary pattern is equal to or larger than a size of the auxiliary pattern. A semiconductor device comprising a plurality of contact holes arranged in one direction by the manufacturing method of claim 1 using the mask of claim 10.
KR1020070111336A 2007-11-02 2007-11-02 Mask for manufacturing semiconductor device, method for manufacturing semiconductor device using the mask, and semiconductor device manufactured by the mask and manufacturing method KR20090045493A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100949889B1 (en) * 2008-03-17 2010-03-25 주식회사 하이닉스반도체 The exposure mask and the manufacturing method of semiconductor device using the same
JP2018151618A (en) * 2017-03-10 2018-09-27 Hoya株式会社 Photomask for manufacturing display device and method for manufacturing display device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100949889B1 (en) * 2008-03-17 2010-03-25 주식회사 하이닉스반도체 The exposure mask and the manufacturing method of semiconductor device using the same
JP2018151618A (en) * 2017-03-10 2018-09-27 Hoya株式会社 Photomask for manufacturing display device and method for manufacturing display device

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