KR20090022767A - Soi wafer and method for fabricating the same - Google Patents

Soi wafer and method for fabricating the same Download PDF

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Publication number
KR20090022767A
KR20090022767A KR1020070088385A KR20070088385A KR20090022767A KR 20090022767 A KR20090022767 A KR 20090022767A KR 1020070088385 A KR1020070088385 A KR 1020070088385A KR 20070088385 A KR20070088385 A KR 20070088385A KR 20090022767 A KR20090022767 A KR 20090022767A
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South Korea
Prior art keywords
silicon layer
silicon
layer
crystal orientation
silicon substrate
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KR1020070088385A
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Korean (ko)
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고정근
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주식회사 하이닉스반도체
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Publication of KR20090022767A publication Critical patent/KR20090022767A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76294—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using selective deposition of single crystal silicon, i.e. SEG techniques

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  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Element Separation (AREA)

Abstract

The present invention discloses a silicon on insulator (SOI) wafer and a method of manufacturing the same, in which some regions of the silicon layer in which the device is formed have different crystal orientations from the other regions. An SOI wafer in accordance with the disclosed subject matter comprises a silicon substrate; A buried oxide film formed on the silicon substrate; And a silicon layer formed on the buried oxide film, wherein the silicon layer is formed of a first silicon layer having a first direction and a second direction layer disposed at both edge portions of the first silicon layer. And a buried oxide film having a hole for exposing a portion of the silicon substrate under the second silicon layer, and the second silicon layer is formed to contact the exposed silicon substrate portion through the hole.

Description

SOI wafer and its manufacturing method {SOI WAFER AND METHOD FOR FABRICATING THE SAME}

The present invention relates to a silicon on insulator (SOI) wafer and a method of manufacturing the same, and more particularly, to an SOI wafer and a method of manufacturing the same in which some regions of the silicon layer in which the device is formed have different crystal orientations from the other regions. It is about.

As high integration, high speed, and low power of semiconductor devices have progressed, semiconductor devices using SOI wafers have been attracting attention instead of substrates made of bulk silicon. This is because the device formed on the SOI wafer has higher speed due to smaller junction capacitance, lower voltage due to lower threshold voltage, and latch-up due to complete device separation compared to the device formed on the substrate made of bulk silicon. This is because it has advantages such as elimination of).

1 is a cross-sectional view illustrating a conventional SOI wafer. As shown, the SOI wafer has a structure in which a buried oxide film 120 is interposed between the silicon substrate 110 supporting the entirety and the silicon layer 130 on which the device is formed, and typically, SIMOX (seperation by implanted) It is formed by an oxygen method and a bonding method.

The SIMOX method is a method of obtaining an SOI wafer by injecting oxygen ions into a substrate made of bulk silicon, then heat treating the substrate to react oxygen ions with silicon to form a buried oxide film that separates the substrate in the substrate.

The bonding method forms an oxide film on the first silicon substrate for supporting the entirety of the prepared two silicon substrates, and after bonding the second silicon substrate on the oxide film, grinding and CMP (Chemical Mechanical Polishing) A method of obtaining an SOI wafer by polishing a rear surface of the second silicon substrate through a process of forming a silicon layer having a desired thickness.

Meanwhile, a method of manufacturing a heterogeneous SOI wafer in which a silicon layer in which the device is formed has different crystal orientations so that the efficiency of the SOI device is improved by increasing the mobility of particles when manufacturing the SOI device using the SOI wafer. It has been proposed. Such heterogeneous SOI wafers are formed through a bonding method.

2 is a cross-sectional view illustrating a heterogeneous SOI wafer according to the prior art. As shown, the heterojunction SOI wafer has a structure in which a buried oxide film 120 is interposed between the silicon substrate 110 supporting the entirety and the silicon layer 130 on which the device is formed. And a portion 130a having a crystal orientation of <100> and a portion 130b having a crystal orientation of <110>.

However, in the prior art described above, since the bonding method is used to manufacture heterogeneous SOI wafers, there is a limitation that the process for producing such heterogeneous SOI wafers is very difficult.

The present invention provides a silicon on insulator (SOI) wafer and a method of manufacturing the same in which some regions of the silicon layer in which the device is formed have different crystal orientations from the other regions.

SOI (Silicon On Insulator) wafer according to an embodiment of the present invention, a silicon substrate; A buried oxide film formed on the silicon substrate; And a silicon layer formed on the buried oxide film, wherein the silicon layer is formed of a first silicon layer having a first direction and a second direction layer disposed at both edge portions of the first silicon layer. And a buried oxide film having a hole for exposing a portion of the silicon substrate under the second silicon layer, and the second silicon layer is formed to contact the exposed silicon substrate portion through the hole.

Here, the second silicon layer has the same crystal orientation as the silicon substrate, and has a different crystal orientation from the first silicon layer.

The first silicon layer has a crystal orientation of <110>, and the silicon substrate and the second silicon layer have a crystal orientation of <100>.

The first silicon layer has a crystal orientation of <100>, and the silicon substrate and the second silicon layer have a crystal orientation of <110>.

The second silicon layer is formed of an epitaxial layer grown through a portion of the silicon substrate exposed by the hole.

The semiconductor device may further include an insulating film formed at an interface between the first silicon layer and the second silicon layer.

The insulating film is made of an oxide film or a nitride film.

In addition, the method for manufacturing an SOI wafer according to an embodiment of the present invention includes the steps of sequentially forming a buried oxide film and a first silicon layer having a first orientation on a silicon substrate; Etching both edge portions of the first silicon layer to expose the buried oxide film; Forming an insulating film on sidewalls of the etched first silicon layer; Etching the exposed investment oxide layer to form a hole exposing a portion of the silicon substrate; And forming a second silicon layer disposed on both sides of the first silicon layer on the silicon substrate and the buried oxide film exposed by the hole and having a second orientation.

Here, the second silicon layer has the same crystal orientation as the silicon substrate and is formed to have a different crystal orientation from the first silicon layer.

The first silicon layer is formed to have a crystal orientation of <110>, and the silicon substrate and the second silicon layer are formed to have a crystal orientation of <100>.

The first silicon layer is formed to have a crystal orientation of <100>, and the silicon substrate and the second silicon layer are formed to have a crystal orientation of <110>.

The insulating film is formed of an oxide film or a nitride film.

The second silicon layer is formed by growing an epitaxial layer from a silicon substrate exposed by the hole.

The epitaxial layer is grown through a selective epitaxial growth (SEG) method.

The SEG method is carried out by a chemical vapor deposition (CVD) process at a temperature of 700 ~ 1200 ℃ and pressure conditions of 1mTorr ~ 800Torr.

The SEG method is performed while doping boron in the epi layer in-situ.

The epitaxial layer is grown through a solid phase epitaxy (SPE) method.

The SPE method, the step of growing an epi layer at a temperature of 450 ~ 600 ℃; And heat treating the grown epitaxial layer in an Ar gas atmosphere.

And after forming the second silicon layer, planarizing the second silicon layer to expose the first silicon layer.

The present invention provides a device by etching a buried oxide film of an SOI wafer including a silicon substrate, an buried oxide film, and a first silicon layer to form a hole exposing the silicon substrate, and then growing a second silicon layer from the silicon substrate on the bottom of the hole. It is possible to manufacture a heterogeneous SOI wafer in which the silicon layer to be formed is composed of a first silicon layer and a second silicon layer having different crystal orientations.

In addition, according to the present invention, by fabricating a heterogeneous SOI wafer in which the silicon layers have different directions, the mobility of particles may be increased when manufacturing the SOI device, thereby improving the efficiency of the SOI device.

In addition, the present invention uses a method of growing an epitaxial layer instead of the conventional bonding method to fabricate the heterogeneous SOI wafer, thereby simplifying the manufacturing process of the heterogeneous SOI wafer, and selectively determining other regions in the desired region. A silicon layer having directivity can be formed.

Hereinafter, with reference to the accompanying drawings will be described in detail a preferred embodiment of the present invention.

3 is a cross-sectional view for describing an SOI wafer according to an embodiment of the present invention.

As shown, an buried oxide film 320 is formed on the silicon substrate 310, and a silicon layer 330 is formed on the buried oxide film 320. The silicon layer 330 is composed of a first silicon layer 330a having a first directivity and a second silicon layer 330b having a second directivity disposed at both edge portions of the first silicon layer 330a. . In addition, the buried oxide film 320 has a hole H exposing a portion of the silicon substrate 310 under the second silicon layer 330b, and the second silicon layer 330b is formed through the hole H. It is formed to contact the exposed portion of the silicon substrate 310.

Here, the second silicon layer 330b has the same crystal orientation as the silicon substrate 310 and has a different crystal orientation than the first silicon layer 330a. For example, the first silicon layer 330a has a crystal orientation of <110>, and the silicon substrate 310 and the second silicon layer 330b have a crystal orientation of <100>, or the first The silicon layer 330a has a crystal orientation of <100> and the silicon substrate 310 and the second silicon layer 330b have a crystal orientation of <110>.

In addition, the second silicon layer 330b is formed of an epitaxial layer grown through a portion of the silicon substrate 310 exposed by the hole H. In this case, a growth preventing insulating layer 336 is formed at an interface between the first silicon layer 330a and the second silicon layer 330b so that the epitaxial layer is grown with the same crystal orientation as the silicon substrate 310. The insulating film 336 is formed of an oxide film or a nitride film.

4A to 4E are cross-sectional views of processes for describing a method of manufacturing an SOI wafer according to an exemplary embodiment of the present invention.

Referring to FIG. 4A, a first silicon layer 330a is sequentially formed on the buried oxide film 320 on the silicon substrate 300. In this case, the first silicon layer 330a is formed to have a different crystal orientation from the silicon substrate 300.

Referring to FIG. 4B, after the silicon oxide layer 332 is formed on the first silicon layer 330a, a first mask pattern 334 is formed on the silicon oxide layer 332. Thereafter, the silicon oxide layer 332 is dry-etched using the first mask pattern 334 as an etching mask.

Referring to FIG. 4C, the first mask pattern is removed, and then a portion of the first silicon layer 330a exposed by the silicon oxide layer 332 is etched. The etching is performed by a wet method using a chemical capable of selectively removing only the first silicon layer 330a, and the buried oxide layer 320 at both edges of the first silicon layer 330a is exposed.

Referring to FIG. 4D, after removing the silicon oxide layer, an insulating layer 336 is formed on sidewalls of the etched first silicon layer 330a. The insulating film 336 is formed of an oxide film or an nitride film through an oxidation process. Here, the insulating layer 336 serves as a growth prevention layer to prevent the epi layer from growing from the first silicon layer 330a when the epi layer is subsequently grown.

Referring to FIG. 4E, a second mask pattern 338 is formed on the first silicon layer 330a and the buried oxide film 320 having the insulating film 336 formed on a sidewall thereof. Subsequently, a portion of the buried oxide film 320 exposed by the second mask pattern 338 is etched to form a hole H exposing a portion of the silicon substrate 310.

Referring to FIG. 4F, the second mask pattern is removed, and then, both sides of the first silicon layer 330a are disposed on the silicon substrate 310 and the buried oxide film 320 exposed by the hole H. And a second silicon layer 330b having a second directivity. The second silicon layer 330b is formed by growing an epitaxial layer having the same orientation as the silicon substrate 310 from the silicon substrate 310 exposed by the hole H.

In this case, the epitaxial layer is grown through a selective epitaxial growth (SEG) method. The SEG method is performed by a chemical vapor deposition (CVD) process at a high temperature of about 700 to 1200 ℃ and a pressure of about 1 mTorr to 800 Torr, wherein the CVD process is used to grow an epitaxial layer to increase the growth rate of the epitaxial layer. In-Situ may also be performed while doping boron in the epi layer.

In addition, the epitaxial layer may be grown through a solid phase epitaxy (SPE) method. The SPE method is performed by heat treatment in an Ar gas atmosphere so that the epi layer is grown at a low temperature of about 450 to 600 ° C. so that the grown epi layer has the same crystal orientation as the silicon substrate 310.

Next, CMP (Chemical Mechanical Polishing) to expose the second silicon layer 330b to expose the first silicon layer 330a so that the second silicon layer 330b has a thickness uniformity with the first silicon layer 330a. Flattening is preferable. As a result, a silicon layer 330 including the first silicon layer 330a and the second silicon layer 330b disposed at both edge portions of the first silicon layer 330a is formed on the buried oxide film 320. do.

Here, since the second silicon layer 330 is formed to contact the silicon substrate 310 through the hole H, the second silicon layer 330 has the same crystal orientation as that of the silicon substrate 310 and the first silicon layer 330a. It is formed to have a crystal orientation different from.

For example, the first silicon layer 330a has a crystal orientation of <110>, and the silicon substrate 310 and the second silicon layer 330b have a crystal orientation of <100>, or the first The silicon layer 330a has a crystal orientation of <100> and the silicon substrate 310 and the second silicon layer 330b have a crystal orientation of <110>.

Then, although not shown, a series of subsequent known processes are sequentially performed to complete the SOI wafer according to the embodiment of the present invention.

Herein, the present invention manufactures a heterogeneous SOI wafer in which some regions of the silicon layer in which the device is formed have different crystal orientations from the other regions, thereby increasing the mobility of particles in manufacturing the SOI device, thereby increasing the mobility of the SOI device. Improve efficiency In other words, by forming a PMOS transistor on a silicon layer having a crystal orientation of <110> and an NMOS transistor on a silicon layer having a crystal orientation of <100>, SOI device characteristics can be improved.

In addition, the present invention can simplify the manufacturing process of the heterogeneous SOI wafer by using an epitaxial growth method instead of the conventional bonding method for manufacturing the heterogeneous SOI wafer.

In addition, the present invention can form a silicon layer having a different crystal orientation selectively in a desired region in manufacturing the heterogeneous SOI wafer.

1 is a cross-sectional view for explaining a SOI wafer according to the prior art.

2 is a cross-sectional view illustrating a heterogeneous SOI wafer according to the prior art.

3 is a cross-sectional view illustrating an SOI wafer according to an embodiment of the present invention.

4A to 4F are cross-sectional views of processes for describing a method of manufacturing an SOI wafer, according to an embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

310: silicon substrate 320: investment oxide film

330a: first silicon layer 332: silicon oxide film

334: first mask pattern 336: insulating film

338: second mask pattern H: hole

330b: second silicon layer 330: silicon layer

Claims (19)

Silicon substrates; A buried oxide film formed on the silicon substrate; A silicon on insulator (SOI) wafer comprising: a silicon layer formed on the buried oxide film; The silicon layer is composed of a first silicon layer having a first direction and a second silicon layer having a second direction disposed on both edge portions of the first silicon layer, The buried oxide layer has a hole exposing a portion of the silicon substrate under the second silicon layer, And the second silicon layer is formed to contact the exposed silicon substrate portion through the hole. The method of claim 1, And the second silicon layer has the same crystal orientation as the silicon substrate and has a different crystal orientation from the first silicon layer. The method of claim 2, And the first silicon layer has a crystal orientation of <110>, and the silicon substrate and the second silicon layer have a crystal orientation of <100>. The method of claim 2, And the first silicon layer has a crystal orientation of <100> and the silicon substrate and the second silicon layer have a crystal orientation of <110>. The method of claim 1, And the second silicon layer is formed of an epitaxial layer grown through a portion of the silicon substrate exposed by the hole. The method of claim 1, And an insulating film formed at an interface between the first silicon layer and the second silicon layer. The method of claim 6, And the insulating film is formed of an oxide film or a nitride film. Sequentially forming a buried oxide film and a first silicon layer having a first orientation on the silicon substrate; Etching both edge portions of the first silicon layer to expose the buried oxide film; Forming an insulating film on sidewalls of the etched first silicon layer; Etching the exposed investment oxide layer to form a hole exposing a portion of the silicon substrate; And Forming a second silicon layer disposed on both sides of the first silicon layer on the silicon substrate and the buried oxide film exposed by the hole and having a second direction; SOI wafer manufacturing method comprising a. The method of claim 8, And the second silicon layer has the same crystal orientation as the silicon substrate and is formed to have a crystal orientation different from that of the first silicon layer. The method of claim 9, Wherein the first silicon layer is formed to have a crystal orientation of <110>, and the silicon substrate and the second silicon layer are formed to have a crystal orientation of <100>. The method of claim 9, The first silicon layer is formed to have a crystal orientation of <100>, and the silicon substrate and the second silicon layer is formed to have a crystal orientation of <110>. The method of claim 8, And said insulating film is formed of an oxide film or a nitride film. The method of claim 8, And the second silicon layer is formed by growing an epi layer from a silicon substrate exposed by the hole. The method of claim 13, The epi layer is a method of manufacturing an SOI wafer, characterized in that by growing through a selective epitaxial growth (SEG) method. The method of claim 14, The SEG method is a method of manufacturing an SOI wafer, characterized in that performed by a CVD (Chemical Vapor Deposition) process at a temperature of 700 ~ 1200 ℃ and 1mTorr ~ 800 Torr. The method of claim 14, The SEG method is a method of manufacturing an SOI wafer, characterized in that performed by doping the boron in the epi layer in-situ (In-Situ). The method of claim 13, The epi layer is a manufacturing method of a SOI wafer, characterized in that the growth by SPE (Solid Phase Epitaxy) method. The method of claim 17, The SPE method, Growing an epi layer at a temperature of 450-600 ° C .; And And heat-treating the grown epitaxial layer in an Ar gas atmosphere. The method of claim 8, After forming the second silicon layer, Planarizing the second silicon layer to expose the first silicon layer; SOI wafer manufacturing method characterized in that it further comprises.
KR1020070088385A 2007-08-31 2007-08-31 Soi wafer and method for fabricating the same KR20090022767A (en)

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