JP2002118259A - Manufacturing method of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device, which can fully suppress the floating effect of a substrate that accompanies an impact ionization in a SOI device. SOLUTION: The manufacturing method of a semiconductor device is provided with a process for preparing a SOI substrate 1, a process for forming a gate oxide film 6 on the surface of a single crystal Si layer, a process for forming a dummy gate electrode on this film 6, a process for implanting impurity ions in the Si layer using the dummy gate electrode as a mask, a process for forming diffusion layers 16 and 17 in source and drain regions in the Si layer by annealing the Si layer, a process that a silicon oxide film 21 is deposited on the entrire surface including the dummy gate electrode and a CMP is performed to expose the upper surface of the dummy gate electrode, a process for removing the dummy gate electrode and a process that Ar ions are implanted in the Si layer using the film 21 as a mask to form a damaged layer 11 in the Si layer.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a semiconductor device having an SOI structure. In particular, the present invention relates to a method for manufacturing a semiconductor device capable of sufficiently suppressing a substrate floating effect.

[0002]

2. Description of the Related Art A method of forming a transistor in a single crystal semiconductor layer on an insulating film is known as an SOI (Silicon On Insulator) structure. Hereinafter, the MO formed on the SOI substrate will be described.
A method for manufacturing the S transistor will be described.

FIGS. 11A and 11B are cross-sectional views showing a conventional method for manufacturing a semiconductor device. First, the SOI substrate 1
Prepare 01. The SOI substrate 101 includes a support substrate 102 made of single crystal silicon, an insulating film 103 formed on the support substrate 102, and a single crystal Si layer 104 formed on the insulating film 103. I have.
The SOI substrate 101 can be manufactured by various manufacturing methods.
It can also be manufactured by OX (separation by Implanted oxygen) or the like. The bonding method is a method in which two silicon substrates having an insulating film on the surface are prepared, and the insulating films of the silicon substrates are bonded to each other to form an SOI.
This is a method for manufacturing a substrate. SIMOX is a method for manufacturing an SOI substrate by implanting oxygen at a high concentration into a single crystal silicon substrate to form an oxide film inside the silicon substrate.

Next, as shown in FIG. 11A, a trench is formed in the single crystal Si layer 104, and a silicon oxide film is buried in the trench. Thus, an element isolation film 105 made of a silicon oxide film is formed in an element isolation region on the insulating film 103. Next, a P-type impurity is ion-implanted into the single-crystal Si layer 104.

Thereafter, a gate oxide film 106 is formed on the surface of the single crystal Si layer 104 by a thermal oxidation method. Next, a polysilicon film is deposited on the entire surface including the gate oxide film 106, and the polysilicon film is patterned to form a gate electrode 107 on the gate oxide film.

Next, while rotating the SOI substrate 101, high-energy Ar ions 109 are obliquely implanted under the condition that the concentration becomes maximum at the bottom of the single-crystal Si layer 104. As a result, a damage layer 111 including a crystal defect is formed at the bottom of the single crystal Si layer 104 located below the gate electrode. This damage layer 111 is made of SO
This is for suppressing the substrate floating effect due to impact ionization in the I device. In other words, when there is no damage layer, the single-crystal Si layer 104 is insulated from the support substrate 102, so that minority carriers (holes) generated by a strong drain electric field or the like are transiently accumulated in the single-crystal Si layer. Although the threshold voltage fluctuates as a result, when the damage layer 111 is present, the recombination of holes generated in the single crystal Si layer is promoted, and the lifetime of the holes is shortened. The accumulation of holes in the substrate can be suppressed, and the floating effect of the substrate can be suppressed.

After that, as shown in FIG. 11B, low concentration N-type impurity ions are implanted using the gate electrode 107 as a mask. Next, a silicon oxide film is deposited on the entire surface including the gate electrode 107 by a CVD (Chemical Vapor Deposition) method, and the silicon oxide film is etched on the entire surface. A wall 113 is formed.

Next, N-type impurity ions are implanted using the side wall 113 and the gate electrode 107 as a mask. Thereafter, the SOI substrate 101 is annealed, so that the single-crystal Si layer 104 has a low-concentration N-type diffusion layer 1.
15 and N-type diffusion layers 116, 1 of source / drain regions
17 are formed.

[0009]

In the above-described conventional method for manufacturing a semiconductor device, high energy Ar ions 109 are implanted into the bottom of the single-crystal Si layer 104, and then the low-concentration N-type diffusion layers 115 and Annealing is performed on the SOI substrate to form the N-type diffusion layers 116 and 117 in the source / drain regions. For this reason, crystal defects formed at the bottom of the single crystal Si layer by the ion implantation of Ar ions are recovered, and a sufficient damage layer 111 cannot be formed. Therefore, in a semiconductor device manufactured by a conventional manufacturing method, a substrate floating effect due to impact ionization in an SOI device cannot be sufficiently suppressed.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a method of manufacturing a semiconductor device capable of sufficiently suppressing a substrate floating effect associated with impact ionization in an SOI device. is there.

[0011]

In order to solve the above-mentioned problems, a method of manufacturing a semiconductor device according to the present invention comprises a supporting substrate,
A step of preparing an SOI substrate having a first insulating film formed thereon and a single crystal Si layer formed thereon, a step of forming a gate insulating film on the surface of the single crystal Si layer, Forming a dummy gate electrode on the film, implanting impurity ions into the single-crystal Si layer using the dummy gate electrode as a mask, and annealing the single-crystal Si layer so that the source / drain is added to the single-crystal Si layer. Forming a diffusion layer in the region, and exposing the upper surface of the dummy gate electrode by depositing a second insulating film on the entire surface including the dummy gate electrode and subjecting the second insulating film to CMP polishing or etch back. Removing the dummy gate electrode, and implanting defect forming ions into the single crystal Si layer using the second insulating film as a mask, so that the single crystal Si layer is damaged by crystal defects. Forming a di-layer, characterized by comprising a step of forming a gate electrode on the gate insulating film.

According to the method of manufacturing a semiconductor device described above, after the annealing for forming the diffusion layer of the source / drain region is performed on the single-crystal Si layer, the ions for defect formation are implanted into the single-crystal Si layer. . Therefore, unlike the conventional method for manufacturing a semiconductor device, a crystal defect formed by implantation of defect forming ions is not recovered, and a sufficient damage layer can be formed. Therefore, the substrate floating effect accompanying the impact ionization in the SOI device can be sufficiently suppressed.

In the method of manufacturing a semiconductor device according to the present invention, in the step of forming the damaged layer, when the ions for defect formation are implanted into the single crystal Si layer, the ions for defect formation are obliquely implanted. It is also possible.

In the method of manufacturing a semiconductor device according to the present invention, in the step of forming the damaged layer, when implanting ions for forming defects into the single-crystal Si layer, the defects are formed while rotating the SOI substrate. It is also possible to implant ions obliquely.

[0015]

Embodiments of the present invention will be described below with reference to the drawings. 1 to 6 are sectional views showing a method for manufacturing a semiconductor device according to the first embodiment of the present invention.

First, an SOI substrate 1 is prepared. This SO
The I substrate 1 includes a support substrate 2 made of single crystal silicon, an insulating film 3 formed on the support substrate 2,
And a single-crystal Si layer 4 formed thereon. The SOI substrate 1 can be manufactured by various manufacturing methods.
It can also be manufactured by OX or the like.

Next, as shown in FIG.
A trench is formed on the entire surface including the inside of the trench.
A silicon oxide film is deposited by the VD method. Thereafter, the silicon oxide film existing on the single crystal Si layer 4 is removed by etch back or CMP (Chemical Mechanical Polishing) polishing. As a result, a silicon oxide film is buried in the trench, and an element isolation film 5 made of a silicon oxide film is formed in an element isolation region on the insulating film 3. next,
P-type impurities are ion-implanted into the single crystal Si layer 4.

Thereafter, a gate oxide film 6 is formed on the surface of the single crystal Si layer 4 by a thermal oxidation method. Next, a polysilicon film is deposited on the entire surface including the gate oxide film 6 by a CVD method, and the polysilicon film is patterned to form a dummy gate electrode 7a on the gate oxide film.

Next, low concentration N-type impurity ions are implanted using the dummy gate electrode 7a as a mask. next,
A silicon oxide film is deposited on the entire surface including the dummy gate electrode 7a by the CVD method, and the entire surface of the silicon oxide film is etched to form a sidewall 13 made of the silicon oxide film on the side wall of the dummy gate electrode 7a. .

Thereafter, N-type impurity ions are implanted using the sidewall 13 and the dummy gate electrode 7a as a mask, and the SOI substrate 1 is annealed. This allows
In the single-crystal Si layer 4, a low-concentration N-type diffusion layer 15 and N-type diffusion layers 16 and 17 in source / drain regions are formed.

Next, as shown in FIG. 2, a silicon oxide film 2 is formed on the entire surface including the dummy gate electrode 7a by CVD.
1 is thickly deposited, and the silicon oxide film 21 is polished by CMP or etched back to form a dummy gate electrode 7.
The upper surface of a is exposed.

Thereafter, as shown in FIG. 3, the dummy gate electrode 7a is removed by etching. Next, using the silicon oxide film 21 and the sidewalls 13 as masks, high-energy Ar ions 9 are implanted almost vertically under the condition that the concentration becomes maximum at the bottom of the single-crystal Si layer 4.
As a result, a damage layer 11 composed of crystal defects is formed at the bottom of the single crystal Si layer 4 located below the channel region below the gate electrode 7b. This damage layer 11
This is for suppressing the substrate floating effect due to impact ionization in the SOI device. In other words, when there is no damage layer, the single-crystal Si layer 4 is insulated from the support substrate 2, so that minority carriers (holes) generated by a strong drain electric field or the like are transiently accumulated in the single-crystal Si layer. As a result, the threshold voltage fluctuates.
If there is, the recombination of holes generated in the single-crystal Si layer is promoted, and the lifetime of the holes is shortened, so that the accumulation of holes in the single-crystal Si layer can be suppressed. Thus, the substrate floating effect can be suppressed.

Next, as shown in FIG. 4, after forming a gate oxide film on the surface of the single crystal Si layer, the silicon oxide film 2 is formed.
Then, a polysilicon film 22 is deposited on the entire surface including 1 by a CVD method.

Thereafter, as shown in FIG. 5, the polysilicon film 22 is polished by CMP or etched back,
A gate electrode 7b made of a polysilicon film is formed between the side walls 13. Next, an interlayer insulating film 23 made of a silicon oxide film or the like is formed on the entire surface including the gate electrode 7b.
Is deposited.

Next, as shown in FIG.
And by etching the silicon oxide film 21,
Contact holes 23a and 23b are formed on the N-type diffusion layers 16 and 17 in the source / drain regions, respectively. Thereafter, a wiring layer 25 is formed in the contact hole and on the interlayer insulating film.

According to the first embodiment, annealing for forming the low-concentration N-type diffusion layer 15 and the N-type diffusion layers 16 and 17 of the source / drain regions is performed by the single-crystal Si layer 4.
After that, high energy Ar ions 9 are ion-implanted into the bottom of the single crystal Si layer 4. Therefore, unlike the conventional method for manufacturing a semiconductor device, the crystal defects formed in the single-crystal Si layer by the ion implantation of Ar ions are not recovered, and a sufficient damage layer 11 can be formed. Therefore, the substrate floating effect accompanying the impact ionization in the SOI device can be sufficiently suppressed.

FIGS. 7 and 8 are sectional views showing a method of manufacturing a semiconductor device according to the second embodiment of the present invention. The same parts as those in FIGS. Will be described only.

As shown in FIG. 7, high energy Ar ions 29 are obliquely implanted into the single crystal Si layer 4 using the silicon oxide film 21 and the side walls 13 as a mask. At this time, the SOI substrate 1 is not rotated. As a result, a damaged layer 31 made of a crystal defect is formed below the channel on the source side. The damage layer 31 is made of SO
This is for suppressing the substrate floating effect due to impact ionization in the I device. That is, the holes accumulated on the source side by the drain electric field can be efficiently captured at the recombination center by the damage layer 31 formed below the channel on the source side. Thus, the accumulation of holes on the source side in the single crystal Si layer can be suppressed, and the substrate floating effect can be suppressed.

Next, as shown in FIG. 8, in the same manner as in the first embodiment, the gate electrode 7b, the interlayer insulating film 23,
The contact holes 23a and 23b and the wiring layer 25 are formed.

The same effects as in the first embodiment can be obtained in the second embodiment.

FIGS. 9 and 10 are sectional views showing a method of manufacturing a semiconductor device according to a third embodiment of the present invention.
1 to 6 are denoted by the same reference numerals, and only different portions will be described.

As shown in FIG. 9, high energy Ar ions 39 are obliquely implanted into the single crystal Si layer 4 while rotating the SOI substrate 1 using the silicon oxide film 21 and the side walls 13 as a mask. As a result, a damaged layer 32 made of a crystal defect is formed below the channel on each of the source side and the drain side. This damage layer 3
Numeral 2 is for suppressing the substrate floating effect accompanying impact ionization in the SOI device. That is,
Damage layer 32 formed at the bottom of source / drain region
Thereby, holes generated in the drain electric field can be efficiently captured at the recombination center. Thereby, single crystal Si
Accumulation of holes in the layer can be suppressed, and the substrate floating effect can be suppressed.

Next, as shown in FIG. 10, the gate electrode 7b and the interlayer insulating film 2 are formed in the same manner as in the first embodiment.
3. The contact holes 23a and 23b and the wiring layer 25 are formed.

In the third embodiment, the same effects as in the first embodiment can be obtained.

The present invention is not limited to the above embodiment, but can be implemented with various modifications. For example,
In the second and third embodiments, a specific direction when implanting the Ar ions 31 obliquely is as follows.
Various appropriate ones can be selected and implemented depending on conditions such as the size of the gate electrode and the thickness of the single crystal Si layer.

In the first to third embodiments, Ar ions are implanted to form a damaged layer. However, the ion species is not limited to Ar, and a rare gas such as Ne may be used. Elements, halogen elements such as F and Cl,
It is also possible to use Group 14 elements such as Si, C and Ge.

[0037]

As described above, according to the present invention, after the annealing for forming the diffusion layers of the source / drain regions is performed on the single crystal Si layer, the ions for defect formation are implanted into the single crystal Si layer. are doing. Therefore, it is possible to provide a method of manufacturing a semiconductor device capable of sufficiently suppressing a substrate floating effect due to impact ionization in an SOI device.

[Brief description of the drawings]

FIG. 1 is a sectional view illustrating a method for manufacturing a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a sectional view illustrating the method for manufacturing the semiconductor device according to the first embodiment of the present invention, illustrating a step subsequent to FIG. 1;

FIG. 3 is a cross-sectional view illustrating the method for manufacturing the semiconductor device according to the first embodiment of the present invention, illustrating a step subsequent to FIG. 2;

FIG. 4 is a sectional view illustrating the method for manufacturing the semiconductor device according to the first embodiment of the present invention, which is a step subsequent to FIG. 3;

FIG. 5 is a sectional view illustrating the method for manufacturing the semiconductor device according to the first embodiment of the present invention, which is a step subsequent to FIG. 4;

FIG. 6 is a cross-sectional view illustrating the method of manufacturing the semiconductor device according to the first embodiment of the present invention, which illustrates a step subsequent to that of FIG. 5;

FIG. 7 is a sectional view illustrating the method for manufacturing the semiconductor device according to the second embodiment of the present invention;

FIG. 8 is a cross-sectional view illustrating the method of manufacturing the semiconductor device according to the second embodiment of the present invention, which is a step subsequent to FIG. 7;

FIG. 9 is a sectional view illustrating the method of manufacturing the semiconductor device according to the third embodiment of the present invention.

FIG. 10 is a sectional view illustrating the method for manufacturing the semiconductor device according to the third embodiment of the present invention, which is a step subsequent to FIG. 9;

FIGS. 11A and 11B are cross-sectional views illustrating a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1,101 SOI substrate 2,102 Support substrate 3,103 Insulating film 4,104 Single-crystal Si layer 5,105 Element isolation film 6,106 Gate oxide film 7a Dummy gate electrode 7b, 107 Gate electrode 9,29,39,109 Ar ion 11, 31, 32, 111 Damage layer 13, 113 Side wall 15, 115 Low-concentration N-type diffusion layer 16, 116 Source diffusion layer 17, 117 Drain diffusion layer 21 Silicon oxide film 22 Polysilicon film 23 Interlayer insulating film 23a, 23b Contact hole 25 Wiring layer

Claims (3)

[Claims] An SOI having a support substrate, a first insulating film formed thereon, and a single-crystal Si layer formed thereon
A step of preparing a substrate; a step of forming a gate insulating film on the surface of the single-crystal Si layer; a step of forming a dummy gate electrode on the gate insulating film; and an impurity in the single-crystal Si layer using the dummy gate electrode as a mask. By implanting ions and annealing the single-crystal Si layer, the single-crystal Si
Forming a source / drain region diffusion layer in the layer; depositing a second insulating film on the entire surface including the dummy gate electrode;
A step of exposing the upper surface of the dummy gate electrode by CMP polishing or etching back the second insulating film; a step of removing the dummy gate electrode; and ion forming defects in the single crystal Si layer using the second insulating film as a mask. A method of forming a damaged layer made of crystal defects in a single-crystal Si layer by implanting the same, and a step of forming a gate electrode on a gate insulating film. 2. In the step of forming the damaged layer, when implanting ions for forming a defect into the single-crystal Si layer,
2. The method of manufacturing a semiconductor device according to claim 1, wherein said ions for forming a defect are implanted obliquely. 3. In the step of forming the damaged layer, when implanting ions for defect formation into the single crystal Si layer,
2. The method of manufacturing a semiconductor device according to claim 1, wherein said defect forming ions are obliquely implanted while rotating said SOI substrate.