KR20090012954A

KR20090012954A - Iii-nitride semiconductor light emitting device and method of manufacturing the same

Info

Publication number: KR20090012954A
Application number: KR1020070077218A
Authority: KR
Inventors: 박중서
Original assignee: 주식회사 에피밸리
Priority date: 2007-07-31
Filing date: 2007-07-31
Publication date: 2009-02-04
Also published as: CN101359712A; CN101359712B

Abstract

The present invention is a substrate with irregularities formed; A substrate having irregularities formed from a polygonal pattern, the surface of the polygonal pattern intersecting a scribing line; A first group III nitride semiconductor layer having a first conductivity located on the substrate; A second group III nitride semiconductor layer having a second conductivity different from the first conductivity; And, an active layer positioned between the first group III nitride semiconductor layer and the second group III nitride semiconductor layer to generate light through recombination of electrons and holes; and a group III nitride semiconductor light emitting device comprising: It is about how to.

Description

Group III nitride semiconductor light emitting device and a method of manufacturing the same {III-NITRIDE SEMICONDUCTOR LIGHT EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME}

The present invention relates to a group III nitride semiconductor light emitting device, and more particularly, to a group III nitride semiconductor light emitting device having a projection having an optical scattering surface to increase external quantum efficiency. The present invention also relates to a group III nitride semiconductor light emitting device having an improved external quantum efficiency by controlling an angle at which the protrusion and the scribing surface of the light emitting device cross each other.

1 is a view showing a light emitting device disclosed in U.S. Patent No. 3,739,217, wherein the external quantum is formed by forming a rough surface 1000 on the light emitting device and scattering light generated from the active layer 4 through the rough surface 1000. The technology which improved efficiency is proposed.

FIG. 2 is a view showing a light emitting device disclosed in Japanese Laid-Open Patent Publication No. H07-153991, which forms a pattern on the substrate 200 and uses a difference in refractive index between the semiconductor layer 210 grown thereon and A technique that increases the external quantum efficiency by scattering light has been proposed.

FIG. 3 is a view showing a light emitting device disclosed in Japanese Laid-Open Patent Publication No. H05-036602, in which a nitride semiconductor layer 310 is formed on a groove-patterned hexagonal substrate 300 to remove defects in the nitride semiconductor layer 310. Reduced techniques are shown.

FIG. 4 is a view showing a light emitting device disclosed in International Publication Nos. WO02 / 75821 and WO03 / 10831, showing a process of growing a nitride semiconductor layer 410 on a patterned substrate 400. The nitride semiconductor layer 410 starts to grow on the bottom and top surfaces of the patterned substrate 400, and then the grown nitride semiconductor layer 410 meets, promotes growth in the met area, and then forms a flat surface. do. By using the patterned substrate 400, light is scattered to increase external quantum efficiency, while reducing crystal defects, thereby improving quality of the nitride semiconductor layer 410.

FIG. 5 is a view showing a light emitting device disclosed in International Publication No. WO03 / 10831 and US Patent Publication No. 2005-082546, wherein a circular protrusion 501 is formed on a substrate 500, and a nitride semiconductor layer 510 is formed. The nitride semiconductor layer shown in FIG. 4 is provided except that a flat nitride semiconductor layer 510 is formed early because growth does not occur on the upper surface of the substrate 500 due to the circular protrusion 501. Has the same effect as

An object of the present invention is to provide a group III nitride semiconductor light emitting device having a projection formed on the substrate to increase the external quantum efficiency.

Another object of the present invention is to provide a group III nitride semiconductor light emitting device capable of reducing crystal defects in a nitride semiconductor layer grown by forming protrusions on a substrate.

In addition, an object of the present invention is to provide a group III nitride semiconductor light emitting device having a projection having a wide scattering surface on the substrate to increase the external quantum efficiency.

In addition, an object of the present invention is to provide a group III nitride semiconductor light emitting device having an improved external quantum efficiency by using a substrate having a wide scattering surface.

Another object of the present invention is to provide a group III nitride semiconductor light emitting device having an improved external quantum efficiency by adjusting an angle formed by a scribing line with respect to a substrate having protrusions.

To this end, the present invention is grown on a substrate, a first group III nitride semiconductor layer having a first conductivity, a second group III nitride semiconductor layer having a second conductivity different from the first conductivity, and a first group III nitride semiconductor layer; A method of manufacturing a Group III nitride semiconductor light emitting device comprising a plurality of Group III nitride semiconductor layers positioned between a second Group III nitride semiconductor layer and an active layer generating light through recombination of electrons and holes, comprising: Forming a polygonal pattern thereon; Baking a polygonal pattern such that corners are rounded; Etching a substrate on which the baked polygonal pattern is formed; And, a fourth step of growing a plurality of group III nitride semiconductor light emitting device on the etched substrate provides a method of manufacturing a group III nitride semiconductor light emitting device comprising a. Here, the group III nitride semiconductor layer means a semiconductor layer made of a material of In (x) Ga (y) Al (z) N (x + y + z = 1). Although the protrusions are preferably formed on the substrate through the etching of the third step, the recesses may be formed on the substrate. In this case, the concave portion may be filled, but there may be a void filled with air depending on the growth conditions. On the other hand, in the etching of the third step, it is preferable to form the top of the protrusion to form a point, but it is also possible to grow on the upper surface of the substrate by adjusting the time of etching so as to form the top surface. Meanwhile, the sides of the polygonal pattern may be slightly rounded through baking, and thus the sides of the protrusions actually formed may be slightly rounded. In addition, through baking, the polygonal pattern may be slightly spread on the substrate, and thus, the protrusions actually formed may have a larger size than the polygonal pattern.

In another aspect, the present invention provides a method for manufacturing a group III nitride semiconductor light-emitting device comprising a; a fifth step of forming a scribing line to cross the surface forming the polygonal pattern.

In another aspect, the present invention is a method of manufacturing a group III nitride semiconductor light emitting device, characterized in that the rectangular light emitting device is made through a fifth step, the both sides of the rectangle intersects the surface forming a polygonal pattern. To provide.

The present invention also provides a method of manufacturing a group III nitride semiconductor light emitting device, characterized in that the polygonal pattern is a rectangular pattern.

In another aspect, the present invention provides a method for manufacturing a group III nitride semiconductor light emitting device, characterized in that the substrate is a sapphire substrate.

In another aspect, the present invention provides a method for manufacturing a group III nitride semiconductor light emitting device, characterized in that the first step is formed so that the surface forming the polygonal pattern is parallel to the reference surface of the substrate.

In addition, the present invention is grown on a substrate, the first group III nitride semiconductor layer having a first conductivity, the second group III nitride semiconductor layer having a second conductivity different from the first conductivity, and the first group III nitride semiconductor layer and 2. A method of manufacturing a Group III nitride semiconductor light emitting device comprising a plurality of Group III nitride semiconductor layers positioned between a Group II nitride semiconductor layer and comprising an active layer that generates light through recombination of electrons and holes, wherein the substrate is formed on a substrate. Forming a polygonal pattern; Etching the substrate on which the polygonal pattern is formed; Growing a plurality of group III nitride semiconductor light emitting devices on the etched substrate; And a fourth step of forming a scribing line so as to intersect a surface forming a polygonal pattern. By adjusting the scribing line according to the shape of the polygonal pattern, the first scattered light can be more entered into the escape cone (Escape Cone), it is possible to increase the light extraction efficiency (Light Extraction Efficiency). Here, the polygonal pattern is sufficient that its general shape is polygonal. For example, since the surface of the polygonal pattern may be rounded in the baking process, if not desired, the surface of the polygonal pattern may be slightly concave inward in the photolithography process.

The present invention also provides a method for manufacturing a group III nitride semiconductor light emitting device, characterized in that the polygonal pattern is a rectangular pattern.

In addition, the present invention is a substrate formed with irregularities; A substrate having irregularities formed from a polygonal pattern, the surface of the polygonal pattern being parallel to the reference plane of the substrate; A first group III nitride semiconductor layer having a first conductivity located on the substrate; A second group III nitride semiconductor layer having a second conductivity different from the first conductivity; And an active layer positioned between the first group III nitride semiconductor layer and the second group III nitride semiconductor layer to generate light through recombination of electrons and holes. . Here, the unevenness may be formed by protrusions and / or depressions formed on the substrate.

In addition, the present invention is a substrate formed with irregularities; Unevenness is formed from a polygonal pattern, the substrate having a curved longitudinal cross-section; A first group III nitride semiconductor layer having a first conductivity located on the substrate; A second group III nitride semiconductor layer having a second conductivity different from the first conductivity; And an active layer positioned between the first group III nitride semiconductor layer and the second group III nitride semiconductor layer, the active layer generating light through recombination of electrons and holes. do.

In addition, the present invention is a substrate formed with irregularities; A substrate having unevenness formed from a polygonal pattern and having a top or bottom of the unevenness; A first group III nitride semiconductor layer having a first conductivity located on the substrate; A second group III nitride semiconductor layer having a second conductivity different from the first conductivity; The present invention provides a Group III nitride semiconductor light emitting device comprising an active layer positioned between the Group III nitride semiconductor layer and the Group III nitride semiconductor layer to generate light through recombination of electrons and holes. Here, the top or bottom of the concave-convex point means that the longitudinal section of the protrusion and / or the concave portion forms a round shape and a curved surface or a horn shape. But it should not be bound by its literary meaning, but should be understood in the practical sense that the top or bottom of the unevenness has an area where growth is hard to read.

In addition, the present invention is a substrate formed with irregularities; A substrate formed from a polygonal pattern in which unevenness is baked; A first group III nitride semiconductor layer having a first conductivity located on the substrate; A second group III nitride semiconductor layer having a second conductivity different from the first conductivity; And an active layer positioned between the first group III nitride semiconductor layer and the second group III nitride semiconductor layer to generate light through recombination of electrons and holes. The present invention also relates to a substrate on which unevenness is formed; A substrate having irregularities formed from a polygonal pattern, the surface of the polygonal pattern intersecting a scribing line; A first group III nitride semiconductor layer having a first conductivity located on the substrate; A second group III nitride semiconductor layer having a second conductivity different from the first conductivity; And an active layer positioned between the first group III nitride semiconductor layer and the second group III nitride semiconductor layer to generate light through recombination of electrons and holes. .

According to the group III nitride semiconductor light emitting device according to the present invention, it is possible to increase the external quantum efficiency by forming a projection on the substrate.

In addition, according to the Group III nitride semiconductor light emitting device according to the present invention, it is possible to reduce the crystal defects of the nitride semiconductor layer grown by forming protrusions on the substrate.

In addition, according to the Group III nitride semiconductor light emitting device according to the present invention, it is possible to increase the external quantum efficiency by forming a projection having a wide scattering surface on the substrate.

In addition, according to the group III nitride semiconductor light emitting device according to the present invention, it is possible to increase the external quantum efficiency by using a substrate having a wide scattering surface.

In addition, according to the group III nitride semiconductor light emitting device according to the present invention, it is possible to increase the external quantum efficiency by adjusting the angle formed by the scribing line with respect to the substrate having the projection.

Hereinafter, the present invention will be described in more detail with reference to the drawings.

FIG. 6 is a diagram comparing packing densities of mask layouts used to form protrusions, wherein a circular layout having a radius of 3a / 2 and a pattern having a spacing of a and an equilateral triangle and a square circumscribed to the circular layout are shown in FIG. And the layout of regular hexagons.

In the case of a circular layout, connecting the centers of four circles has a rhombus shape with a side length of 4a, which is the highest packing density. At this time, the rhombus forms a unit cell of the above arrangement, the area of the rhombic unit cell is 4a x 4a x sin60 °, and one circular pattern enters the rhombus. In other words, the packing density is 1 / (4a x 4a x sin60 °).

As described above, the packing densities of equilateral triangle, square and regular hexagon layouts can be obtained. At this time, if the packing density of the circular layout is 1, it has a value of 0.33 for the layout of the equilateral triangle, has a value of 0.86 (= sin60 °) for the layout of the square, and the packing density for the layout of the regular hexagon. Will have 1 equal to

On the other hand, the scattering efficiency of the pattern array is not only proportional to the packing density of the array but also to the scattering area of each pattern, that is, the surface area of the pattern protrusion.

7 is a view showing the projections that can be formed on the substrate, wherein the scattering area of each projection is equal to the surface area of each projection. Therefore, if the scattering area of the circular cross section hemispherical protrusion is 1, the triangular cross hemispherical protrusion has a value of 1.65, the square cross section hemispherical protrusion has a value of 1.27 (= 4 / phi), and the hexagonal cross section hemispherical protrusion has 1.1 (= 2√3 / phi). The product of the ratio of packing density for each pattern and the ratio of scattering area for each pattern represents the ratio of scattering efficiency for each pattern array.

8 is a table comparing packing density, scattering area, and scattering efficiency according to the cross section of the projection, wherein the hexagonal cross section hemispherical pattern arrangement and the square cross section hemispherical pattern arrangement are about 10% scattering than the circular cross section hemispherical pattern arrangement. The efficiency is good, and scattering efficiency is about 2 times better than that of the triangular cross-section hemisphere.

The present invention examines new types of projections from this conceptual concept, especially when the cross section of the projection is a quadrangle as well as the shape of the projection having the largest scattering efficiency as calculated in FIG. It has been found that there is an advantage to increase the amount of light exiting the escape cone after the first scattering by adjusting the angles that form the scribing line of the chip and the one side of the square projection because of the homogeneous geometry.

9 is a diagram conceptually illustrating an example of a mask layout according to the present invention, in which a rectangular pattern 91 is arranged on a substrate 90. It is preferable that the length of the square pattern 91 has a value of 1.5 um ≤ m ≤ 5 um. If it is smaller than 1.5 um, it is difficult to produce a protrusion having a bottom of the rectangle. This is because the packing density is lowered and thus the scattering efficiency is lowered. For the sake of explanation, the rectangular pattern 91 is arranged only in a part of the substrate 90, but in practice, the rectangular pattern 91 is disposed throughout the substrate 90. At this time, it is preferable to match the square surface with the substrate reference surface. Since the side surface of the pattern coinciding with the substrate reference surface forms a growth stable surface, growth is suppressed, and thus, growth in the vertical direction from the substrate surface between adjacent protrusions and protrusions is further activated, so that the substrate can be quickly covered. As a result, when the bottom surface of the square pattern is coincident with the substrate reference plane, the two surfaces of the square pattern form a growth stability surface.

10 is a view illustrating a process of the projection according to the present invention. First, the porter register 91a is coated on the substrate 90 and then the patterning process is performed. The patterning process is performed through a photolithography process. At this time, the thickness of the photoresist 91a to be applied is changed depending on the height of the projection to be formed on the substrate 90, the thickness of the photoresist is adjusted according to the height of the projection to be formed.

The baking process is performed after the patterning process of the porter register 91a. The implementation temperature at this time has a value of about 100 to 150 ° C. Through this baking process, the rectangular pattern 91 is rounded, and a mask pattern for forming a protrusion having a curved end surface having a semicircle is formed. Preferably, the baking process is performed, but since the square pattern 91 is actively etched first at the edge thereof, the protrusions according to the present invention may be inserted only through dry etching without the baking process according to the required protrusion.

Next, a process of etching the substrate 90 is performed. In general, it is performed by the Reactive Ion Etching (RIE) method. In addition, the etching process may form a rectangular protrusion 92 through a wet etching process. Here, although the method of forming the rectangular projections 92 has been described, the same method may be applied to the formation of polygonal projections such as triangles and hexagons.

FIG. 11 is a view conceptually showing an example of a substrate on which protrusions are formed in accordance with the method of FIG. 10, and a protrusion 92 having a curved cross section and a quadrangular cross section is formed on the substrate 90. The longitudinal section may form a curved surface as a whole, or may have a sharpest point.

12 is a view showing an example of a group III nitride semiconductor light emitting device according to the present invention, in which the group III nitride semiconductor light emitting device is a sapphire substrate 90 having a protrusion 92 and a buffer layer 93 grown on the substrate 90. ), An n-type nitride semiconductor layer 94 grown on the buffer layer 93, an active layer 95 grown on the n-type nitride semiconductor layer 94, a p-type nitride semiconductor layer 96 grown on the active layer 95, The transmissive electrode 97 formed on the p-type nitride semiconductor layer 96, the p-side electrode 98 formed on the transmissive electrode 97, the p-type nitride semiconductor layer 96 and the active layer 95 are mesa-etched and exposed. And an n-side electrode 99 formed on the n-type nitride semiconductor layer 94a. The growth of the nitride semiconductor layers 93, 94, 95 and 96 and the formation of the electrodes 98 and 99 are not only shown in the prior art of Figs. 1 to 5, but are obvious to those skilled in the art and will not be described. . The substrate 90 and the nitride semiconductor layers 93, 94, 95, and 96 have a higher refractive index than the outside of the light emitting device (air or epoxy resin), so that some of the light generated in the active layer 95 does not escape to the outside of the light emitting device. The projection 92 is provided on the 90 to scatter the light, thereby increasing the light escaping to the outside of the light emitting device, thereby increasing the external quantum efficiency. Further, not only growth starts at the bottom surface of the substrate 90, but also the growth in the lateral direction due to the projection structure changes the direction of the vertical through-type dislocation, thereby reducing its density, and thus, the nitride semiconductor layers 93, 94, 95, and 96 Can reduce crystal defects. This phenomenon of reducing crystal defects is one of the phenomena commonly observed when nitride crystals grow on sapphire substrates having protrusions.

Meanwhile, in the group III nitride semiconductor light emitting device illustrated in FIG. 12, nitride semiconductor layers 93, 94, 95, and 96 are grown on a substrate 90 on which projections 92 having a size of 2 inches are formed, and electrodes 98 and 99 are formed. ), And then by laser scribing and braking to form approximately 10,000 square chips. At this time, the scribing line may be formed so as to coincide with the side surface of the rectangular protrusion 92, but preferably formed so as to intersect with the side surface of the rectangular protrusion 92. This is to increase the light extraction efficiency by allowing the first scattered light from the projection to enter the escape cone (Escape Cone) more.

FIG. 13 is a view for explaining a relationship between a light emitting device and a scribing line, wherein rectangular projections 92 are formed on the reference plane 90a of the substrate 90, that is, the side surfaces 90b and 90c of the individual light emitting devices. The scribing lines are indicated by dashed lines. By adjusting the angle y between the side surfaces 92a and 92b of the rectangular protrusion 92 and the scribing line, the amount of light to be extracted can be controlled. Particularly, in the case of the projection having a rectangular cross section, the shape of the chip is a rectangular parallelepiped and the cross section is square or rectangular, so that the light extraction efficiency is largely changed according to the angle y. On the other hand, in the case of a hemispherical shape having a circular cross-section hemispherical shape or a polygonal cross section other than square, the change of light extraction efficiency according to the angle y is relatively small. Because in the case of hemispherical polygonal cross section other than square, the angle formed between each side of chip cross section and each side of cross section of protrusion has more than one value (in case of square cross section, it has one value). Therefore, the change of light extraction efficiency with each angle is relatively small. In the case of the circular cross section, since the angle between each side of the chip cross section and each side of the cross section of the protrusion is numerous, the averaging effect is the greatest, and the change of the weak angle (y) due to the rotationally symmetric structure of the arrangement There is only a change in the light extraction efficiency. Therefore, in the case of the square pattern, it is preferable to proceed the chip process at a mask alignment angle in which the light extraction efficiency is maximum. In this case, since the probability of inducing light to the escape cone after the first scattering than other patterns can be increased, as a result, the light extraction efficiency can be increased.

14 and 15 are tables and graphs showing simulation results of analyzing a change in light extraction efficiency according to an angle y using a quadrangular pyramid-shaped protrusion. When the angle y is approximately 45 °, the light extraction efficiency is increased. It was found to be the maximum. Optical Research Associates' Light Tools 5.1 program was used for the simulation, and a square array of pyramidal pyramids of 1.5 um in height, 2.5 um in height, and 1.5 um in spacing was used for sapphire substrates. The simulation was performed.

FIG. 16 is a photograph of the surface of the nitride semiconductor layer grown on the substrate on which the protrusions are formed according to the present invention and then photographed by an optical microscope, and the shape of the protrusion having a rectangular cross section is clearly seen through the semiconductor layer.

FIG. 17 is a photograph taken at different angles and magnifications of a sapphire substrate on which a projection of a square cross-section is formed before growth of a nitride semiconductor. After forming a square pattern of 1.6 μm at intervals of 1.5 μm, the projections were formed by etching BCl ₃ on the sapphire substrate by etching reactive ion etching (RIE) for 40 minutes at 800 W operating power. SiC was first used as a buffer layer, and 4.5 micro-mole of DTBSi per minute and 17 micro-mole of CBr ₄ per minute were used, and the growth time was 60 seconds under a growth temperature of 950 ° C. to grow to an expected thickness of 10A. Next, InGaN is used as the buffer layer, and 10 micro-mole of TMIn per minute, 400 micro-mole of TMGa, and 12 liters of NH ₃ per minute are used, and the growth time is 35 seconds under a growth temperature of 500 ° C. Grew. Next, undoped GaN was used as a raw material source, and 870 micro-mole of TMGa per minute and 18 liters of NH ₃ per minute were used, and the growth time was 7200 seconds under a growth temperature of 1050 ° C., and was grown to a thickness of 4 μm. The n-type nitride semiconductor layer, the MQW active layer, and the p-type nitride semiconductor layer were further grown thereon, but as described above, these conditions are obvious to those skilled in the art, and thus, further description thereof will be omitted.

FIG. 18 is a diagram illustrating another example of a mask layout according to the present invention, in which a rectangular pattern 91 is arranged to be shifted for each array on the substrate 90. This is to increase the light extraction efficiency by lowering the secondary scattering rate between the patterns by arranging the patterns in an excellent manner.

Although the present invention has been described in the rectangular pattern as a preferred embodiment, the present invention is not limited to the rectangular pattern, and may have a cross section of another polygon such as hexagon and triangle. In addition, in the relationship with the scribing line, the external quantum efficiency may be improved by providing a side that is not parallel to the scribing line.

1 is a view showing a light emitting device disclosed in US Patent No. 3,739,217,

2 is a view showing a light emitting device disclosed in Japanese Laid-Open Patent Publication No. H07-153991;

3 is a view showing a light emitting device disclosed in Japanese Unexamined Patent Publication No. H05-036602;

4 is a view showing a light emitting device disclosed in International Publication Nos. WO02 / 75821 and WO03 / 10831;

5 is a view showing a light emitting device disclosed in International Publication No. WO03 / 10831 and US Patent Publication No. 2005-082546,

6 is a diagram comparing packing densities of mask layouts used when forming protrusions;

7 is a view showing protrusions that can be formed on a substrate;

8 is a table comparing packing density, scattering area, and scattering efficiency according to the cross section of the protrusion;

9 is a view schematically illustrating an example of a mask layout according to the present invention;

10 is a view for explaining the process of the projection according to the present invention,

11 is a view schematically illustrating an example of a substrate on which protrusions are formed according to the method of FIG. 10;

12 is a view showing an example of a group III nitride semiconductor light emitting device according to the present invention;

13 is a diagram for explaining a relationship between a light emitting element and a scribing line;

14 and 15 are tables and graphs showing simulation results of analyzing a change in light extraction efficiency according to an angle y using a quadrangular pyramid-shaped protrusion;

16 is a photograph of the surface of the nitride semiconductor layer grown on the substrate having protrusions according to the present invention and then photographed with an optical microscope;

FIG. 17 is a photograph of a sapphire substrate on which a projection of a rectangular cross section before growth of a nitride semiconductor is photographed by using an electron microscope at different angles and magnifications;

18 shows another example of a mask layout according to the present invention.

Claims

A first group III nitride semiconductor layer grown on the substrate and having a first conductivity, a second group III nitride semiconductor layer having a second conductivity different from the first conductivity, and a first group III nitride semiconductor layer and a second group III nitride A method of manufacturing a Group III nitride semiconductor light emitting device comprising a plurality of Group III nitride semiconductor layers positioned between semiconductor layers and including an active layer that generates light through recombination of electrons and holes,

Forming a polygonal pattern on the substrate;

Baking the polygonal pattern so that the corners are rounded;

Etching a substrate on which the baked polygonal pattern is formed; And

And growing a plurality of group III nitride semiconductor light emitting devices on the etched substrate.

The method of claim 1,

And a fifth step of forming a scribing line so as to intersect a surface forming a polygonal pattern.

The method of claim 2,

A rectangular light emitting device is made through a fifth step, wherein both sides of the rectangle intersect with a plane forming a polygonal pattern.

The method of claim 3, wherein

The polygonal pattern is a method for manufacturing a group III nitride semiconductor light emitting device, characterized in that the rectangular pattern.

The method of claim 4, wherein

The substrate is a method for manufacturing a group III nitride semiconductor light emitting device, characterized in that the sapphire substrate.

The method of claim 5, wherein

The first step is to form a group III nitride semiconductor light emitting device, characterized in that the surface forming the polygonal pattern is formed parallel to the reference surface of the substrate.

Forming a polygonal pattern on the substrate;

Etching the substrate on which the polygonal pattern is formed;

Growing a plurality of group III nitride semiconductor light emitting devices on the etched substrate;

And a fourth step of forming a scribing line so as to intersect a surface forming a polygonal pattern.

The method of claim 7, wherein

The method of claim 8,

The method of claim 9,

As a substrate on which unevenness is formed; A substrate having irregularities formed from a polygonal pattern, the surface of the polygonal pattern being parallel to the reference plane of the substrate;

A first group III nitride semiconductor layer having a first conductivity located on the substrate;

A second group III nitride semiconductor layer having a second conductivity different from the first conductivity; And,

And an active layer positioned between the first group III nitride semiconductor layer and the second group III nitride semiconductor layer to generate light through recombination of electrons and holes.

As a substrate on which unevenness is formed; Unevenness is formed from a polygonal pattern, the substrate having a curved longitudinal cross-section;

As a substrate on which unevenness is formed; A substrate having unevenness formed from a polygonal pattern and having a top or bottom of the unevenness;

As a substrate on which unevenness is formed; A substrate formed from a polygonal pattern in which unevenness is baked;

As a substrate on which unevenness is formed; A substrate having irregularities formed from a polygonal pattern, the surface of the polygonal pattern intersecting a scribing line;