KR20090003715A - Nand flash memory device and method for fabricating same - Google Patents

Abstract

The NAND flash memory element and manufacturing method thereof are provided to reduce the depth of the drain contact plug by reducing the depth of the drain contact plug when forming the source contact plug. The drain select line(DSL) crossing the active line is formed on the substrate in which active line(40A) is defined. The first interlayer insulating film is formed on the drain select lines. The contact holes exposing the active line between drain select lines are formed in the first interlayer insulating film. The first openings are arranged in the interlayer insulating film including contact holes along the active line. The contact holes and first openings are buried and the first contact plug(53A) and the conductive layer patterns are formed. The second inter metal dielectric is formed on the resultant. The second contact plug(53B) which crosses around the first contact plugs is formed.

Description

NAND flash memory device and manufacturing method thereof {NAND FLASH MEMORY DEVICE AND METHOD FOR FABRICATING SAME}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor manufacturing technology, and more particularly, to a NAND flash memory device having a contact plug and a method of manufacturing the same.

Recently, the demand for flash memory devices that can be electrically programmed and erased and that does not require a refresh function to rewrite data at regular intervals is increasing. In order to develop a large-capacity memory device capable of storing a large amount of data, researches on a high integration technology of the memory device have been actively conducted. Here, the program refers to an operation of writing data to a memory cell, and the erasing refers to an operation of removing data written to the memory cell.

NAND flash memory device (NAND type) in which a plurality of memory cells are connected in series (that is, a structure in which adjacent cells share drain or source with each other) to form a string for high integration of the memory device. flash memory devices) have been developed. The NAND flash memory device is a memory device that reads information sequentially, unlike a NOR flash memory device. The NAND flash memory device is programmed and erased by controlling the threshold voltage (Vt) of the memory cell while injecting or emitting electrons into a floating gate using an F-N tunneling method.

Hereinafter, a NAND flash memory device according to the prior art will be described with reference to the accompanying drawings.

1 is a plan view illustrating a NAND flash memory device according to the prior art, and FIG. 2 is a cross-sectional view taken along the line II ′ of FIG. 1.

1 and 2, a plurality of gate lines 12 are formed across the active lines 10A on the substrate 10 having the plurality of active lines 10A defined by the device isolation layer 11. do.

The gate line 12 includes a drain select line DSL, word lines WL31 to WL0, a source select line SSL, and the like.

 The word lines WL31 to WL0 may include a tunneling insulating film 12A, a floating gate 12B, a dielectric film 12C, a control gate 12D, an electrode film 12E, and a hard mask film on the substrate 10. 12F may be formed by stacking, and the source select line SSL and the drain select line DSL may be formed by removing some or all of the dielectric film 12C when the word lines WL0 to WL31 are formed.

Subsequently, drain contact regions (not shown) and source contact regions (not shown) are formed in the active line 10A between the neighboring drain select lines DSL and the source select lines SSL. 12) After forming the spacers 13 on both sides, a first interlayer insulating film 14 covering the gate line 12 is formed on the entire surface.

Subsequently, an opening is formed in the first interlayer insulating film 14 to expose source contact regions between the source select lines SSL, and a source contact plug 15 connected to the source contact regions is formed by filling a conductive film in the opening. Form.

In this case, the opening may be formed in a dual damascene structure to reduce contact resistance between the source contact plug 15 and the metal contact plug formed later. For example, an opening is formed in the first interlayer insulating film 14 to expose the substrate 10 between the source select lines SSL, and the first interlayer insulating film 14 above the opening is etched to form an upper CD. By increasing the openings of the dual damascene structure can be formed.

Subsequently, a second interlayer insulating film 16 is formed on the first interlayer insulating film 14 including the source contact plug 15, and the drain contact regions are exposed on the second and first interlayer insulating films 16 and 14. Drain contact holes are formed, and the drain contact plugs 17 are formed by filling the drain contact holes, and then the metal contact plugs 18 connected to the source contact plugs 15 are formed through the second interlayer insulating layer 16.

Thereafter, an etch stop film 19 and an insulating film 20 are sequentially formed on the second interlayer insulating film 16 including the drain contact plugs 17 and the metal contact plugs 18, and the insulating film 20 and the etch stop are formed. Openings are formed in the film 19 to expose the drain contact plugs 17, the metal contact plugs 18, and a portion of the second interlayer insulating film 16 adjacent thereto, and the metal lines 21 are filled by filling the openings. Form.

However, the NAND flash memory device according to the related art described above has a problem in that neighboring drain contact plugs 17 are bridged because the distance between the drain contact plugs 17 is short.

In detail, as the semiconductor device is integrated and the depth of the drain contact plug 17 decreases and the depth becomes deeper, when the drain contact hole is etched with a slope due to pattern distortion, the drain contact is etched. Since the hole etching is not completely performed, a not open phenomenon occurs in which the drain contact hole bottom portion does not open.

In order to prevent the sickle opening, the top CD of the drain contact hole should be increased. However, when the top CD of the drain contact hole is increased, the distance between neighboring drain contact holes is not secured. Accordingly, the top parts of the drain contact plugs 17 are stuck together. A discarding bridge is generated.

3 is a plan view showing a portion of a NAND flash memory device according to the prior art, in which (a) shows a bottom portion of the drain contact plug 17 and (b) shows a top portion of the drain contact plug 17.

As shown in FIG. 3A, at the bottom of the drain contact plug 17, contact between the active line 10A having the drain contact region and the drain contact plug 17 is normally performed.

However, as shown in FIG. 2B, at the top of the drain contact plug 17, it may be confirmed that neighboring drain contact plugs 17 are bridged because the CD of the drain contact plug 17 is excessively large. .

As such, when a bridge is generated between the drain contact plugs 17, bitlines connected to the bridged drain contact plugs 17 fail, causing 2-bit closure.

The present invention has been proposed to solve the above problems of the prior art, and an object thereof is to provide a NAND flash memory device capable of preventing bridges between drain contact plugs and a method of manufacturing the same.

According to an aspect of the present invention, there is provided a substrate including active lines arranged in one direction and drain select lines crossing the active lines, a first interlayer insulating layer covering the substrate, First contact plugs penetrating a first interlayer insulating film and connected to the active lines between the drain select lines, and a conductive film pattern extending from the first contact plugs to the first interlayer insulating film over the active lines; And a second interlayer insulating film covering the first interlayer insulating film including the conductive film pattern and the second interlayer insulating film so as not to be positioned perpendicular to the first contact plug through the second interlayer insulating film. A NAND flash memory device including second contact plugs connected to the plurality of devices is provided.

According to another aspect of the present invention, there is provided a method for forming drain select lines crossing the active lines on a substrate on which active lines arranged in one direction are defined. Forming a first interlayer insulating film, forming contact holes exposing the active lines between the drain select lines in the first interlayer insulating film, and forming the active line in the interlayer insulating film including the contact holes. Forming first openings disposed along the first hole; forming first contact plugs and conductive layer patterns by filling the contact holes and the first openings; and forming a second interlayer insulating film on the resultant. And shifting the second interlayer insulating film through the second interlayer insulating film and not positioned perpendicular to the first contact plug. And forming second contact plugs connected to the conductive film patterns, and alternately arranged with respect to the first contact plugs.

The present invention can form a drain contact plug together at the time of source contact plug formation to reduce the depth of the drain contact plug, thereby preventing bridge formation at the drain contact plug top.

The bridges between the metal contact plugs can be prevented by forming conductive layer patterns on the drain contact plugs and staggering metal contact plugs connected to the conductive layer patterns to alternately space the metal contact plugs.

In addition, since the drain contact plug, the conductive film pattern, and the metal contact plug thereon may be formed at the same time as the existing source contact plug process and the metal contact plug process, there is no need to add a separate process. Therefore, the bridge between the contact plugs can be prevented without the burden of the process addition.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. In addition, in the drawings, the thicknesses of layers and regions are exaggerated for clarity, and in the case where the layers are said to be "on" another layer or substrate, they may be formed directly on another layer or substrate or Or a third layer may be interposed therebetween. In addition, the same reference numerals throughout the specification represent the same components.

Example

4 is a plan view illustrating a NAND flash memory device according to the present invention, and FIGS. 5 to 6 are cross-sectional views illustrating a NAND flash memory device according to the present invention according to a process flow.

First, as shown in FIGS. 4 and 5, the isolation layer 41 is formed on the substrate 40 to define a plurality of active lines 40A arranged in one direction, and the active lines (eg, on the substrate 40) are defined. A plurality of gate lines 42 are formed across the 40As.

The gate line 42 includes a drain select line DSL, word lines WL31 to WL0, a source select line SSL, and the like.

Subsequently, drain contact regions (not shown) and source contact regions (not shown) are formed in the active line 40A between the neighboring drain select lines DSL and the source select lines SSL. 42) After forming the spacers 43 on both sides, a first interlayer insulating film 44 covering the gate line 42 is formed on the entire surface.

Next, the source contact hole 46 exposing the drain contact holes 45 exposing the drain contact regions and the source contact regions between the source select lines SSL are formed in the first interlayer insulating layer 44.

Next, the first interlayer insulating film 44 on the drain contact hole 45 and the first interlayer insulating film 44 on the source contact hole 46 are partially etched to overlap the drain contact holes 45. A second opening 48 overlapping the first openings 47 and the source contact hole 46 is formed.

In this case, in order to maximize the line and space margins of the first openings 47, the first openings 47 may be formed to overlap the active line 40A.

3 and 6, a conductive film is embedded in the drain contact holes 45, the first openings 47, the source contact holes 46, and the second openings 48, and the drain contact plugs. And the conductive layer patterns 50 and the source contact plugs 51 connected thereto.

The conductive layer patterns 50 are formed by filling the first openings 47, and the conductive layer patterns 50 are connected to the drain contacts 49, and are formed on the active lines 40A from the drain contacts 49. It has a structure extended over the interlayer insulating film 44.

On the other hand, the drain contact plug 49 is formed by filling the drain contact hole 45, and has the same depth as the source contact plug 51. Thus, drain contact plug 49 has a lower depth than conventional drain contact plugs having a deeper depth than source contact plugs.

Subsequently, as shown in FIG. 7, a second interlayer insulating film 52 is formed on the first interlayer insulating film 44 including the conductive film patterns 50 and the source contact plug 51. 52, first metal contact plugs 53A and second metal contact plugs 53B connected to the conductive film patterns 50 and the source contact plug 51 are formed.

At this time, the first metal contact plugs 53A may be disposed on the first interlayer insulating layer 44 so that the first metal contact plugs 53A and the lower drain contact plugs 49 are not disposed on the vertical line. To (50).

In addition, the first metal contact plugs 53A are alternately disposed with respect to the drain contact plugs 49. Therefore, the spacing D between the first metal contact plugs 53A is increased compared to the spacing between the drain contact plugs 49 arranged in a straight line.

Subsequently, an etch stop film 54 and an insulating film 55 are sequentially formed on the second interlayer insulating film 52 including the first and second metal contact plugs 53A and 53B, and the insulating film 55 and the etch stop film are sequentially formed. An opening is formed in 54 to expose the first and second metal contact plugs 53A and 53B and a portion of the second interlayer insulating layer 52 adjacent thereto, and the metal line 56 is formed by filling the opening. do.

Although the technical spirit of the present invention has been described in detail in the preferred embodiments, it should be noted that the above-described embodiments are for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

1 is a plan view showing a NAND flash memory device according to the prior art.

2 is a cross-sectional view taken along the line II ′ of FIG. 1.

3 is a plan view showing a failure of the NAND flash memory device according to the prior art.

4 is a plan view showing a NAND flash memory device according to the present invention.

5 to 7 are cross-sectional views illustrating a NAND flash memory device and a method of manufacturing the same according to the present invention.

<Explanation of symbols for main parts of drawing>

40: substrate

40A: active line

49: drain contact plug

51: source contact plug

53A, 53B: first and second metal contact plug

Claims (6)

A substrate having active lines arranged in one direction and drain select lines crossing the active lines; A first interlayer insulating film covering the substrate; First contact plugs penetrating the first interlayer insulating film and connected to the active lines between the drain select lines; Conductive layer patterns extending from the first contact plugs to the first interlayer insulating layer over the active lines; A second interlayer insulating film covering the first interlayer insulating film including the conductive film pattern; And second contact plugs penetrating through the second interlayer insulating film and connected to the conductive film patterns in a state where they are not positioned perpendicular to the first contact plug and are displaced. The method of claim 1, The NAND flash memory device of claim 2, wherein the second contact plugs are alternately arranged around the first contact plugs. The method of claim 1, The NAND flash memory device of claim 1, wherein the first contact plug and the second contact plug connected through the conductive layer pattern form a drain contact plug. Forming drain select lines across the active lines on a substrate in which active lines arranged in one direction are defined; Forming a first interlayer insulating film on the drain select lines; Forming contact holes in the first interlayer insulating layer exposing the active lines between the drain select lines; Forming first openings in the interlayer insulating layer including the contact holes along the active line;  Filling the contact holes and the first openings to form first contact plugs and conductive layer patterns; Forming a second interlayer insulating film on the resultant product; Penetrating the second interlayer insulating film, the second contact plugs being connected to the conductive film patterns in a state where the first contact plugs are not positioned perpendicular to the first contact plug, and are alternately arranged with respect to the first contact plugs. Method of manufacturing a NAND flash memory device comprising the step. The method of claim 4, wherein Forming word line and source select lines on the substrate in parallel with the drain select line when the drain select lines are formed; Forming a source contact hole exposing the substrate between the source select lines when the drain contact holes are formed; Forming a second opening on the first interlayer insulating layer on which the source contact hole is formed; And embedding the source contact hole and the second opening together to form a source contact plug when the drain contact holes and the first openings are filled. The method of claim 5, And a third contact plug penetrating the second interlayer insulating film and connected to the source contact plug.

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