KR20080107816A - Mask for nano imprint lithography and method for manufacturing semiconductor device - Google Patents

Mask for nano imprint lithography and method for manufacturing semiconductor device Download PDF

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Publication number
KR20080107816A
KR20080107816A KR1020070056078A KR20070056078A KR20080107816A KR 20080107816 A KR20080107816 A KR 20080107816A KR 1020070056078 A KR1020070056078 A KR 1020070056078A KR 20070056078 A KR20070056078 A KR 20070056078A KR 20080107816 A KR20080107816 A KR 20080107816A
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South Korea
Prior art keywords
film
mask
sio
sam
silicon oxide
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KR1020070056078A
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Korean (ko)
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신수범
신희승
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주식회사 하이닉스반도체
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Priority to KR1020070056078A priority Critical patent/KR20080107816A/en
Publication of KR20080107816A publication Critical patent/KR20080107816A/en

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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/38—Masks having auxiliary features, e.g. special coatings or marks for alignment or testing; Preparation thereof
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/66—Containers specially adapted for masks, mask blanks or pellicles; Preparation thereof
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/0002—Lithographic processes using patterning methods other than those involving the exposure to radiation, e.g. by stamping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Shaping Of Tube Ends By Bending Or Straightening (AREA)

Abstract

The present invention relates to a mask for a nanoimprint lithography and a method for manufacturing a semiconductor device. When the semiconductor device is formed by using the nanoimprint process, the surface of the photoresist film is damaged and residues are generated in the process of removing the mask from the photoresist film. In order to solve the problem that the defect of the device occurs, by forming a silicon oxide film (SiO 2 ) on the entire surface of the substrate used as a mask and by forming a self-assembled-monolayer (SAM) film that functions as an anti-sticking film on the top, The present invention relates to an easy to form SAM film and to improve the function of the mask for nanoimprint.

Description

Mask for Nano Imprint Lithography And Method for Manufacturing Semiconductor Device

1A to 1D are cross-sectional views illustrating a method for manufacturing a mask for a nano imprint lithography and a semiconductor device according to the prior art.

Figures 2a to 2f are cross-sectional views showing a method for manufacturing a mask for nano imprint lithography according to the present invention.

3A-3D are schematic diagrams illustrating a process of forming a self-assembled-monolayer (SAM) film.

4A and 4B are schematic diagrams showing the molecular structure of a self-assembled-monolayer (SAM) membrane.

5 is a cross-sectional view showing a state in which a self-assembled-monolayer (SAM) is defective in a transparent substrate.

6 and 7 are cross-sectional photographs comparing the degree of hydrophobicity for a self-assembled-monolayer (SAM) membrane.

8 is a graph showing the results of measuring the friction of the SAM (self-assembled-monolayer) film.

9 is a graph showing the degree of deposition according to the chemical composition of the SAM (self-assembled-monolayer) film.

FIG. 10 is a graph illustrating differences in chemical composition ratios according to types of SAM (Self-assembled-monolayer) membranes. FIG.

11 is a graph showing the transmittance according to the surface energy of the chromium layer (Cr) or silicon oxide film (SiO 2 ).

12 is a graph comparing the transmittance according to the thickness and surface energy of the transparent substrate and the silicon oxide film (SiO 2 ).

13 is a result of measuring the hydrophobicity of the silicon oxide film (SiO 2 ) or SAM (self-assembled-monolayer) film on the mask surface.

14 is a graph showing a change in surface energy according to the thickness of a silicon oxide film (SiO 2 ) before forming a self-assembled-monolayer (SAM) film.

FIG. 15 is a graph showing the change of surface energy according to the thickness of a silicon oxide film (SiO 2 ) after forming a self-assembled-monolayer (SAM) film.

16 is a planar photograph showing a semiconductor device after forming a self-assembled-monolayer (SAM) film.

The present invention relates to a method for manufacturing a mold for nanoimprint lithography, wherein when the semiconductor device is formed using the nanoimprint process, the surface of the photoresist film is damaged and residues are generated in the process of removing the mask from the photoresist film. In order to solve this problem, a SAM film is formed by forming a silicon oxide film (SiO 2 ) on the entire surface of a substrate used as a mask and forming a self-assembled-monolayer (SAM) film on the top thereof. The present invention relates to an invention that facilitates and enhances the function of a nanoimprint mask.

The photolithography process, which is one of the fine pattern fabrication techniques currently being widely used, includes a process of forming a photoresist pattern by exposing and developing a substrate on which a photoresist is coated, and the size of the formed pattern is limited by optical diffraction. The resolution is determined by the following equation.

Resolution (R) = Kλ / NA. In this case, NA is a numerical aperture, and λ represents the wavelength of the light source.

Therefore, as the degree of integration of semiconductor devices increases, an exposure technique using a light source having a shorter wavelength is required to form a fine pattern. However, in the pattern formation method using the photolithography process, as the degree of integration of semiconductor devices increases, the physical shape of the photoresist pattern itself or between the patterns is changed due to the influence of interference by light, which causes some problems.

The first major problem is that the CD (critical dimension) of the photoresist pattern changes unevenly. If the energy and focus through the lens are distorted, the nonuniformity of the CD increases, so that the material layer pattern formed of the photoresist pattern as a mask is formed in a different shape than desired.

The second problem is that the photoresist pattern is changed by the erosion of the photoresist due to the reaction of the impurities and the photoresist. Accordingly, the material layer pattern formed by using the photoresist pattern as a mask also has a form different from that originally desired.

Nano imprint lithography has been developed to form a pattern like a painting as a next generation lithography method to solve the problems of the photolithography process. The core of the nanoimprint lithography process is to make a mold of a desired pattern having a nanoscale structure by using an electron beam (E-Beam), and to transfer the pattern by dipping the produced mold onto a polymer thin film with a mask and repeatedly using the electron beam. To overcome the productivity of

1A to 1D are cross-sectional views illustrating a method for manufacturing a mask for a nano imprint lithography and a semiconductor device according to the prior art.

Referring to FIG. 1A, the mold mask pattern 40 is formed on the transparent substrate 30, and the anti-stick film 50 is formed on the surface of the mask pattern 40. In this case, the anti-sticking film 50 uses a self-assembled-monolayer (SAM) film, which is formed only on the mold mask pattern 40.

The mask thus formed is turned upside down so that the mold mask pattern 40 faces the ground, and the semiconductor substrate 10 including the photoresist film 20 is positioned under the mask.

Referring to FIG. 1B, the mold mask pattern 40 is pressed onto the photosensitive film 20.

Next, light is passed through to cure the region photosensitive film other than the mold mask pattern 40.

Referring to FIG. 1C, the mask mask pattern 40 is separated from the photosensitive film 20 by lifting the mask. At this time, the photoresist film 20 is adhered to the surface of the mold mask pattern 40 so that the surface of the photoresist film pattern 25 is not smooth when separated, and the residual photoresist film 60 is generated in the region between the photoresist pattern 25. there is a problem.

Referring to FIG. 1D, a mask is removed and a developing process is performed to remove the residual photoresist layer 60. However, the residual photoresist layer 60 may not be completely removed and the photoresist layer pattern 25 may not be formed normally.

When the mold is manufactured in this manner, there is a problem in that the anti-sticking property of the mask is deteriorated, whereby a defect of the semiconductor device occurs and the yield of the manufacturing process is reduced.

The present invention has been made to solve the problems of the conventional nano-imprint lithography mask as described above, forming a silicon oxide film (SiO 2 ) on the entire surface of the substrate to be used as a mask and the SAM to function as an anti-stick film on the top By forming a self-assembled-monolayer film, the present invention relates to a method for manufacturing a mask for semiconductor imprint lithography and a semiconductor device, which facilitates formation of a SAM film and improves nanoimprint process efficiency.

To achieve the above object, a mask for nanoimprint lithography according to the present invention is

Chrome layer pattern provided on the transparent substrate and

It characterized in that it comprises a silicon oxide film (SiO 2 ) provided on the entire surface of the transparent substrate.

Here, the transparent substrate is characterized in that made of quartz, characterized in that it further comprises a SAM (Self-assembled-monolayer) film provided on the silicon oxide film (SiO 2 ), the transparent substrate is a phase inversion ( Phase Shift) pattern.

In addition, the method of forming a semiconductor device using the mask for nano imprint lithography

Forming an etched layer on the semiconductor substrate,

Forming a photoresist film on the etched layer;

Performing a nano imprint lithography process on the photosensitive film by using a mask including a chromium layer pattern on a transparent substrate and a chromium layer pattern and a silicon oxide film (SiO 2 ) provided on the transparent substrate; Wow,

Removing the mask to form a photoresist pattern; and

And etching the etched layer by using the photoresist pattern.

The self-assembled-monolayer (SAM) layer may be further formed on the silicon oxide layer (SiO 2 ), and the self-assembled-monolayer (SAM) layer may be formed of HDFS (heptadecafluoro-1,1,2, 3-tetra-hydrodecyl) trichlorosilane).

Hereinafter, a method of forming a mask for a nano imprint lithography and a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.

2A to 2F are cross-sectional views illustrating a method of fabricating a mask for nanoimprint lithography according to the present invention.

Referring to FIG. 2A, the chromium layer 110 is formed on the transparent substrate 100, and the photosensitive layer 120 is formed on the chromium layer 110. In this case, the photoresist layer 120 is preferably made of a material such as ZEP-7000 reacted by the E-beam, the chromium layer 110 and the photoresist layer 120 is formed to a thickness of 200 ~ 400nm, respectively.

Referring to FIG. 2B, the photosensitive film 125 is exposed using an E-beam. At this time, the E-beam having an injection dose of 10 μm / cm 2 was accelerated to a voltage of 5 to 15 KeV to cure the photosensitive film.

Referring to FIG. 2C, the exposed photoresist film is removed with a developer and a photoresist pattern 125 is formed.

Referring to FIG. 2D, the chromium layer 110 is etched using the photoresist pattern 125 to form the chromium layer pattern 115. In this case, the process of etching the chromium layer 110 may be performed using a Cl 2 / O 2 / He mixed gas in an etching system using an inductively coupled plasma (ICP).

Referring to FIG. 2E, the photoresist pattern 125 is removed and the transparent substrate 110 is etched to a predetermined depth using the chromium layer pattern 115. In this case, it is preferable to use a SF 2 / O 2 / He mixed gas, the thickness of the chromium layer pattern 125 that serves as the light shielding pattern is to remain 100nm or more.

Referring to FIG. 2F, a silicon oxide film (SiO 2 ) 130 is formed on the entire surface of the transparent substrate including the chromium layer pattern 115.

Next, a self-assembled-monolayer (SAM) film is further formed on the silicon oxide film (SiO 2 ) 130. In this case, the silicon oxide film (SiO 2 ) 130 is preferably deposited using PECVD (Plasma Enhanced Chemical Vapor Deposition), and instead of the silicon oxide film (SiO 2 ) 130, Cr 2 O 3 is replaced with ECR (Electron). Cyclotron Resonance) can be formed using an O 2 plasma. The mold mask pattern thus formed is referred to as a new hybrid mask mold.

In this case, the self-assembled-monolayer (SAM) film is formed to prevent adhesion of the photoresist film to the mask in a subsequent imprint process, and the forming process is as follows.

3A to 3D are schematic diagrams illustrating a process of forming a self-assembled-monolayer (SAM) film.

Referring to FIG. 3A, a mask 200 for nano imprint lithography including a chromium layer pattern is manufactured.

Next, the nanoimprint lithography mask 200 is cleaned. At this time, the cleaning solution is a mixture of H 2 SO 4 and H 2 O 2 1: 1 to 2: 1, using a nano imprint lithography mask 200 in the glass (grass) containing the cleaning solution 15 It is desirable to perform the cleaning process with stirring for ˜25 minutes.

Next, the nano-imprint lithography mask 200 is taken out, washed with DI water, and then purified with N 2 gas.

Next, a solution in which 0.1 to 1.0 vol% of HDFS ((heptadecafluoro-1,1,2,3-tetra-hydrodecyl) trichlorosilane) is dissolved in N-nucleic acid (Hexan) is formed in the reactor 210. At this time, it is preferable to set the time of mixing HDFS to 3-7 minutes.

Referring to FIG. 3B, a mask 200 for nanoimprint lithography is placed in an HDFS mixed solution. At this time, half is preferably maintained for 5 to 15 minutes.

Referring to FIG. 3C, a self-assembled-monolayer (SAM) film is formed on the surface of the mask 200 for nanoimprint lithography by the reaction described in FIGS. 4A and 4B.

Referring to FIG. 3D, the nano-imprint lithography mask 200 is taken out of the dissolution tank 210 and cleaned with DI water, and then the surface is purified with N 2 gas. By performing such a process, a self-assembled-monolayer (SAM) film 230 is completed on the surface of the nanoimprint lithography mask 200.

4A and 4B are schematic diagrams showing the molecular structure of a self-assembled-monolayer (SAM) membrane.

Referring to FIG. 4A, heptadecafluoro-1,1,2,2-tetra-hydrodecyl (HTH) and chlorine (Cl) molecules are bonded to silicon (Si) (HDPS ((heptadecafluoro-1,1,2,2) -tetra-hydrodecyl) trichlorosilane (CF2 (CF2) 5 (CH2) 2SiCl3)). Three water (H 2 O) molecules react here.

Referring to Figure 4b, water (H 2 O) molecules there is the formation of substance bound hydrophilic groups of three -OH groups of the hydrophobic HTH mainly of silicon (Si), water as -OH groups are removed after the (H 2 A dehydration reaction occurs in which O) escapes and only a silicon (Si) and HTH group remains on the surface of the substrate to form a self-assembled-monolayer (SAM) film.

5 is a cross-sectional view illustrating a state in which a self-assembled-monolayer (SAM) is defective in a transparent substrate.

Referring to FIG. 5, it can be seen that a self-assembled-monolayer (SAM) film including silicon (Si) and an HTH group is formed on a substrate surface.

6 and 7 are cross-sectional photographs comparing the degree of hydrophobicity with respect to a self-assembled-monolayer (SAM) membrane. The results of experiments using a contact angle measurement system called Phoenix300 of the company It is shown.

Contact angle measurement is a well known analytical technique in many fields, such as adhesion, surface treatment and polymer surface analysis, and is a surface analysis technique that is sensitive to monolayer changes of several units. Contact angle is a measure of the wettability of a solid surface. Low contact angles show high wettability (hydrophilic) and high surface energy, while high contact angles show low wettability (hydrophobic) and low surface energy.

Referring to FIG. 6, hydrophobicity of three thin films is measured before forming a SAM film.

FIG. 6 (i) shows a chromium layer Cr, FIG. 6 (ii) shows a chromium oxide film (Cr 2 O 3 ), and FIG. 6 (iii) shows a silicon oxide film (SiO 2 ). It is shown.

Here, it can be seen that the surface angle of the (i) water droplet formed on the chromium layer Cr is 50 °, which has the greatest hydrophobicity. Next, the surface angle of (ii) the droplet formed on the chromium oxide film (Cr 2 O 3 ) is 32 °, and (iii) the surface angle of the droplet formed on the silicon oxide film (SiO 2 ) is 10 °. It can be seen that SiO 2 ) is the best hydrophilic (Hydrophilic).

Referring to FIG. 7, hydrophobicity is measured after forming SAM films for three thin films.

7 (i) shows a SAM film formed on the chromium layer Cr, and FIG. 7 (ii) shows a SAM film formed on the chromium oxide film Cr 2 O 3 . This shows that a SAM film is formed on the silicon oxide film (SiO 2 ).

Here, (i) the surface angle of the droplet formed on the chromium layer Cr is 98 °, (ii) the surface angle of the droplet formed on the chromium oxide film Cr 2 O 3 is 116 °, and (iii) silicon oxide Since the surface angle of the water droplet formed on the film SiO 2 is 123 °, it can be seen that the silicon oxide film SiO 2 has the best hydrophobic property.

Accordingly, in contrast to FIG. 6, the silicon oxide film (SiO 2 ) is shown to have strong hydrophobicity. This texture indicates that the SAM film is better formed on the surface of a hydrophilic material, such as a silicon oxide film (SiO 2 ).

8 is a graph showing the results of measuring the friction of the SAM (self-assembled-monolayer) film.

Referring to FIG. 8, when the SAM film is formed on the chromium layer Cr, the chromium oxide film Cr 2 O 3 , or the silicon oxide film SiO 2 , the surface friction force is measured. The measuring equipment is either an atomic force microscope (AFM) or a lateral force microscope (LFM). 5 points shall be measured for each material layer, and the size of each specimen shall be 5 μm × 5 μm and scanned with a force of 10 nN.

Here, the average frictional force of the chromium layer Cr has the largest value of 0.039778 mV, and the frictional force of the silicon oxide film (SiO 2 ) is the smallest. Thus, it can be seen that if the SAM film is formed on the silicon oxide film (SiO 2) above the lower the surface energy of the probability of occurrence of the problem of pressure-sensitive adhesive is low.

9 is a graph showing the degree of deposition according to the chemical composition of the SAM (self-assembled-monolayer) film.

Referring to FIG. 9, after forming a SAM film on a chromium layer (Cr), a chromium oxide film (Cr 2 O 3 ) or a silicon oxide film (SiO 2 ), XPS (x-ray photoelectron spectroscopy; VG Multilab ESCA 2000 system) In this graph, the combination of CC and CF is shown in the graph of measurement of surface expansion and deposition of SAM film. As a result of measuring binding energy based on C1s representing 284.5 eV, it can be seen that CC (284.5 eV) and CF (292 eV) bonds are formed as CC bonds and CF bonds when the SAM film is formed.

FIG. 10 is a graph illustrating differences in chemical composition ratios according to types of SAM (self-assembled-monolayer) membranes.

Referring to FIG. 10, a graph comparing the area ratios of CC bonds and CF bonds is calculated, and CF / CC values are in the order of chromium layer (Cr), chromium oxide film (Cr 2 O 3 ), or silicon oxide film (SiO 2 ). It can be seen that the increase. This means that the SAM film, which is a CF bond, is better formed on the surface of the silicon oxide film (SiO 2 ).

In addition, it is the transmittance of the new hybrid mask mold that plays an important role in forming a highly productive photoresist pattern in the nanoimprint lithography process. In order to measure the transmittance, a spectrophotometer is used, and the absorbance of light must be measured first. Absorbance is defined as log (I 0 / I) when light whose intensity is 'I 0 ' changes to 'I' after passing through the sample. The transmittance T is defined as log (I / I 0 ) = log (1 / T).

11 is a graph showing the transmittance according to the surface energy of the chromium layer (Cr) or silicon oxide film (SiO 2 ). The equipment used in this experiment was made using Agilent's 8453 UV-Visible spectrophotometer and ranged from 300 nm to 800 nm. It is measured at.

Referring to FIG. 11, when the chromium layer Cr or the silicon oxide film SiO 2 was formed on quartz, which is a transparent substrate, the transmittances of the chromium layer Cr were measured. It can be seen that the transmittance is close to 0% and the silicon oxide film (SiO 2 ) has a transmittance close to 100%.

12 is a graph comparing the transmittance according to the thickness and the surface energy of the transparent substrate and the silicon oxide film (SiO 2 ).

Referring to FIG. 12, an enlarged portion of the silicon oxide film (SiO 2 ) of FIG. 11 is shown. Here, in the case of the silicon oxide film (SiO 2 ), the transmittance was measured while changing to a thickness of 5 nm, 10 nm, 15 nm, or 20 nm. . However, in each case, only the slight difference is shown and the result is almost the same. Therefore, the transmittance of the silicon oxide film (SiO 2 ) does not depend on the thickness and the transmittance is also high, so it can be seen that it is suitable as a constituent material of the mask for nanoimprint lithography.

FIG. 13 is a result of measuring hydrophobicity depending on the presence or absence of a silicon oxide film (SiO 2 ) or a self-assembled-monolayer (SAM) film on a mask surface.

Referring to FIG. 13, (i) of FIG. 13 is a contact angle measured when a silicon oxide film (SiO 2 ) and a SAM film are not present on a quartz surface, which is a transparent substrate. The surface angle is 28 °, and FIG. 13. (Ii) of FIG. 13 illustrates that a SAM film is formed on a quartz substrate, which is a transparent substrate. The surface angle is 114 °, and FIG. 13 (iii) forms a SAM film on a transparent substrate substrate including a silicon oxide film (SiO 2 ). One can see that the surface angle is 121 °. Therefore, it can be seen that the silicon oxide film (SiO 2 ) has the best hydrophobic property.

FIG. 14 is a graph illustrating a change in surface energy according to a thickness of a silicon oxide film (SiO 2 ) before forming a self-assembled-monolayer (SAM) film.

Referring to FIG. 14, when the silicon oxide film SiO 2 is deposited using PECVD, the silicon oxide film SiO 2 is also deposited on the sidewall of the mold mask pattern.

Therefore, the silicon oxide film (SiO 2 ) should be deposited as thin as possible because it affects the pattern size (Critical Dimension; CD) when forming an extremely small fine pattern. However, since the silicon oxide film (SiO 2 ) does not function as an anti-sticking film even if it is too thin, the surface energy according to the thickness of the silicon oxide film (SiO 2 ) is calculated by using a contact angle. This is the minimum thickness that can be applied.

FIG. 15 is a graph showing the change of surface energy according to the thickness of the silicon oxide film (SiO 2 ) after forming a self-assembled-monolayer (SAM) film.

Comparing FIGS. 14 and 15, it can be seen that the surface energy values are greatly changed at 5 nm thickness in both cases. In FIG. 14, the surface energy is increased when the thickness of the silicon oxide film (SiO 2 ) is 5 nm. In FIG. 15, the surface energy is high when the thickness of the silicon oxide film (SiO 2 ) is 5 nm or less. Therefore, in the case of the SAM film formed on the silicon oxide film (SiO 2 ), it can be seen that the surface energy is stably secured when the thickness thereof is 5 nm or more.

16 is a planar photograph showing a semiconductor device after forming a self-assembled-monolayer (SAM) film.

Referring to FIG. 16, after forming a chromium layer (Cr) pattern on the transparent substrate, a silicon oxide film (SiO 2 ) is formed on the entire surface, and a SAM film is formed on the surface of the silicon oxide film (SiO 2 ) and then nano It is a photograph showing that the imprint process was performed. By using a silicon oxide film (SiO 2 ), it is possible to form a clean nano imprint pattern.

In this case, after forming the etched layer on the patterned semiconductor substrate, a negative photosensitive film is formed on the etched layer.

Next, a lithography mask for nanoimprint comprising a silicon oxide film (SiO 2 ) is placed on the photosensitive film and maintained at a pressure of 20 to 40 bar.

Next, the photosensitive film is cured by exposing it for 200 to 400 seconds with light having an irradiation amount of 2.77 mW / cm 2.

Next, the nanoimprint lithography mask is removed, the photoresist is baked for 100 to 200 seconds at a temperature of 90 to 120 ° C., and the semiconductor substrate is immersed in the developing solution for 20 to 40 seconds to remove the remaining photoresist. do.

As described above, the nanoimprint lithography mask according to the present invention is a silicon oxide film (SiO 2 ) on the entire surface of the substrate used as a mask to facilitate the formation of a self-assembled-monolayer (SAM) film that functions as an anti-stick film. To form. The silicon oxide film (SiO 2 ) can easily form a SAM film, has low surface energy, and has excellent transmittance, thereby improving the function of the mask for nanoimprint.

As described above, in the method for forming a mask for semiconductor imprint lithography and a semiconductor device according to the present invention, a silicon oxide film (SiO 2 ) is formed on the entire surface of a substrate used as a mask, and a SAM is formed on the silicon oxide film (SiO 2 ). By forming the film, the efficiency of the nanoimprint process can be improved. Therefore, it provides an effect that can increase the process yield of the semiconductor device and improve the reliability.

In addition, a preferred embodiment of the present invention is for the purpose of illustration, those skilled in the art will be able to various modifications, changes, substitutions and additions through the spirit and scope of the appended claims, such modifications and changes are the following claims It should be seen as belonging to a range.

Claims (7)

A chromium layer pattern provided on the transparent substrate; And Mask for nanoimprint lithography comprising a silicon oxide film (SiO 2 ) provided on the entire surface of the transparent substrate. The method of claim 1, The transparent substrate is a nano imprint (Nano Imprint) lithography mask, characterized in that made of quartz. The method of claim 1, A mask for nano imprint lithography, further comprising a SAM (Self-assembled-monolayer) film provided on the silicon oxide film (SiO 2 ). The method of claim 1, The transparent substrate is a nano imprint lithography mask, characterized in that it comprises a phase shift (Phase Shift) pattern. Forming an etched layer on the semiconductor substrate; Forming a photoresist film on the etched layer; Performing a nano imprint lithography process on the photosensitive film by using a mask including a chromium layer pattern on a transparent substrate and a chromium layer pattern and a silicon oxide film (SiO 2 ) provided on the transparent substrate; ; Removing the mask to form a photoresist pattern; And And etching the etched layer by using the photoresist pattern. The method of claim 5, wherein And forming a self-assembled-monolayer (SAM) film on the silicon oxide film (SiO 2 ). The method of claim 5, wherein The self-assembled-monolayer (SAM) film is a method of forming a semiconductor device, characterized in that formed by HDFS ((heptadecafluoro-1,1,2,3-tetra-hydrodecyl) trichlorosilane).
KR1020070056078A 2007-06-08 2007-06-08 Mask for nano imprint lithography and method for manufacturing semiconductor device KR20080107816A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105355543A (en) * 2015-09-29 2016-02-24 淮北师范大学 Preparation method of silk fiber-based patterned semiconductor polymer film

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105355543A (en) * 2015-09-29 2016-02-24 淮北师范大学 Preparation method of silk fiber-based patterned semiconductor polymer film

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