KR20080081449A - Plasma display device and driving method thereof - Google Patents

Abstract

A plasma display apparatus and a driving method thereof are provided to minimize luminance difference by adjusting a turn on period of a power recovery switch along scan directions of first and second groups in dual scanning. A plasma display apparatus includes plural address and scan electrodes, an address electrode driver(300), and a controller. The address electrode driver includes a power recovery capacitor(C1) and an address driving circuit(310). The address driving circuit includes a first switch which controls a current path between the power recovery capacitor and the address electrodes. The address electrode driver turns on the first switch during a first period while a voltage of the address electrodes is converted from a first voltage to a second voltage and during a second period while the voltage of the address electrodes is converted from the second voltage to the first voltage. The controller divides the scan electrodes into first and second groups, applies plural scan pulses to the scan electrodes, and varies one of the first and second periods according to a scan direction by which the scan pulses are supplied to the scan electrodes.

Description

Plasma display device and driving method thereof {PLASMA DISPLAY DEVICE AND DRIVING METHOD THEREOF}

1 is a plan view of a plasma display device according to an exemplary embodiment of the present invention.

2 illustrates a driving waveform of a plasma display device according to an exemplary embodiment of the present invention.

3 is a diagram illustrating an address driving circuit according to an exemplary embodiment of the present invention.

4 is a diagram illustrating signal timing of an address driving circuit for generating a driving waveform applied to an address electrode.

5A to 5D are diagrams each illustrating an address power recovery operation of the address driving circuit of FIG. 3.

6A to 6C are diagrams showing turn-on times of the power recovery switch S3 in the scan direction, respectively.

The present invention relates to a plasma display device and a driving method thereof.

A plasma display device is a flat display device that displays characters or images by using plasma generated by gas discharge. The display panel may have tens to millions or more of discharge cells (hereinafter, referred to as 'cells') according to its size. Arranged in matrix form.

Such a plasma display device divides one frame into a plurality of subfields having respective weights, and time-division controls them to implement gray scale. In the address period of each subfield, scan pulses are sequentially applied to the plurality of scan electrodes, and address pulses are selectively applied to the plurality of address electrodes. At this time, address discharge occurs in a cell to which a scan pulse and an address pulse are simultaneously applied.

On the other hand, the dual scan is performed by dividing the scan electrodes into a first group and a second group for an address operation faster than when the scan electrodes are sequentially scanned in the address period. That is, the scan in the address period is first divided into two screens up and down, and the scan in the first group (for example, 1 to 540 lines of 1080 Line) starts from the first electrode (1 Line of 1080 Line), and the second Scanning in a group (for example, 541 to 1080Line in 1080Line) starts with the lower first electrode (for example, 541Line in 1080Line), and the first electrode (1Line, 541Line) in the first group and the second group is Start scanning at the same time. When performing an address operation by performing a dual scan, the first electrode of the first group (for example, 1 to 540 Line of 1080 Line) and the first group of the second group (for example, 541 to 1080 Line of 1080 Line) Since the electrode (for example, 541 Line of 1080 Line) performs the address operation first, the sustain operation is performed after the longest period. Therefore, the wall charges present in the cells selected during the scan of the first and second groups of the first electrodes 1Line and 541Line perform a sustain operation after a long time, so that the wall charges are largely lost. A luminance step occurs between the last electrode of and the first electrode of the second group.

Accordingly, an aspect of the present invention is to solve the above-described problems, and to provide a plasma display device and a driving method thereof for preventing a luminance step that may occur during the dual scan operation.

According to one aspect of the present invention, a plasma display device is provided. The plasma display device includes a plurality of address electrodes, a plurality of scan electrodes, a power recovery capacitor, and an address driving circuit, wherein the address driving circuit is configured to control a current path between the power recovery capacitor and the address electrode. And a switch, wherein the first switch is turned on for a first period of the period of changing the voltage of the address electrode from the first voltage to the second voltage, and the voltage of the address electrode is changed from the second voltage to the first voltage. The address electrode driver for turning on the first switch and the plurality of scan electrodes are divided into at least a first group and a second group and a plurality of scan pulses are applied to the plurality of scan electrodes of each group. The first period and the second period according to a scan direction in which a plurality of scan pulses are applied to the plurality of scan electrodes. And a controller for changing at least one of the periods. The address driving circuit is manufactured in the form of an integrated circuit. And a packaging connection member connecting the address electrode and the power recovery capacitor, wherein the address driving circuit is mounted to the packaging connection member. The packaging connecting member includes a tape carrier package. The control unit may be configured to determine whether the scan direction of the first group or the scan direction of the second group is a first scan direction closer to a scan electrode corresponding to a boundary area between the first group and the second group. The turn-on period of the first switch is set to be shorter as the scan proceeds in the first scan direction. The control unit may be configured to set the first scan direction of the first group or the second scan direction when the scan direction of the second group is a second scan direction away from the scan electrode corresponding to the boundary area of the first group and the second group. The turn-on period of the first switch is set to be shorter as the scan proceeds in the second scan direction. The address driving circuit further includes a driving switch forming a path for applying an address voltage to the address electrode, and a ground switch forming a path for applying a ground voltage to the address electrode, wherein the address driving circuit charges the power recovery capacitor. Discharge to supply a voltage between the address voltage and the ground voltage to the address electrode.

Further, according to another feature of the present invention, a first end is connected to a plurality of address electrodes, a plurality of scan electrodes, a first power supply for supplying a first voltage, and a second end is electrically connected to the address electrode. The first switch is connected to a second power supply for supplying a second voltage lower than the first voltage, and the second switch and the second electrode are electrically connected to the address electrode. A third switch having a first end connected to a power recovery capacitor for supplying a third voltage between a first voltage and the second voltage, and a second end connected to a contact between the address electrode and the first and second switches; Wherein the plurality of scan electrodes is divided into at least a first group and a second group, a plurality of scan pulses are applied to a plurality of scan electrodes of each group, and a plurality of scan pulses are applied to the plurality of scan electrodes. As the scanning direction controls the turn-on period of the third switch. And if the scan direction of the first group or the scan direction of the second group is a first scan direction closer to the scan electrode corresponding to the boundary region of the first group and the second group, the third scan direction; The turn-on period of the switch is shortened as the scan proceeds in the first scan direction. Further, when the scan direction of the first group or the scan direction of the second group is a second scan direction away from the scan electrode corresponding to the boundary area of the first group and the second group, the third scan direction. The turn-on period of the switch becomes shorter as the scan proceeds in the second scan direction. And turning on the third switch to raise the voltage of the second electrode to the third voltage during the first period, turning off the third switch and turning on the first switch during the second period, to turn on the second electrode. The first voltage is applied to and maintained, the first switch is turned off for a third period and the third switch is turned on to lower the voltage of the second electrode to the third voltage. The third switch is turned off and the second switch is turned on to apply and maintain the second voltage to the second electrode.

A method of driving a plasma display device, the method comprising: a power recovery capacitor, a plurality of address electrodes, a plurality of scan electrodes, and a plurality of switches connected between the power recovery capacitor and the plurality of address electrodes, respectively. Turning on at least one first switch of the plurality of switches to increase the voltage of the address electrode corresponding to the at least one first switch, and applying a first voltage to the address electrode corresponding to the at least one first switch. Applying at least one second switch of the plurality of switches to reduce an address voltage corresponding to the at least one second switch, and applying the first to the address electrode corresponding to the at least one second switch. Applying a second voltage lower than one voltage; and applying a plurality of scan electrodes. The at least one agent may be divided into a first group and a second group, and a plurality of scan pulses are applied to a plurality of scan electrodes of each group, and a plurality of scan pulses are applied to the plurality of scan electrodes. Adjusting the turn on time of one switch or the turn on time of the at least one second switch. And if the scan direction of the first group or the scan direction of the second group is a first scan direction closer to the scan electrode corresponding to the boundary area of the first group and the second group, the at least one scan direction. And shortly adjusting a turn on time of the first switch or a turn on time of the at least one second switch. In addition, when the scan direction of the first group or the scan direction of the second group is a second scan direction away from the scan electrode corresponding to the boundary area of the first group and the second group, the at least one first And shortly adjusting a turn on time of the first switch or a turn on time of the at least one second switch.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention. In the drawings, parts irrelevant to the description are omitted in order to clearly describe the present invention. Like parts are designated by like reference numerals throughout the specification. When a part is connected to another part, this includes not only a directly connected part but also a case where another part is connected in between.

Throughout the specification, when a part is said to be "connected" to another part, it includes not only "directly connected" but also "electrically connected" with another element in between. . In addition, when a part is said to "include" a certain component, this means that it may further include other components, except to exclude other components unless otherwise stated.

A plasma display device and a driving method thereof according to an embodiment of the present invention will now be described in detail.

1 is a schematic plan view of a plasma display device according to an exemplary embodiment of the present invention.

As shown in FIG. 1, a plasma display device according to an exemplary embodiment of the present invention includes a plasma display panel 100, a controller 200, an address electrode driver 300, a scan electrode driver 400, and a sustain electrode driver 500. It includes.

The plasma display panel 100 includes a plurality of address electrodes A1 to Am extending in the vertical direction, a plurality of sustain electrodes X1 to Xn and a plurality of scan electrodes Y1 to extend in pairs in the horizontal direction. Yn). The sustain electrodes X1 to Xn are formed corresponding to the scan electrodes Y1 to Yn. At this time, the discharge space at the intersection of the address electrodes A1 to Am and the sustain and scan electrodes X1 to Xn and Y1 to Yn forms a discharge cell. The structure of the plasma display panel 100 is an example, and a panel having another structure to which the driving waveform described below may be applied may also be applied to the present invention.

The controller 200 receives an image signal from the outside and outputs an address electrode driving control signal, a sustain electrode driving control signal, and a scan electrode driving control signal. The controller 200 controls to drive a frame by dividing the frame into a plurality of subfields, and the gray level is expressed by a combination of weights of the subfields.

The address electrode driver 300 receives an address electrode driving control signal from the controller 200 and selectively applies address pulses for selecting cells to be turned on and cells not to be turned on during the address period to the plurality of address electrodes A1-Am. . In this case, when the address voltage is applied to each of the plurality of cells in the address period, the controller 200 adjusts the address voltage application time according to the scan direction. Here, the scan means an operation in which the scan electrode driver 400 applies a scan pulse to the scan electrodes Y1-Yn.

A detailed configuration and operation will be described later with reference to FIGS. 2 to 6.

The scan electrode driver 400 receives a scan electrode driving control signal from the controller 200 and applies a driving voltage to the scan electrodes Y1-Yn. In particular, the scan electrode driver 400 selectively applies a scan pulse to the plurality of scan electrodes Y1-Yn during the address period. For example, the scan electrode driver 400 may sequentially apply scan pulses to the scan electrodes Y1-Yn in the order in which the scan electrodes are arranged in the column direction. A plurality of scan electrodes according to an embodiment of the present invention may be arranged in a first group and a second group to sequentially apply scan pulses to the first group and the second group at the same time.

The sustain electrode driver 500 receives the sustain electrode driving control signal from the controller 200 and applies a driving voltage to the sustain electrode.

2 illustrates a driving waveform of a plasma display device according to an exemplary embodiment of the present invention.

As shown in Fig. 2, as shown in Fig. 2, in the rising period of the reset period, the voltages of the sustain electrode and the address electrode are kept at the reference voltage (assuming that the reference voltage is the ground voltage (0V) in Fig. 2), The voltage of the scan electrode is gradually increased from Vs voltage to Vst voltage. As such, while the voltage of the scan electrode is increased, a weak discharge is generated between the scan electrode and the sustain electrode and between the scan electrode and the address electrode, so that a negative wall charge is formed at the scan electrode and (+) at the sustain electrode and the address electrode. Wall charges are formed.

In the falling period of the reset period, the voltage of the scan electrode is gradually decreased from the Vs voltage to the Vnf voltage while maintaining the voltages of the address electrode and the sustain electrode at the reference voltage and the Ve voltage, respectively. Then, while the voltage of the scan electrode decreases, a weak discharge occurs between the scan electrode and the sustain electrode and between the scan electrode and the address electrode, and thus (-) wall charge formed on the scan electrode and the sustain electrode and the address electrode ( +) The wall charge is erased. In general, the magnitude of the (Vnf-Ve) voltage is set near the discharge start voltage between the scan electrode and the sustain electrode. As a result, the wall voltage between the scan electrode and the sustain electrode becomes almost 0 V, and it is possible to prevent the cell in which the address discharge has not occurred in the address period from being erroneously discharged in the sustain period.

In the address period, in order to select the discharge cells to be turned on, the scan pulse is sequentially applied to the plurality of scan electrodes while the Ve voltage is applied to the sustain electrodes. Here, the scan pulse is lowered to the VscL voltage by using a predetermined capacitor according to an embodiment of the present invention and then raised to the VscH voltage. Such a scan pulse is sequentially applied to the plurality of scan electrodes, and a VscH voltage higher than the VscL voltage is applied to the scan electrode to which the scan pulse is not applied.

The address electrode driver 300 applies a Va voltage to the address electrodes of the discharge cells to emit light among the discharge cells formed by the scan electrodes to which the scan pulses are applied. Then, address discharge occurs between the address electrode to which the Va voltage is applied and the scan electrode to which the VscL voltage is applied, and the scan electrode to which the VscL voltage is applied, and the sustain electrode to which the Ve voltage is applied. As a result, (+) wall charges are formed in the scan electrode, and (-) wall charges are formed in the address electrode and the sustain electrode.

In order to perform such an operation in the address period, the scan electrode driver 400 selects a scan electrode to which a scan pulse is to be applied among the scan electrodes Y1 to Yn. For example, in the single scan driving method, the scan electrodes may be selected in the order arranged in the vertical direction. When one scan electrode is selected, the address electrode driver 300 selects a discharge cell to be turned on among discharge cells formed by the scan electrode. That is, the address electrode driver 300 selects a cell to which an address pulse of Va voltage is applied among the address electrodes.

In the dual scan driving method according to an exemplary embodiment of the present invention, the first group (for example, 1 to 540 Line of 1080 Line) and the second group (for example, 541 to 1080 Line of 1080 Line) of the first group (for example, 1 to 540 Line of 1080 Line) are arranged in the vertical direction. The scan electrodes can be selected at the same time. When the scan electrode is selected, the address electrode driver 300 selects a discharge cell to be turned on among discharge cells formed by the scan electrode.

In the sustain period, sustain discharge pulses having a high level voltage (Vs voltage in FIG. 2) and a low level voltage (0 V voltage in FIG. 2) are applied to the scan electrode and the sustain electrode in opposite phases. Then, a Vs voltage is applied to the scan electrode and a 0V voltage is applied to the sustain electrode to generate sustain discharge between the scan electrode and the sustain electrode, and the sustain discharge causes negative (-) wall charges and (+) to the scan electrode and the sustain electrode, respectively. Wall charges are formed. Hereinafter, the process of applying the sustain discharge pulse to the scan electrode and the sustain electrode is repeated a number of times corresponding to the weight indicated by the corresponding subfield. In general, the sustain discharge pulse is a square wave having a Vs sustain interval.

Hereinafter, the address driving circuit 310 included in the selected address electrode driver 300 will be described in detail with reference to FIG. 3.

3 is a diagram schematically illustrating an address electrode driver 300 according to an exemplary embodiment of the present invention.

As shown in FIG. 3, the address electrode driver 300 according to the exemplary embodiment of the present invention may be connected to at least one power recovery capacitor C1 and a plurality of address electrodes A1-Am of FIG. 1, respectively. Address driving circuit 310 is included.

In FIG. 3, only the address driving circuit 310 connected to one address electrode A is illustrated for convenience of description, and the capacitive component formed by the address electrode A and the scan electrode Y is illustrated in the panel capacitor Cp. ). The predetermined number of address driving circuits 310 among the plurality of address driving circuits 310 may be manufactured in the form of one integrated circuit (IC). The integrated circuit may be mounted in the form of a chip in a packaging connection member such as a tape carrier package (TCP). The packaging connection member is adhered to the printed circuit board (not shown) of the plasma display panel 100 and the address electrode driver 300, and the power recovery capacitor C1 is mounted on the printed circuit board to integrate the packaging connection member. Can be connected to.

At least one power recovery capacitor C1 may be commonly connected to a plurality of address driving circuits 310 connected to a plurality of address electrodes A1-Am of FIG. 1, and a predetermined number of address driving circuits ( For example, a separate power recovery capacitor C1 may be connected to each integrated circuit formed of a predetermined number of address driving circuits. At this time, the size of the power recovery capacitor (C1) is larger than the panel capacitor (Cp), so that when the switch S3 is turned on, the power recovery capacitor (C1) of the power recovery capacitor (C1) by the current charged or discharged in the panel capacitor (Cp) Assume that the voltage change is small. In addition, it is assumed that the power recovery capacitor C1 supplies a voltage between Va voltage and 0V, in particular, approximately Va / 2 voltage.

The address driving circuit 310 includes a driving switch S1, a grounding switch S2, and a power recovery switch S3.

The first terminal of the driving switch S1 is connected to a power supply for supplying the address voltage Va and the second terminal is connected to the address electrode A. FIG. When the driving switch S1 is turned on, the address voltage Va is applied to the address electrode A. FIG. The ground switch S2 is connected to a power supply (ground terminal in FIG. 3) in which a first terminal is connected to the address electrode A and a second terminal supplies a reference voltage. When the ground switch S2 is turned on, the ground voltage 0V is applied to the address electrode A. In the power recovery switch S3, a first terminal is connected to the capacitor C1 and a second terminal is connected to the address electrode A. FIG.

In FIG. 3, a field effect transistor may be used for each of the switches S1, S2, and S3, and another switch having the same or similar function may be used. In addition, when the transistor in which the body diode is formed is used as the switches S1, S2, and S3, the switch S3 is back-to-back in order to block a path in which the power recovery capacitor C1 is charged or discharged by the body diode. It may be formed by a connected transistor.

Next, the operation of the address electrode driver 300 of FIG. 3 will be described in detail with reference to FIGS. 4 and 5A to 5D.

4 is a diagram illustrating signal timing of the address electrode driver 300. 5A to 5D are views illustrating the operation of the address electrode driver 300 of FIG. 3, respectively.

In FIG. 4, it is assumed that the ground switch S2 is turned on and the ground voltage 0V is applied to the address electrode A before the step 1 M1 starts.

4 and 5A, in step 1 M1, the ground switch S2 is turned off and the switch S3 is turned on. Then, as shown in FIG. 5A, the voltage that has been charged to the power recovery capacitor C1 through the path (①) of the power recovery capacitor C1-switch S3-panel capacitor Cp is directly transferred to the panel capacitor Cp. ) Is charged. The voltage of the address electrode A then increases from 0V to near the predetermined voltage.

The voltage of the address electrode A is determined by the turn on time of the switch S3. As described above, assuming that a voltage Va / 2 is charged in the capacitor C1 and that the capacity of the capacitor C1 is large, the voltage of the address electrode A may increase to approximately Va / 2 voltage.

When the voltage of the capacitor C1 is directly charged to the panel capacitor Cp, the charging time may be shorter than when the panel capacitor Cp is charged using the resonance of the external inductor and the panel capacitor.

Next, in step 2 M2, the switch S3 is turned off and the drive switch S1 is turned on. Then, as shown in FIG. 5B, Va is formed by hard switching to the address electrode A of the panel capacitor Cp through the path (2) of the Va power source-drive switch S1-panel capacitor Cp. Voltage is applied.

Next, in step 3 (M3), the drive switch S1 is turned off, and the switch S3 is turned on. Then, as shown in FIG. 5C, the voltage that has been charged to the panel capacitor Cp through the path ③ of the panel capacitor Cp-switch S3-power recovery capacitor C1 is stored in the power recovery capacitor C1. Is recovered. Then, the voltage of the address electrode A decreases from Va to near the predetermined voltage.

Next, in step 4 (M4), the switch S3 is turned off, and the ground switch S2 is turned on. Then, as illustrated in FIG. 5D, 0 V voltage is applied to the address electrode A of the panel capacitor Cp through hard switching through the path ④ of the ground power ground switch S2 and the panel capacitor Cp. Is approved.

Steps 1 to 4 (M1-M4) described above operate when data applied to the address electrode A changes. For example, 0 V is applied to the address electrode A in a period in which a scan pulse is applied to the first scan electrode (Y1 in FIG. 1) (a period before M1 starts), and a second scan electrode (Y2 in FIG. 1). In the period M2 during which the scan pulse is applied, the Va voltage is applied to the address electrode A, and the address electrode A during the period M4 during which the scan pulse is applied to the third scan electrode (Y3 in FIG. 1). In the case where 0V is applied, the operation may be performed as in steps 1 to 4 (M1-M4). However, if Va voltage is applied to the address electrode A in the periods M2 and M4 during which the scan pulse is applied to the second and third scan electrodes (Y2 and Y3 in Fig. 1), there is no step 3 (M3) ( That is, Va voltage may be continuously applied to the address electrode A without reducing the voltage of the address electrode A. FIG. Similarly, if a voltage of 0 V is applied to the address electrode A in the period (M1 start and M2) during which the scan pulse is applied to the first and second scan electrodes (Y1, Y2 in FIG. 1), step 1 (M1) Without this (that is, without increasing the voltage of the address electrode A), the 0V voltage can be continuously applied to the address electrode A.

Next, the turn-on time (M1 and M3 of FIG. 4) of the power recovery switch of FIG. 3 is described with reference to FIGS. 6A to 6C for a method of minimizing the luminance step according to the turn-on time of the switch S3 according to the scan direction. Explain.

6A to 6C are diagrams showing turn-on times of the power recovery switch S3 in the scan direction, respectively. According to an embodiment of the present invention, in order to minimize the luminance step in the boundary area of the first group (for example, 1 to 540 Line of 1080 Line) and the second group (for example, 541 to 1080 Line of 1080 Line) of the dual scan. When the scan is in progress, the switch S3 turn-on time is reduced according to the scan direction. In detail, the controller 200 of FIG. 1 reduces the turn-on time of the switch S3 according to the scan direction from the scan electrodes in which the scan starts in the first group and the second group to the scan electrodes last in the scan. . For example, in the first group (1 to 540 Line of 1080Line), the amount of wall charges is smaller from the scan electrode (1Line) to start the scan to the scan electrode (540Line) to the last scan. Therefore, the address discharge is weaker and the brightness of the screen becomes darker from the scan electrode 1Line at which the scan starts to the scan electrode 540Line at the last scan. In addition, the amount of wall charges decreases from the scan electrode 541Line at which scanning starts in the second group (541-1080Line of 1080Line) to the scan electrode 1080Line in which scanning is finally performed. Therefore, the address discharge becomes weaker and the brightness of the screen becomes darker from the scan electrode 541Line at which scanning starts to the scan electrode 1080Line at the last scanning. Therefore, in order to prevent the luminance step from occurring in the boundary region between the scan electrode 540Line of the first group (1 to 540Line of 1080Line) and the scan electrode 541Line of the second group (541 ~ 1080Line of 1080Line), The turn-on time of the switch S3 is reduced according to the progressing direction. This increases the time for which the address voltage is applied, thereby increasing the amount of wall charge, and better sustain discharge. Therefore, by adjusting the turn-on time of the switch S3 according to the scan direction, the luminance step existing in the boundary area of the first group and the second group can be compensated.

According to the first embodiment of the present invention, as shown in FIG. 6A, when the scan proceeds in the first scan direction in the first group and the scan proceeds in the second scan direction in the second group, the first scan direction And as the scan progresses in the second scan direction, the turn-on time of the switch S3 is gradually reduced. Then, in response to the decrease in the turn-on time of the switch S3, the time for which the address voltage is applied is gradually increased. Here, the first scanning direction of the first group is a direction of scanning from the scan electrode which is far from the boundary point of the first group and the second group to the scan electrode closest to the boundary point between the first group and the second group. . The second scan direction of the second group is a direction of scanning from the scan electrode closest to the boundary point of the first group and the second group to the scan electrode farthest from the boundary point of the first group and the second group. Specifically, in the first group (1 to 540 lines of 1080Line), the scan electrode that is far from the boundary point of the first group and the second group (1Line of 1080Line) to the scan electrode closest to the boundary point between the first group and the second group Scanning proceeds in the first scanning direction up to (540 lines of 1080 Lines), and in the second group, the scan group (541 Lines of 1080 Lines) closest to the boundary point between the first group and the second group is located in the second group (541 of 1080 Lines). Scanning proceeds in the second scan direction to the scan electrode (1080Line of 1080Line) which is the furthest point from the boundary point of the first group and the second group of the 1080Line.

According to the second embodiment of the present invention, as shown in FIG. 6B, the scan is performed in the third scan direction in the first group (1 to 540 Line of 1080 Line), and in the second group (541 to 1080 Line of 1080 Line). As the scan progresses in the fourth scan direction, the turn-on time of the switch S3 is gradually reduced. Then, in response to the decrease in the turn-on time of the switch S3, the time for which the address voltage is applied is gradually increased. Here, the third scanning direction of the first group is a direction of scanning from the scan electrode which is far from the boundary point of the first group and the second group to the scan electrode closest to the boundary point between the first group and the second group. . The fourth scan direction of the second group is a scan direction from a scan electrode which is far from the boundary point of the first group and the second group to a scan electrode closest to the boundary point between the first group and the second group. Specifically, in the first group (1 to 540 lines of 1080Line), the scan electrode that is far from the boundary point of the first group and the second group (1Line of 1080Line) to the scan electrode closest to the boundary point between the first group and the second group Scanning proceeds in the third scanning direction up to (540 Lines among 1080Lines), and in the second group (541 to 1080Lines among 1080Lines), the scan electrode (1080Line among 1080Lines) is the region farthest from the boundary point between the first group and the second group. ) Scan in the fourth scan direction to the scan electrode (541 Line of 1080Line) closest to the boundary region between the first group and the second group.

According to the third embodiment of the present invention, as shown in FIG. 6C, when the first group proceeds in the fifth scan direction and the second group goes in the sixth scan direction, the fifth scan direction and the sixth scan direction. As the scan progresses, the turn-on time of the switch S3 gradually decreases. Then, as the turn-on time of the switch S3 decreases, the time for which the address voltage is applied is gradually increased. Here, the fifth scan direction of the first group is a direction of scanning from the scan electrode closest to the boundary point of the first group and the second group to the scan electrode farthest from the boundary point of the first group and the second group. The sixth scan direction of the second group is a direction of scanning from the scan electrode which is far from the boundary point of the first group and the second group to the scan electrode closest to the boundary point between the first group and the second group. In more detail, in the first group (1 to 540 lines of 1080 Line), the scan electrode that is farthest from the boundary region of the first group and the second group from the scan electrode (540 line of the 1080 Line) closest to the boundary region of the first group and the second group Scanning proceeds in the fifth scanning direction up to (1Line of 1080Line), and in the second group, the first group and the first group of the scanning electrode (1080Line of 1080Line) which is the region farthest from the boundary point between the first group and the second group The scan proceeds in the sixth scan direction to the scan electrodes (541 lines of 1080 Lines) closest to the boundary region between the two groups.

As described above, according to the exemplary embodiment of the present invention, the luminance step may be compensated by adjusting the turn-on time of the power recovery switch and adjusting the time when the address voltage is applied according to the scan direction.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the invention defined in the following claims are also provided. It belongs to the scope of rights.

As described above, according to the exemplary embodiment of the present invention, in the dual driving method in the address period, the luminance step may be minimized by adjusting the turn-on period of the power recovery switch according to the scan direction of the first group and the second group. It has an effect.

Claims (14)

A plurality of address electrodes; A plurality of scan electrodes; A power recovery capacitor and an address driving circuit, the address driving circuit including a first switch controlling a current path between the power recovery capacitor and the address electrode; During the period in which the voltage of the address electrode is changed from the first voltage to the second voltage, the first switch is turned on during the first period, and the period of the voltage in the address electrode is changed from the second voltage to the first voltage. An address electrode driver to turn on the first switch for a second period of time; And The plurality of scan electrodes are divided into at least a first group and a second group, a plurality of scan pulses are applied to the plurality of scan electrodes of each group, and a scan direction is applied to the plurality of scan electrodes. A controller for changing at least one of the first period and the second period Plasma display device comprising a. The method of claim 1, And the address driving circuit is formed in an integrated circuit form. The method of claim 2, Further comprising a packaging connecting member for connecting the address electrode and the power recovery capacitor, And the address driving circuit is mounted to the packaging connection member. The method of claim 3, The packaging connecting member includes a tape carrier package.  The method of claim 1, The control unit If the scan direction of the first group or the scan direction of the second group is a first scan direction closer to the scan electrode corresponding to the boundary area of the first group and the second group, the scan direction of the first switch The turn on period is shortened as the scan proceeds in the first scan direction. The method of claim 1, The control unit If the scan direction of the first group or the scan direction of the second group is a second scan direction away from the scan electrode corresponding to the boundary area of the first group and the second group, the turn-on of the first switch is turned on The period becomes shorter as the scan advances in the second scan direction. The method of claim 1, The address driving circuit, A driving switch forming a path for applying an address voltage to the address electrode; And And a ground switch forming a path for applying a ground voltage to the address electrode.  And charging and discharging the power recovery capacitor to supply a voltage between the address voltage and the ground voltage to the address electrode. A plurality of address electrodes; A plurality of scan electrodes; A first switch having a first end connected to a first power supply for supplying a first voltage, and a second end electrically connected to the address electrode; A second switch having a first end connected to a second power supply for supplying a second voltage lower than the first voltage, and having a second end electrically connected to the address electrode; And A first end is connected to a power recovery capacitor for supplying a third voltage between the first voltage and the second voltage to the address electrode, and a second end to a contact between the address electrode and the first and second switches. Includes a third switch to be connected, The plurality of scan electrodes are divided into at least a first group and a second group, a plurality of scan pulses are applied to the plurality of scan electrodes of each group, and a scan direction is applied to the plurality of scan electrodes. And a turn on period of the third switch. The method of claim 8, The third switch if the scan direction of the first group or the scan direction of the second group is a first scan direction closer to the scan electrode corresponding to the boundary region of the first group and the second group The turn on period of the plasma display device becomes shorter as the scan proceeds in the first scan direction. The method of claim 8, If the scan direction of the first group or the scan direction of the second group is a second scan direction away from the scan electrode corresponding to the boundary area of the first group and the second group, The turn on period is shortened as the scan proceeds in the second scan direction. The method of claim 8 or 10, Turning on the third switch for a first period to raise the voltage of the second electrode to the third voltage, Turning off the third switch and turning on the first switch for a second period to apply and maintain the first voltage to the second electrode; Turning off the first switch and turning on the third switch for a third period to lower the voltage of the second electrode to the third voltage; And turning off the third switch and turning on the second switch to apply the second voltage to the second electrode for a fourth period. A driving method of a plasma display device comprising a power recovery capacitor, a plurality of address electrodes, a plurality of scan electrodes, and a plurality of switches connected between the power recovery capacitor and the plurality of address electrodes, respectively. Turning on at least one first switch of the plurality of switches to increase a voltage of an address electrode corresponding to the at least one first switch; Applying a first voltage to an address electrode corresponding to the at least one first switch; Turning on at least one second switch of the plurality of switches to reduce an address voltage corresponding to the at least one second switch; Applying a second voltage lower than the first voltage to an address electrode corresponding to the at least one second switch; And The plurality of scan electrodes are divided into at least a first group and a second group, a plurality of scan pulses are applied to the plurality of scan electrodes of each group, and a scan direction is applied to the plurality of scan electrodes. Adjusting a turn on time of the at least one first switch or a turn on time of the at least one second switch. Method of driving a plasma display device comprising a. The method of claim 12, The at least one first direction if the scan direction of the first group or the scan direction of the second group is a first scan direction closer to the scan electrode corresponding to the boundary area of the first group and the second group And controlling the turn-on time of the first switch or the turn-on time of the at least one second switch to be short. The method of claim 12, The at least one first direction if the scan direction of the first group or the scan direction of the second group is a second scan direction away from the scan electrode corresponding to the boundary region of the first group and the second group And shortly adjusting a turn-on time of the switch or a turn-on time of the at least one second switch.

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