KR20080079869A - A multi-layer semiconductor device having laser devices, and a manufacturing method for it - Google Patents

A multi-layer semiconductor device having laser devices, and a manufacturing method for it Download PDF

Info

Publication number
KR20080079869A
KR20080079869A KR20070020431A KR20070020431A KR20080079869A KR 20080079869 A KR20080079869 A KR 20080079869A KR 20070020431 A KR20070020431 A KR 20070020431A KR 20070020431 A KR20070020431 A KR 20070020431A KR 20080079869 A KR20080079869 A KR 20080079869A
Authority
KR
South Korea
Prior art keywords
semiconductor
light emitting
laser
insulating layer
electrodes
Prior art date
Application number
KR20070020431A
Other languages
Korean (ko)
Inventor
장재훈
정순문
정재훈
Original Assignee
삼성전자주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자주식회사 filed Critical 삼성전자주식회사
Priority to KR20070020431A priority Critical patent/KR20080079869A/en
Publication of KR20080079869A publication Critical patent/KR20080079869A/en

Links

Images

Landscapes

  • Semiconductor Lasers (AREA)

Abstract

There is provided a semiconductor device having a multilayer structure having a laser device. The semiconductor device includes a lower individual device disposed on a semiconductor substrate. The semiconductor substrate and the lower individual elements are covered with a lower insulating layer. Laser waveguides and semiconductor electrodes are disposed on the lower insulating layer. The semiconductor electrodes are disposed on both sides of the laser waveguide. A light emitting diode is disposed on the laser waveguide and the semiconductor electrodes. The light emitting diode is used for optical pumping for laser oscillation of the laser waveguide. One end of the light emitting diode is electrically connected to the lower individual element. As a result, the laser element can be operated by the lower individual element. Also provided is a method of manufacturing the semiconductor device.

Description

A multi-layer semiconductor device having laser devices, and a manufacturing method for it

1 is a cross-sectional view of a semiconductor device manufactured according to an embodiment of the present invention.

2 to 5 are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with an embodiment of the present invention.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor devices and methods of manufacturing the same, and more particularly, to semiconductor devices having a multi-layered structure in which organic semiconductor devices and laser devices are organically combined, and methods of manufacturing the same.

The laser device is a small laser diode formed on a semiconductor wafer, which means that the size is about the same as the size of a transistor on a conventional semiconductor wafer. Until now, the implementation of silicon semiconductor laser devices has been considered infeasible. The reason is the electro-optic properties of single crystal silicon. First, single crystal silicon is a semiconductor having an indirect band gap, and may not have a light emitting function by coupling electrons and holes. Secondly, absorption of photons by electrons inside silicon is mentioned. Accordingly, in order to overcome the first problem, even when the light is pumped to the silicon waveguide using an external light source, since the electrons inside the silicon absorb photons, optical gain is suppressed and laser oscillation cannot occur.

Recently, however, it is recognized that a laser device made of silicon may be realized. This means that lasers can be implemented on semiconductor chips using standard CMOS silicon. In order for the semiconductor chip to function as a laser device, the problems of single crystal silicon must be solved. First, the semiconductor chip should solve the problem of lack of light emitting function of silicon using an external light source. Second, an electric field must be applied to the silicon waveguide to solve the problem of photon absorption by electrons inside the silicon. When an electric field is applied to a silicon crystal, electrons inside the silicon crystal can be made into a split state.

Furthermore, it is known that the fabrication of silicon-based chips capable of generating laser light without a separate external light source is possible. In order to realize this, a bonding technology of a silicon substrate and a light emitting semiconductor substrate should be developed. In this regard, some low temperature bonding techniques for realizing the silicon based chip have been disclosed. The low temperature bonding technique may be employed to bond an indium phosphide (InP) substrate, which is one of semiconductors having a direct band gap, on a silicon layer patterned in the form of a laser waveguide.

The laser device is expected to be employed for communication between computer data in the future. Currently, communication between computer data is mostly made by electrical wiring. However, as data processing speeds of integrated circuits become faster, a delay in data transmission caused by the electrical wiring has been a problem. In the case of electrical wiring, as the integration of semiconductor chips is accelerated, problems due to parasitic capacitance or parasitic resistance are highlighted. The parasitic capacitance or the parasitic resistance has a side effect of delaying data transmission. In order to solve the above side effects, the use of optical wiring by a laser device has been proposed. In this case, it is expected that the data transfer rate will be increased by nearly 10 times compared to the normal electrical wiring.

However, some technical problems that have not been solved are blocking the communication of computer data through the optical wiring. One of them relates to technical matters related to the effective coupling of a conventional data processing semiconductor device with the laser device. The laser device proposed by the prior art is designed to be driven by receiving an electric signal from an external semiconductor individual device connected by separate electrical wires. Therefore, there is a need for a technique for organically coupling discrete devices such as transistors, capacitors, and resistors formed on a semiconductor substrate with the laser device by a conventional manufacturing process.

SUMMARY OF THE INVENTION The present invention has been made in an effort to improve the above-described problems of the related art, and to provide semiconductor devices in which semiconductor discrete devices and laser devices driven thereby are integrally formed on one chip.

Another technical problem to be solved by the present invention is to provide a method of manufacturing such semiconductor devices.

In order to achieve the above technical problem, the present invention provides a semiconductor device having a multilayer structure having a laser device. The semiconductor device has a lower discrete device disposed on a semiconductor substrate. The semiconductor substrate and the lower individual elements are covered with a lower insulating layer. Laser waveguides and semiconductor electrodes are disposed on the lower insulating layer. The semiconductor electrodes are disposed on both sides of the laser waveguide. A light emitting diode is disposed on the laser waveguide and the semiconductor electrodes. One end of the light emitting diode is electrically connected to the lower individual element.

In some embodiments of the present disclosure, the lower individual device may include a gate electrode disposed on the semiconductor substrate and source / drain regions disposed on the semiconductor substrate on both sides of the gate electrode. One of the source / drain regions may be electrically connected to the light emitting diode.

In other embodiments, the light emitting diode may include one selected from a group of elements of a group 13 element and a group 15 element and a film of a three element compound.

In still other embodiments, the light emitting diodes are formed of an indium phosphide (InP) film, a gallium arsenide (GaAs) film, a gallium nitride (GaN) film, and an aluminum gallium arsenide (Al x Ga 1-x As) film. It may include one selected from the group consisting of.

In still other embodiments, a single crystal semiconductor layer may be provided under the laser waveguide and the semiconductor electrodes.

In other embodiments, the laser waveguide may be a single crystal semiconductor pattern.

In another embodiment, an intermediate insulating layer may be interposed between the laser waveguide and the semiconductor electrodes.

The present invention also provides a method of manufacturing a semiconductor device having a multilayer structure having a laser device. The method includes forming a lower discrete element on a semiconductor substrate. A lower insulating layer covering the semiconductor substrate having the lower individual elements is formed. Laser waveguides and semiconductor electrodes are formed on the lower insulating layer. A light emitting diode is formed on the laser wave guide and the semiconductor electrodes.

In some embodiments, a semiconductor layer may be formed on the lower insulating layer. The laser wave guide and the semiconductor electrodes may be formed by patterning the semiconductor layer.

In other embodiments, the semiconductor layer may be formed using wafer bonding technology, selective epitaxial growing (SEG) technology, or solid phase epitaxial growing technology.

In another embodiment, a light emitting semiconductor substrate may be bonded to the laser waveguide and the semiconductor electrodes. The light emitting diode substrate may be patterned to form the light emitting diode.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the embodiments described herein and may be embodied in other forms. Rather, the embodiments introduced herein are provided so that the disclosure may be made thorough and complete, and to fully convey the spirit of the present invention to those skilled in the art. In the drawings, the thicknesses of layers and regions are exaggerated for clarity.

1 is a cross-sectional view illustrating a structure of a semiconductor device according to exemplary embodiments of the present invention.

Referring to FIG. 1, lower discrete devices such as transistors and / or diodes may be provided in the semiconductor substrate 1. Hereinafter, for the sake of brevity, it will be assumed that the lower individual device is the transistor.

An isolation layer 7 defining an active region 2 may be disposed on the semiconductor substrate 1. The gate electrode 5 may be disposed on the active region 2. Source / drain regions 3 may be disposed in the active region 2 adjacent to both sides of the gate electrode 5. The gate electrode 5 and the source / drain regions 3 may constitute the transistor.

The semiconductor substrate 1 may be a silicon wafer. The device isolation film 7 may be a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or a combination thereof. The gate electrode 5 may be a polysilicon film, a metal film, a metal silicide film, or a combination thereof. The source / drain regions 3 may be impurity regions.

The semiconductor substrate 1 having the gate electrode 5 may be covered with a lower insulating layer 9. The single crystal semiconductor pattern 11 ′ may be disposed on the lower insulating layer 9.

The laser device of the present invention may be disposed on the single crystal semiconductor pattern 11 ′. The laser device may include a laser wave guide 17, semiconductor electrodes 15, and a light emitting diode 21 ′. The semiconductor electrodes 15 may be disposed on both sides of the laser wave guide 17. The laser wave guide 17 and the semiconductor electrodes 15 may be separated from each other.

The laser wave guide 17 and the semiconductor electrodes 15 may be separated from the single crystal semiconductor pattern 11 ′ by the buried insulating layer 13.

Intermediate insulating layers 19a and 19b may be provided to cover a substrate having the laser wave guide 17 and the semiconductor electrodes 15. In this case, a portion 19a of the intermediate insulating layer may be disposed between the laser wave guide 17 and the semiconductor electrodes 15. Upper ends of the intermediate insulating layers 19a and 19b may be disposed at the same height as the laser wave guide 17 and the semiconductor electrodes 15.

The light emitting diodes 21 ′ may be positioned on the laser wave guide 17 and the semiconductor electrodes 15. A junction insulating layer 23 ′ may be disposed between the light emitting diode 21 ′, the laser wave guide 17, and the semiconductor electrodes 15. The light emitting diode 21 ′ may serve as an optical pump of the laser wave guide 17. The diode electrode 27 may be connected to the upper portion of the light emitting diode 21 ′. The diode electrode 27 and the semiconductor electrodes 15 may form a circuit for driving the light emitting diode 21 ′ together with the lower individual elements. A bias having a positive voltage may be applied to the diode electrode 27. On the other hand, a bias having a negative voltage may be applied to the semiconductor electrodes 15. In addition, the semiconductor electrodes 15 may be connected to ground. The circuit for the operation of the light emitting diode 21 'is configured such that a current flowing into the light emitting diode 21' through the diode electrode 27 can flow through the semiconductor electrodes 15. . The junction insulating layer 23 ′ may be thick enough to allow a tunneling current to flow. In addition, the semiconductor electrodes 15 may generate an electric field in the laser waveguide 17 so that the laser waveguide 17 made of single crystal silicon may be converted into a light gain state by becoming a deplete state of electrons. It can also contribute in part to formation.

An upper insulating layer 25 is provided on the intermediate insulating layers 19a and 19b having the light emitting diodes 21 '. A wiring 33 may be provided on the upper insulating layer 25. The diode electrode 27 may be electrically connected to the wiring 33 by a diode plug 29 passing through the upper insulating layer 25. In addition, the source / drain regions 3 may be connected to the wiring 33 by a drain plug 31 penetrating through the upper insulating layer 25, the intermediate insulating layer 19b, and the lower insulating layer 9. Can be electrically connected.

As a result, a semiconductor device in which a semiconductor individual device and a laser device driven by the semiconductor device are integrated in one chip is provided.

The mechanism by which the laser device is driven by the semiconductor individual device is as follows. Hereinafter, it is assumed that the semiconductor individual device is a transistor.

Electrical signals generated in the source / drain regions 3 are transmitted to the diode electrode 27 through the drain plug 31, the wiring 33, and the diode plug 29. The light emitting diode 21 'is turned on by the electrical signal. Light emitted from the light emitting diodes 21 'optically pumps the laser waveguide 17 made of a silicon single crystal material having an indirect band gap. On the other hand, the laser wave guide 17 is in the state of the electrons (deplete) under the influence of the electric field formed between the light emitting diode (21 ') and the semiconductor electrodes (15). Accordingly, the optically pumped laser waveguide 17 is switched to an optical gain state so that the laser is oscillated to emit the laser light to the outside.

Hereinafter, the manufacturing method of the semiconductor element of a multilayered structure is demonstrated with reference to FIGS. The method includes forming a lower discrete element on a semiconductor substrate. Hereinafter, it is assumed that the lower individual element is a transistor. However, in the embodiment of the present invention, the lower individual element is not limited to the transistor. For example, the lower individual element may be a diode, a capacitor, or a resistor.

Referring to FIG. 2, an isolation layer 7 may be formed on the semiconductor substrate 1 to define the active region 2. A gate insulating layer 6 may be formed on the active region 2. A gate electrode 5 may be formed on the gate insulating layer 6. A pair of source / drain regions 3 may be formed in an active region adjacent to both sides of the gate electrode 5.

The lower insulating layer 9 may be formed on the semiconductor substrate 1 having the lower individual elements. The lower insulating layer 9 may be a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or a combination thereof. In addition, the lower insulating layer 9 may be formed of a high density plasma (HDP) oxide film. The lower insulating layer 9 is preferably planarized. The planarization may be performed using an etch back process or a chemical mechanical polishing process.

The single crystal semiconductor substrate 11 may be formed on the lower insulating layer 9. The single crystal semiconductor substrate 11 may be made of silicon. The single crystal semiconductor substrate 11 may be formed by a wafer bonding technique well known in the art. For example, the wafer bonding may be performed by stacking the single crystal semiconductor substrate 11 on the planarized lower insulating layer 9 and performing heat treatment in an oxygen atmosphere. Alternatively, the surface of the single crystal semiconductor substrate 11 may be oxidized, hydrogen ions may be implanted, and wafer bonding may be performed by fitting the single crystal semiconductor substrate 11 onto the lower insulating layer 9. Alternatively, the single crystal semiconductor substrate 11 may be formed using a selective epitaxial growth (SEG) technique, a solid phase epitaxial growth technique, or a combination of these techniques.

2 and 3, a buried insulating film 13 may be formed in the single crystal semiconductor substrate 11. The buried insulating film 13 may be a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or a combination thereof. The buried insulating layer 13 may be formed by an ion implanter. The ion implantation apparatus may be used to inject oxygen ions into the single crystal semiconductor substrate 11. The buried insulating layer 13 may be formed at a predetermined depth of the single crystal semiconductor substrate 11 by implanting the oxygen ions. Alternatively, the process for forming the buried insulating film 13 may be omitted.

The single crystal semiconductor substrate 11 may be patterned to form the laser waveguide 17 and the semiconductor electrodes 15. After the patterning, additional patterning may be performed. As a result, the single crystal semiconductor pattern 11 'may remain. The laser wave guide 17 and the semiconductor electrodes 15 may be formed on the single crystal semiconductor pattern 11 ′ or the buried insulating layer 13. The semiconductor electrodes 15 may be formed at both sides of the laser wave guide 17. The lower insulating layer 9 may be exposed by the patterning.

Referring to FIG. 4, intermediate insulating layers 19a and 19b may be formed by covering a substrate having the laser wave guide 17 and the semiconductor electrodes 15. In addition, a portion of the intermediate insulating layer 19a may be filled between the laser waveguide 17 and the semiconductor electrodes 15. The intermediate insulating layers 19a and 19b may be silicon oxide films, silicon nitride films, silicon oxynitride films, polyimide films, or a combination thereof. The intermediate insulating layers 19a and 19b may be planarized to expose the upper surface of the laser waveguide 17 and the semiconductor electrodes 15.

The light emitting semiconductor substrate 21 may be formed on the intermediate insulating layers 19a and 19b. The light emitting semiconductor substrate 21 may be formed of an indium phosphide (InP) substrate. Formation of the light emitting semiconductor substrate 21 may be performed by conventional wafer bonding techniques. However, the pattern of the laser wave guide 17 may be partially modified during the wafer bonding process. In the case of the laser wave guide 17, even in the case of minute deformation, it may be difficult to form an output coupler for laser oscillation. In order to effectively prevent such side effects, a low temperature bonding technique may be used. For example, the intermediate wave insulating layers 19a and 19b exposing the upper portion of the laser wave guide 17 and the semiconductor electrodes 15 may be reacted with an oxygen plasma. Similarly, the light emitting semiconductor substrate 21 may be reacted with the oxygen plasma. As a result, a thin oxide film composed of dozens of atomic layers on the surface of each substrate can be produced. Then, the surfaces of both substrates are pressed against each other in a heated state. In this case, the bonding process may be performed at a temperature lower than a normal wafer bonding temperature so that the pattern of the laser waveguide 17 is not deformed due to heating and pressing. During the low temperature bonding process, oxide films already formed on the surfaces of the intermediate insulating films 19a and 19b, the laser waveguide 17 and the semiconductor electrodes 15, and the surfaces of the light emitting semiconductor substrate 21 are formed. It may be melted with each other to form a junction oxide film 23. As a result, the bonding oxide film 23 serves as a kind of adhesive to bond the two substrates.

Referring to FIG. 5, the light emitting semiconductor substrate 21 may be patterned to form a light emitting diode pattern. Using conventional techniques, the light emitting diodes 21 'can be formed from the light emitting diode patterns. The light emitting diodes 21 ′ may be formed on the laser wave guide 17 and on the semiconductor electrodes 15. In this case, the light emitting diodes 21 ′ may be formed to expose a portion of the upper surfaces of the semiconductor electrodes 15. In addition, the light emitting diode 21 ′ may be formed to cover a portion 19a of the intermediate insulating layer between the laser wave guide 17 and the semiconductor electrodes 15.

Impurity ions may be implanted into the light emitting diodes 21 ′ and the semiconductor electrodes 15. Through the ion implantation, conductivity of the light emitting diode 21 ′ and the semiconductor electrodes 15 may be greatly increased. High concentration N-type impurities or P-type impurities may be used for the ion implantation. Alternatively, the semiconductor electrodes 15 may be ion implanted to increase conductivity in advance. That is, after the planarization of the intermediate insulating layers 19a and 19b exposing the upper surface of the laser wave guide 17 and the semiconductor electrodes 15, a subsequent process for forming the light emitting diode 21 ′. Before the implantation, ion implantation may be performed on the semiconductor electrodes 15.

The diode electrode 27 may be formed by attaching a conductive pattern having an appropriate impedance to the surface of the light emitting diode 21 ′. Similarly, a metal film (not shown) for wiring may be formed on the surfaces of the semiconductor electrodes 15. The conductive pattern may be a polysilicon film, a metal film, a metal silicide film, or a combination film thereof.

The upper insulating layer 25 may be formed by covering the light emitting diode 21 ′ and the semiconductor electrodes 15 to which the diode electrode 27 is attached with an insulating material. The upper insulating layer 25 may also be formed on the intermediate insulating layers 19a and 19b exposed when the light emitting diodes 21 'are patterned. The upper insulating layer 25 may be planarized.

The diode plug 29 may be formed to penetrate the upper insulating layer 25 and contact the diode electrode 27 ′. In addition, a drain plug 31 may be formed to penetrate the upper insulating layer 25, the intermediate insulating layer 19b, and the lower insulating layer 9 to be in contact with the source / drain regions 3. have.

In order to connect the diode plug 29 and the drain plug 31, a wiring 33 may be formed on the upper insulating layer 25.

Although the present invention has been described in detail with reference to preferred embodiments, the present invention is not limited to the above embodiments, and various modifications may be made by those skilled in the art within the scope of the technical idea of the present invention. It is possible.

As described above, according to the embodiments of the present invention, a semiconductor device having a multilayer structure having a laser device is provided. The semiconductor device includes a semiconductor discrete device and a laser device in one chip. Electrical signals generated by the semiconductor discrete devices are transmitted to the laser device through wirings inside the chip, and are emitted in the form of laser light. Accordingly, the semiconductor discrete device and the laser device driven by the semiconductor device can be integrally implemented on one chip.

Claims (11)

A lower individual element disposed on the semiconductor substrate; A lower insulating layer covering the semiconductor substrate having the lower individual elements; A laser waveguide disposed on the lower insulating layer; Semiconductor electrodes disposed on both sides of the laser wave guide; And And a light emitting diode disposed on the laser waveguide and the semiconductor electrodes, one end of the light emitting diode being electrically connected to the lower individual device. The method of claim 1, The lower individual element A gate electrode disposed on the semiconductor substrate; And And source / drain regions disposed in the semiconductor substrate on both sides of the gate electrode, wherein one selected from the source / drain regions is electrically connected to the light emitting diode. The method of claim 1, The light emitting diode comprises one selected from a group of light emitting semiconductor films comprising a two-element compound and a three-element compound of Group 13 elements and Group 15 elements. The method of claim 3, wherein The light emitting diode includes one selected from the group consisting of an indium phosphide (InP) film, a gallium arsenide (GaAs) film, a gallium nitride (GaN) film, and an aluminum gallium arsenide (Al x Ga 1-x As) film. Semiconductor device. The method of claim 1, And a single crystal semiconductor layer disposed under the laser waveguide and the semiconductor electrodes. The method of claim 1, The laser waveguide is a semiconductor device, characterized in that the single crystal semiconductor pattern. The method of claim 1, And an intermediate insulating layer interposed between the laser wave guide and the semiconductor electrodes. Forming lower individual elements on the semiconductor substrate, Forming a lower insulating layer covering the semiconductor substrate having the lower individual elements, Forming laser waveguides and semiconductor electrodes on the lower insulating layer; Forming a light emitting diode on the laser waveguide and the semiconductor electrodes. The method of claim 8, Forming the laser waveguide and the semiconductor electrodes on the lower insulating layer, Forming a single crystal semiconductor layer on the lower insulating layer, A method for manufacturing a semiconductor device comprising patterning the single crystal semiconductor layer. The method of claim 9, The single crystal semiconductor layer is formed using one selected from the group consisting of wafer bonding technology, selective epitaxial growing (SEG) technology, and solid phase epitaxial growing technology. Method of manufacturing a semiconductor device The method of claim 8, Forming the light emitting diode, Bonding a light emitting semiconductor substrate to the laser waveguide and the semiconductor electrodes; A method of manufacturing a semiconductor device comprising patterning the light emitting semiconductor substrate.
KR20070020431A 2007-02-28 2007-02-28 A multi-layer semiconductor device having laser devices, and a manufacturing method for it KR20080079869A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR20070020431A KR20080079869A (en) 2007-02-28 2007-02-28 A multi-layer semiconductor device having laser devices, and a manufacturing method for it

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR20070020431A KR20080079869A (en) 2007-02-28 2007-02-28 A multi-layer semiconductor device having laser devices, and a manufacturing method for it

Publications (1)

Publication Number Publication Date
KR20080079869A true KR20080079869A (en) 2008-09-02

Family

ID=40020641

Family Applications (1)

Application Number Title Priority Date Filing Date
KR20070020431A KR20080079869A (en) 2007-02-28 2007-02-28 A multi-layer semiconductor device having laser devices, and a manufacturing method for it

Country Status (1)

Country Link
KR (1) KR20080079869A (en)

Similar Documents

Publication Publication Date Title
US9368468B2 (en) Thin integrated circuit chip-on-board assembly
TW201333561A (en) Electronic/photonic integrated circuit architecture and method of manufacture thereof
CN111384007B (en) Efficient heat dissipation in PIN diodes
US6501153B2 (en) Semiconductor device and drive circuit using the semiconductor devices
TW202101073A (en) Integrated optoelectronic device with heater
JP2018077264A (en) Semiconductor device and manufacturing method therefor
JP2015005690A (en) Semiconductor device and method of manufacturing the same
TW201610493A (en) Integrated chip and integrated dielectric waveguide forming method
JP3482709B2 (en) Semiconductor device
KR102125324B1 (en) Heterogeneous integrated circuit for short wavelengths
TW201921705A (en) Semiconductor device and manufacturing method thereof
US8553741B2 (en) Integrated rare earth devices
JP4201804B2 (en) Semiconductor device
JP2006032564A (en) Mos field effect transistor type quantum dot light-emitting element and light-receiving element, photoelectron integrated chip using the same, and data processor
JP4315020B2 (en) Semiconductor integrated circuit device and manufacturing method thereof
KR20080079869A (en) A multi-layer semiconductor device having laser devices, and a manufacturing method for it
JP2003031790A (en) Semiconductor device and its fabricating method
JPH0846237A (en) Silicon light-emitting diode
JP2005116709A (en) Semiconductor integrated circuit device and its manufacturing method
TWI808903B (en) Vacuum channel electronic components, optical transmission circuits and laminated chips
US11307480B2 (en) Optical semiconductor device
JP4424277B2 (en) Semiconductor device and bonded wafer
CN117995780A (en) Semiconductor device and method for manufacturing the same
JP2006133723A (en) Light guide module and optoelectric hybrid device, and their manufacturing method
JP2023154826A (en) Electronic device, and method of manufacturing the same

Legal Events

Date Code Title Description
WITN Withdrawal due to no request for examination