KR20080079491A - Method of fabricating a capacitor having a high-k dielectric and capacitor fabricated thereby - Google Patents

Abstract

A method for fabricating a capacitor having a high-k dielectric and a capacitor manufactured by the method are provided to improve the electrical characteristic of a cell capacitor by forming a titanium nitride layer on a first dielectric. A lower electrode(120a) is formed on a semiconductor substrate(100). A first dielectric(134) having a metal oxide layer is formed on the lower electrode. A titanium nitride layer is deposited on the first dielectric to form a second dielectric(136) on an upper surface of the first dielectric, and also an upper electrode is formed on the second dielectric. The titanium nitride layer contains excessive titanium than nitride. In case the titanium nitride layer is TixN1-x(0<x<1), a composition ratio of the titanium nitride layer is 0.6 to 0.9. The second dielectric is made of a titanium oxide layer or a titanium oxide nitride layer. The first dielectric is made of one selected from a group consisting of HfO2, ZrO2, Al2O3, TiO2, and a combination thereof.

Description

Method of fabricating a capacitor having a high-k dielectric and capacitor fabricated thereby

1 to 5 are cross-sectional views illustrating a method of manufacturing a capacitor according to an embodiment of the present invention.

The present invention relates to a method for manufacturing a semiconductor device and a semiconductor device manufactured thereby, and more particularly, to a method for manufacturing a capacitor having a high dielectric film and a capacitor manufactured thereby.

Recently, semiconductor devices have been required to have high performance and high integration. Accordingly, the capacitor, which is one of the elements constituting the semiconductor device, must be formed to have a capacity larger than a predetermined value within a limited area. In addition, in order to improve the performance and reliability of the semiconductor device, even if the capacitor size is small, the capacitance must be sufficiently secured and the breakdown voltage must be high. Accordingly, in order to have a capacitor composed of a lower electrode, a dielectric layer, and an upper electrode have a capacitance greater than or equal to a predetermined value, a method of reducing the thickness of the dielectric layer has been studied.

As a cell capacitor, a metal-insulator-silicon (MIS) structure has been conventionally applied. The capacitor of the MIS structure uses a polysilicon electrode as a storage electrode which is a lower electrode. And a metal electrode is used as a plate electrode which is an upper electrode. A dielectric layer is disposed between the storage electrode and the plate electrode. However, in the case of the MIS structure, an oxidation reaction occurs at an interface between the polysilicon electrode and the dielectric layer, thereby increasing the equivalent oxide thickness (Toexq: Equivalent Oxide Thickness) of the dielectric layer, thereby changing electrical characteristics. As a result, the capacitor of the MIS structure is unsuitable for semiconductor devices requiring sophisticated characteristics.

In addition, when the design rule of DRAM devices is reduced, it is difficult to increase cell capacitance within a limited area. In order to increase the cell capacity, there are a method of increasing the height of the cell capacitor and a method of reducing the equivalent oxide thickness of the dielectric layer. If the design rule is 100 nm or less, there may be a limit to increasing the height of the cell capacitor to be larger than 2.0 μm. Therefore, in order to implement a cell capacitor suitable for a highly integrated DRAM (DRAM) device, it is required to reduce the equivalent oxide thickness of the dielectric film of the cell capacitor. In a capacitor having a conventional MIS (Metal / Insulator / Polysilicon) structure, there is a limitation in forming a dielectric film having an equivalent oxide film thickness of less than about 20 mW.

In order to solve the above problems, in recent years, a cell capacitor using the high-k dielectric has been applied with a MIM structure in which both the upper electrode and the lower electrode are formed of a metal layer. For example, a technique of forming the lower electrode with a titanium nitride film (TiN) has been applied to the MIM capacitor. The lower electrode formed of the titanium nitride film has a low specific resistance and excellent electrical reliability because it suppresses generation of parasitic capacitance caused by a depletion layer. In addition, since the titanium nitride film has strong oxidation resistance, formation of a native oxide layer on the titanium nitride film can be suppressed. Therefore, it may be easy to reduce the equivalent oxide film thickness of the dielectric film formed on the titanium nitride film.

On the other hand, in the case of a silicon oxide film having a dielectric constant of approximately 3.9, which is commonly used, the thickness decreases and the leakage current increases. That is, the silicon oxide film is not described below by FN tunneling (Fowler-Nordhein tunneling), which is a breakdown mechanism of the silicon oxide film, which is commonly known below about 50 kHz. That is, direct tunneling occurs in which a carrier moves to an electrode through a forbidden gap of a silicon oxide film. As a result, leakage current increases. Accordingly, a high dielectric film having a high dielectric constant has been widely adopted to maintain proper capacitance without increasing leakage current. That is, the higher the dielectric constant of the dielectric film, the smaller the equivalent oxide thickness (EOT). As the high-k dielectric film, a hafnium oxide film (HfO ₂ ), a zirconium oxide film (ZrO ₂ ), an aluminum oxide film (Al ₂ O ₃ ), a titanium oxide film (TiO ₂ ), and the like are generally used as metal oxides obtained from a metal having a high oxygen affinity. I am getting it.

As such, various studies have been attempted to secure the capacitance of the cell capacitor, and research on this is required continuously.

The technical problem to be achieved by the present invention is to provide a method of manufacturing a capacitor to ensure a sufficient capacitance.

Another technical problem to be achieved by the present invention is to provide a capacitor to secure a sufficient capacitance.

According to an aspect of the present invention for achieving the above technical problem, a method of manufacturing a capacitor is provided. The method of manufacturing the capacitor includes forming a lower electrode on a semiconductor substrate. A first dielectric layer having a metal oxide layer is formed on the lower electrode. A titanium nitride film is deposited on the first dielectric film to form an upper electrode on the second dielectric film together with a second dielectric film on an upper surface of the first dielectric film. The titanium nitride film contains excessive titanium as compared to nitrogen.

In some embodiments of the present invention, when the titanium nitride film is Ti _x N _1-X (0 <x <1), the composition ratio of titanium may be formed to be 0.6 to 0.9.

In other embodiments, the second dielectric layer may be formed of a titanium oxide layer or a titanium oxynitride layer.

In yet other embodiments, depositing the titanium oxide film may be formed using a chemical vapor deposition process using titanium chloride gas and ammonium chloride gas as the source gas.

In another embodiment, the first dielectric layer is selected from the group consisting of hafnium oxide (HfO ₂ ), zirconium oxide (ZrO ₂ ), aluminum oxide (Al ₂ O 3), titanium oxide (TiO ₂ ), and combinations thereof. It can be formed of either film.

In another embodiment, the lower electrode may include a metal nitride film, ruthenium (Ru), ruthenium oxide (RuO ₂ ), platinum (Pt), iridium (Ir), and iridium oxide (IrO ₂ ). It can be formed of any one film selected.

According to another aspect of the present invention for achieving the above technical problem, a capacitor is provided. The capacitor has a lower electrode provided on the semiconductor substrate. An upper electrode disposed on the lower electrode, the upper electrode containing a titanium nitride film having excess titanium compared to nitrogen is provided. First and second dielectric layers interposed between the lower electrode and the upper electrode and sequentially stacked are provided. The first dielectric layer includes a metal oxide layer, and the second dielectric layer includes a titanium oxide layer or a titanium oxynitride layer.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the embodiments described herein and may be embodied in other forms. Rather, the embodiments introduced herein are provided to ensure that the disclosed subject matter is thorough and complete, and that the scope of the invention to those skilled in the art will fully convey. In the drawings, the thicknesses of layers and regions are exaggerated for clarity. Like numbers refer to like elements throughout. Also, an element or layer is referred to as "on" or "on" of another element or layer by interposing another layer or other element in the middle as well as directly above the other element or layer. Include all cases.

First, a method of manufacturing a capacitor according to an embodiment of the present invention will be described with reference to FIGS. 1 to 5. 1 to 5 are cross-sectional views illustrating a method of manufacturing a capacitor according to an embodiment of the present invention.

Referring to FIG. 1, an interlayer insulating layer 110 having a contact plug 112 may be formed on a semiconductor substrate 100. The interlayer insulating layer 110 may be formed of, for example, a plasma enhanced tetraethyl orthosilicate (PE-TEOS) layer. Although not shown in FIG. 1, a MOS transistor used as a switching element may be formed in the semiconductor substrate 100 in the interlayer insulating layer 110. In this case, the contact plug 112 may be formed to be electrically connected to the source / drain region of the MOS transistor.

An etch stop layer 114 may be formed on the semiconductor substrate 100 having the contact plug 112. The molding layer 116 may be formed on the etch stop layer 114. The molding layer 116 may be formed to have an etching selectivity with respect to the etch stop layer 114. For example, when the etch stop layer 114 is formed of a silicon nitride layer, the molding layer 116 is a silicon oxide layer formed of a PE-TEOS layer, a boron phosphorus silicate glass (BPSG) layer, or a combination thereof. Can be formed.

The molding layer 116 and the etch stop layer 114 may be patterned to form a storage node hole 118 exposing the contact plug 112.

Referring to FIG. 2, a lower electrode layer 120a may be formed on the semiconductor substrate 100 having the storage node hole 118. The lower electrode layer 120a may be formed in the storage node hole 118 and along an upper surface of the molding layer 116. The lower electrode film 120a may be formed of a noble metal film or a metal nitride film. The noble metal layer may be formed of any one selected from the group consisting of ruthenium (Ru), ruthenium oxide (RuO ₂ ), platinum (Pt), iridium (Ir), and iridium oxide (IrO ₂ ). The metal nitride layer may be formed of at least one selected from the group consisting of a titanium nitride layer (TiN), a titanium silicon nitride layer (TiSiN), a titanium aluminum nitride layer (TiAlN), a tantalum nitride layer (TaN), and a tungsten nitride layer (WN). have. Of these, the titanium nitride film has high mechanical strength, excellent electrical conductivity and oxidation resistance. In this case, the lower electrode layer 120a may be formed using a chemical vapor deposition (CVD) or atomic layer deposition (ALD) process.

Subsequently, a sacrificial layer 122 may be formed on the semiconductor substrate 100 having the lower electrode layer 120a to fill the storage node hole 118. The sacrificial layer 122 may be formed of the same material layer as the molding layer 116.

Referring to FIG. 3, the sacrificial layer 122 and the lower electrode layer 120a may be planarized to expose the upper surface of the molding layer 116. The planarization process may be performed by a chemical mechanical polishing (CMP) process or an etch back process. As a result, the lower electrode 120a covering the inside of the storage node hole 118 is formed. Subsequently, the molding layer 116 and the sacrificial layer 122 may be removed to expose the inner and outer walls of the lower electrode 120a to form the lower electrode 120a having a cylindrical structure. In the embodiment of the present invention, a capacitor having a cylinder structure will be described as an example, but the present invention is not limited thereto, and the present invention can be applied to a capacitor having various structures such as a concave structure or a stack structure. In the case of the concave structure, the sacrificial layer 122 is selectively removed. As a result, a lower electrode remaining inside the storage node hole 118 may be formed. The sacrificial layer 122 may be formed of an insulating layer having an etch selectivity with respect to the molding layer 116.

Referring to FIG. 4, a lower dielectric layer 130 may be deposited on the semiconductor substrate 100 having the lower electrode 120a. The lower dielectric layer 130 may be formed of a metal oxide layer, for example, a zirconium oxide layer (ZrO ₂ ) as a high dielectric layer. The zirconium oxide film 130 is an atomic layer using a precursor gas such as Tetra-Ethyl-Methyl Amino Zirconium; Zr [N (CH ₃ ) C ₂ H ₅ ] ₄ ) and a reaction gas containing oxygen It may be formed by a deposition process. The atomic layer process may be carried out at a temperature of 200 ℃ to 400 ℃. Subsequently, the zirconium oxide layer 130 may be crystallized by heat-treating the amorphous zirconium oxide layer 130 in a nitrogen or oxygen atmosphere so as to have a high dielectric constant. The heat treatment process may be carried out at a temperature of 300 ℃ to 600 ℃, it can be carried out by further adding an inert gas, such as argon (Ar) gas. When the heat treatment is performed in an oxygen atmosphere, the zirconium oxide film 130 may be formed to have good leakage current characteristics.

An upper dielectric layer 132 may be deposited on the zirconium oxide layer 130. The upper dielectric layer 132 may be formed of a metal oxide layer different from the lower dielectric layer 130, for example, a titanium oxide layer (TiO ₂ ). The titanium oxide layer 132 is an atomic layer deposition using a reactive gas containing a precursor and oxygen, such as TEMAT (Tetra-Ethyl-Methyl Amino Titanium; Ti [N (CH ₃ ) C ₂ H ₅ ] ₄ ) It can be formed by a process. The atomic layer process may be carried out at a temperature of 200 ℃ to 400 ℃. As a result, a first dielectric layer 134 including the lower and upper dielectric layers 130 and 132 may be formed. Meanwhile, the lower electrode in the process of forming the lower and upper dielectric layers 130 and 132. A natural oxide film may be formed on the 120a. Accordingly, the capacitance of the first dielectric layer 134 may be increased by increasing the equivalent oxide thickness, so that the uniformity is formed on the surface of the lower electrode 120a before the formation of the first dielectric layer 134. And a dense oxide film can be formed.

As described in the present embodiment, the first dielectric layer 134 formed of the two-layer film may include hafnium oxide (HfO ₂ ), in consideration of the dielectric and leakage current characteristics of the first dielectric layer 134 as well as the high-k dielectric layers described above. It may be formed of a combination film of high dielectric films such as zirconium oxide (ZrO ₂ ), aluminum oxide (Al ₂ O ₃ ), and titanium oxide (TiO ₂ ). In addition, the first dielectric layer 134 may be formed of a single layer including any one selected from the high dielectric layers, and may be formed of three or more multilayer layers.

Referring to FIG. 5, a titanium nitride film (Ti _x N _1-x , 0 <x <1) containing an excessive amount of titanium as compared to nitrogen is deposited on the semiconductor substrate 100 having the first dielectric layer 134. . As a result, the upper electrode 140 including the titanium oxide film is formed. Preferably, the titanium nitride film may be deposited such that the composition ratio x of the titanium is 0.5 to 0.9, and more preferably, the composition ratio x of the titanium may be formed of 0.7 to 0.8. The titanium nitride film may be deposited using a chemical vapor deposition process or sputtering. In the case of the chemical vapor deposition process, due to the excellent step coverage, the titanium nitride film has a uniform thickness along the first dielectric film 134 even in a cylindrical structure having a high aspect ratio. It can be formed as. In the chemical vapor deposition process, titanium chloride (TiCl ₄ ) gas and ammonium chloride (NH ₃ ) gas may be used as the source gas.

Meanwhile, during the deposition of the titanium nitride layer, the titanium nitride layer diffuses to the upper surface of the upper dielectric layer 132 and is interposed between the upper electrode 140 and the upper dielectric layer 132. ). In this case, a heat treatment process may be performed to efficiently diffuse the titanium. As a result, a dielectric film 138 composed of the first and second dielectric films 134 and 136 is formed. In detail, the second dielectric layer 136 may be formed on an upper surface of the upper dielectric layer 132, and the second dielectric layer 136 formed on the surface may be formed of a titanium oxide layer or a titanium oxynitride layer. The titanium oxide film TiO _y or the titanium oxynitride film has a higher dielectric constant than the high dielectric film described above, so that the capacitance of the dielectric film 138 is increased. As mentioned in the embodiment of FIG. 4, when the upper dielectric layer 132 is formed of a titanium oxide layer, the second dielectric layer 136 is formed of an oxide layer (TiO _y ) or an oxynitride layer having excess titanium and is high. It can have a dielectric constant.

Thus, a capacitor including the dielectric layer 138 and the upper electrode 140 including the lower electrode 120a, the first and second dielectric layers 136 is completed. As described above, according to one embodiment of the present invention, a capacitor having a cylinder structure is formed. However, the spirit of the present invention is not limited thereto and may be applied to capacitors having various structures such as concave structures or stack structures.

Hereinafter, a capacitor according to an embodiment of the present invention will be described with reference to FIG. 5.

Referring back to FIG. 5, an interlayer insulating layer 110 having a contact plug 112 may be disposed on the semiconductor substrate 100. The interlayer insulating layer 110 may include, for example, a plasma enhanced tetraethyl orthosilicate (PE-TEOS) layer. In addition, an etch stop layer 114 may be provided to cover the interlayer insulating layer 110. Although not shown in FIG. 5, a MOS transistor used as a switching element may be provided in the semiconductor substrate 100 in the interlayer insulating layer 110. In this case, the contact plug 112 may be electrically connected to one of the source / drain regions of the MOS transistor.

The lower electrode 120a and the upper electrode 140 overlapping the contact plug 112 may be disposed on the contact plug 112. The lower electrode 120a may be formed of a noble metal film or a metal nitride film. The upper electrode 140 contains a titanium nitride film (Ti _x N _1-x , 0 <x <1) having excessive titanium as compared to nitrogen. The composition ratio x of the titanium may be 0.5 to 0.9, and more preferably, the composition ratio x of the titanium may be 0.7 to 0.8. As described above, in the embodiment of FIG. 5, the lower and upper electrodes 120a and 140 have a cylinder structure, but the capacitor according to the present invention is not limited thereto, and various structures, for example, a concave structure or Applicable to the stack structure.

A dielectric layer 138 is interposed between the lower and upper electrodes 120a and 140. The dielectric layer 138 includes first and second dielectric layers 134 and 136. The first dielectric layer 134 includes a metal oxide layer as a high dielectric layer. The first dielectric layer 134 may include lower and upper dielectric layers 130 and 132. The lower and upper dielectric layers 130 and 132 may be a zirconium oxide layer and a titanium oxide layer, respectively. As described in the present embodiment, the first dielectric layer 134 formed of the two-layer film may include not only the hafnium oxide layer (HfO ₂ ) and the zirconium oxide layer (ZrO) in consideration of the dielectric and leakage current characteristics of the first dielectric layer 134. ₂ ), a combination film of high dielectric films such as aluminum oxide (Al ₂ O ₃ ) and titanium oxide (TiO ₂ ) may be provided. In addition, the first dielectric layer 134 may include a single layer or three or more multilayer layers including any one selected from among the high dielectric layers.

The second dielectric layer 136 may be a titanium oxide layer or a titanium oxynitride layer. The titanium oxide layer TiO _y or the titanium oxynitride layer has a higher dielectric constant than the above-described high dielectric layers, and thus the capacitance of the dielectric layer 138 may be increased. In addition, when the upper dielectric layer 132 is a titanium oxide layer, the second dielectric layer 136 may have a high dielectric constant by including an oxide layer (TiO _y ) or an oxynitride layer having excess titanium.

As described above, according to the present invention, a second dielectric film having a high dielectric constant is formed on the upper surface of the first dielectric film by forming a titanium nitride film having excess titanium on the first dielectric film. As a result, the capacitance of the dielectric film having the first and second dielectric films is increased, and the electrical characteristics of the cell capacitor are improved.

Claims (10)

Forming a lower electrode on the semiconductor substrate, Forming a first dielectric layer having a metal oxide layer on the lower electrode; Depositing a titanium nitride film on the first dielectric film to form an upper electrode on the second dielectric film together with a second dielectric film on an upper surface of the first dielectric film, wherein the titanium nitride film contains excess titanium compared to nitrogen Method of preparation. The method of claim 1, When the titanium nitride film is Ti _x N _1-X (0 <x <1), the composition ratio of the titanium is formed of 0.6 to 0.9. The method of claim 1, And the second dielectric film is formed of a titanium oxide film or a titanium oxynitride film. The method of claim 1, And depositing the titanium nitride film using a chemical vapor deposition process using titanium chloride gas and ammonium chloride gas as a source gas. The method of claim 1, The first dielectric layer is formed of any one selected from the group consisting of hafnium oxide (HfO ₂ ), zirconium oxide (ZrO ₂ ), aluminum oxide (Al ₂ O ₃ ), titanium oxide (TiO ₂ ), and a combination thereof. Capacitor. The method of claim 1, The lower electrode is formed of any one selected from the group consisting of a metal nitride film, ruthenium (Ru), ruthenium oxide (RuO ₂ ), platinum (Pt), iridium (Ir), and iridium oxide (IrO ₂ ). Method of manufacturing a capacitor. A lower electrode provided on the semiconductor substrate; An upper electrode disposed on the lower electrode, the upper electrode including a titanium nitride film having excess titanium compared to nitrogen; And A first dielectric layer interposed between the lower electrode and the upper electrode and sequentially stacked, wherein the first dielectric layer includes a metal oxide layer, and the second dielectric layer includes a titanium oxide layer or a titanium oxynitride layer. . The method of claim 7, wherein The composition ratio of the titanium is 0.6 to 0.9 when the titanium nitride film is Ti _x N _1-X (0 <x <1). The method of claim 7, wherein The first dielectric layer includes any one selected from the group consisting of hafnium oxide (HfO ₂ ), zirconium oxide (ZrO ₂ ), aluminum oxide (Al ₂ O ₃ ), titanium oxide (TiO ₂ ), and a combination thereof. Capacitors. The method of claim 7, wherein The lower electrode includes any one selected from the group consisting of a metal nitride film, ruthenium (Ru), ruthenium oxide (RuO ₂ ), platinum (Pt), iridium (Ir), and iridium oxide (IrO ₂ ). Capacitors.

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