KR20080077777A - Liquid crystal display device and method for driving the same - Google Patents

Abstract

An LCD(Liquid Crystal Display) and a method for driving the same are provided to prevent a flicker phenomenon due to a difference in a swing width of a common voltage at a central portion and an edge portion of an LCD panel by applying the common voltage after applying a data voltage. Data lines(DL1-DLm) cross gate lines(GL1-GLn) to define pixel regions. A data voltage is supplied to the pixel regions through the data lines. Thin film transistors(TFT) are electrically connected to the gate lines and the data lines. A plurality of common lines(CL1-CLn) are disposed in parallel with the gate lines. Liquid crystal cells are electrically connected to the thin film transistors and the common lines. A common transistor(32) is connected to the common lines. The common transistor is switched on so that the data voltage is supplied to the liquid crystal cells prior to the common voltage. The common transistor is turned on by a gate-on signal supplied to an (i+1)-th gate line to supply the common voltage to an i-th gate line.

Description

Liquid crystal display and its driving method {LIQUID CRYSTAL DISPLAY DEVICE AND METHOD FOR DRIVING THE SAME}

1 is a view showing the structure of a liquid crystal display according to a first embodiment of the present invention.

2 is a circuit diagram illustrating a liquid crystal panel according to a first embodiment of the present invention.

3 is a view for explaining a method of driving a liquid crystal display according to a first embodiment of the present invention.

4 is a circuit diagram illustrating a liquid crystal panel according to a second embodiment of the present invention.

5 is a diagram for describing a first driving method of a liquid crystal display according to a second exemplary embodiment of the present invention.

6 is a view for explaining a second driving method of the liquid crystal display according to the second embodiment of the present invention.

<Explanation of Signs of Major Parts of Drawings>

22: liquid crystal panel 26: data driver

24: gate driver 28: control unit

30: common voltage generator 32: common transistor

40: common control unit

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device and a driving method thereof capable of preventing a swing of a common voltage caused by data voltage.

Ultra-thin flat panel display, especially liquid crystal display, has low operating voltage and low power consumption, so it can be used as a portable device.It can be applied to TV, notebook computer, monitor, spacecraft, aircraft, etc. Wide and diverse

In general, a liquid crystal display includes a plurality of gate lines for transmitting a gate signal, and data lines intersecting the gate lines, and data lines for transmitting a data signal, and are formed in an area surrounded by the gate lines and the data lines, and the gate It includes a plurality of liquid crystal cells (Clc) in the form of a matrix connected through a line, a data line and a thin film transistor (Thin Film Transistor).

The common voltage is applied to the common electrode of the liquid crystal cell of the liquid crystal display device through both ends of the common line (ie, the input terminal). In this case, as the common line moves away from the input terminal, the self-resistance and capacitor of the common line increase, so that the RC time constant also increases. In addition, when the gate-on voltage is applied to the gate line and the thin film transistor is turned on, the common voltage becomes more unstable by the capacitor between the pixel electrode and the common electrode. In detail, the data voltage is applied to the pixel electrode while the common voltage is applied to the common electrode. In this case, the common voltage applied to the common electrode forming the pixel electrode and the liquid crystal cell is swinged by the data voltage. At this time, the swing width of the common voltage is affected by the resistance of the common line. That is, since the swing width of the common voltage increases from the edge portion of the panel toward the center portion, there is a problem in that the flicker optimum common voltage level of the entire panel is changed.

Accordingly, an object of the present invention is to provide a liquid crystal display device and a driving method thereof capable of preventing the swing of the common voltage caused by the data voltage.

The liquid crystal display according to the present invention for achieving the above object comprises a gate line; A data line crossing the gate line to provide a pixel area and supply a data voltage; A thin film transistor connected to the gate line and the data line; A plurality of common lines formed parallel to the gate lines; A liquid crystal cell connected to the thin film transistor and the common line; And a common transistor connected to the common line and switched to supply the data voltage to the liquid crystal cell before the common voltage.

According to an aspect of the present invention, there is provided a method of driving a liquid crystal display device, the method including: supplying a gate-on voltage to an ith gate line; Supplying a data voltage to a liquid crystal cell corresponding to an i-th gate line through the thin film transistor turned on by the gate-on voltage; And after supplying the data voltage to the liquid crystal cell, supplying a common voltage to the liquid crystal cell corresponding to the i-th gate line through a common transistor connected to the i-th common line.

Hereinafter, the liquid crystal display of the present invention will be described in detail with reference to the accompanying drawings.

1 is a view showing the structure of a liquid crystal display according to a first embodiment of the present invention.

As shown in FIG. 1, the liquid crystal display according to the present invention provides data for supplying data voltages to the liquid crystal panel 22 in which liquid crystal cells are arranged in a matrix, and the data lines DL of the liquid crystal panel 22. The driver 26, the gate driver 24 for sequentially driving the gate lines GL of the liquid crystal panel 22, and the timing controller 28 for controlling the data driver 26 and the gate driver 24. ) And a common voltage generator 30 for supplying the common voltage Vcom to the liquid crystal panel 22.

The data driver 26 supplies the data signals for one line to the data lines DL1 to DLm for each of the horizontal periods H1 and H2 .. in response to the data control signals DCS provided from the timing controller 28. do. In particular, the data driver 26 converts the digital data R, G, and B provided from the timing controller 28 into an analog data voltage and supplies it to the data line DL.

The gate driver 24 sequentially supplies the gate signal, that is, the gate on voltage VGH, to the gate lines GL1 to GLn in response to the gate control signals GCS provided from the timing controller 28. By the gate on voltage, the thin film transistor TFT connected to the gate lines GL1 to GLn is driven for each gate line GL.

The timing controller 28 generates control signals DCS and GCS for controlling the gate driver 24 and the data driver 26. When the liquid crystal panel 22 is driven, the data driver 26 supplies a data voltage to each data line DL.

The common voltage generator 30 generates a common voltage Vcom for driving the liquid crystal panel 22 using the supply voltage Vdd generated by the DC / DC converter (not shown).

As shown in FIG. 2, the liquid crystal panel 22 includes gate lines GL1 to GLn, data lines DL1 to DLm intersecting the gate lines GL1 to GLn, and gate lines GL1. To GLn and the thin film transistor TFT formed at each pixel region formed at the intersection of the data lines DL1 to DLm, the liquid crystal cell Clc connected to the thin film transistor, and the gate lines GL1 to GLn. Common lines CL1 to CLn, which are formed side by side, to which a common voltage is applied, and a common transistor 32 connected to the common lines CL1 to CLn.

Each of the gate lines GL1 to GLn is connected to the gate electrode of the thin film transistor TFT to supply a gate signal to the gate electrode of the thin film transistor TFT.

Each of the data lines DL1 to DLm crosses each of the gate lines GL1 to GLn to form a pixel area. The data lines DL1 to DLm are connected to the source electrode of the thin film transistor TFT to supply a data signal to the pixel electrode of the liquid crystal cell through the thin film transistor TFT.

The source electrode of the thin film transistor TFT is connected to the data lines DL1 to DLm, the drain electrode is connected to the liquid crystal cell Clc, and the gate electrode is connected to the gate lines GL1 to GLn. The thin film transistor TFT is turned on when the gate on voltages from the gate lines GL1 to GLn are supplied to supply the data signals from the data lines DL1 to DLm to the liquid crystal cell Clc. The thin film transistor TFT is turned off when the gate off voltage is supplied from the gate lines GL1 to GLn to maintain the data voltage charged in the liquid crystal cell Clc.

Each of the common lines CL1 to CLn is connected to a drain electrode of the common transistor 32 to supply a common voltage from the common transistor 32 to the liquid crystal cell Clc.

The liquid crystal cell Clc includes a common electrode having a liquid crystal interposed therebetween and a pixel electrode connected to the thin film transistor TFT. The liquid crystal cell Clc realizes an image by adjusting an optical transmittance by changing an arrangement state of liquid crystals having dielectric anisotropy according to data voltage charged through the thin film transistor TFT.

The common transistor 32 is switched so that the data signal is supplied to the liquid crystal cell Clc before the common voltage. To this end, the common voltage generator 30 is connected to the source electrode of the common transistor 32, the i-th (i is a natural number) common line CLi is connected to the drain electrode, and the i + 1th to the gate electrode. The gate line GLi + 1 is connected. The common transistor 32 is turned on by the gate-on voltage supplied to the i + 1 th gate line GLi + 1 to apply a common voltage to the i th common line CLi. The common transistor 32 connected to the nth (ie, the last) common line CLn is turned on by the gate-on voltage supplied to the dummy gate line DGL to supply the common voltage to the nth common line CL. Is authorized. Here, the gate-on voltage is supplied to the dummy gate line DGL when the gate-on voltage supplied to the n-th gate line GL transitions to the gate-off voltage.

The data signal is applied to the liquid crystal cell Clc connected to the i-th common line CLi by the common transistor 32 before the common voltage. This will be described in detail with reference to FIG. 3.

3 is a view for explaining a method of driving a liquid crystal display according to a first embodiment of the present invention.

First, as shown in FIG. 3, when the gate-on voltage VGH is applied to the first gate line GL1, the thin film transistor TFT connected to the first gate line GL1 is turned on. The data voltage D1 from the data line DL is applied to the pixel electrode of the liquid crystal cell through the thin film transistor TFT connected to the first gate line GL1 after the gate on voltage is applied and is delayed by a predetermined period DP. Is approved.

Meanwhile, as described above, after the data voltage D1 is applied to the pixel electrode of the liquid crystal cell, the gate is applied to the second gate line GL2 before the gate off voltage VGL is applied to the first gate line GL1. Since the on voltage VGH is applied, a section in which the gate on voltage of the first gate line GL1 and the gate on voltage of the second gate line GL2 overlap with each other occurs as in section ⓐ-ⓑ. The overlapping period OP, such as the section ⓐ-ⓑ, is the same as the predetermined period DP described above.

The gate on voltage VGH is applied to the second gate line GL2, and the common transistor 32 connected to the first common line CL1 is turned on through the gate on voltage to turn on the first common line ( Common voltage is applied to CL1). Accordingly, the potential difference between the common voltage supplied through the first common line CL1 and the data voltage D1 supplied through the thin film transistor TFT connected to the first gate line GL1 during the period ⓐ-ⓑ. As a result, the liquid crystal is moved to display an image.

Subsequently, the data voltage D2 from the data line DL through the thin film transistor TFT connected to the second gate line GL2 and turned on at the moment when the gate off voltage is applied to the first gate line GL1. Is applied to the pixel electrode of the liquid crystal cell.

Subsequently, after a delay of the predetermined period DP, the gate on voltage is applied to the third gate line GL3 before the gate off voltage is applied to the second gate line GL2. ), A section in which the gate on voltage of the second gate line voltage and the gate on voltage of the third gate line GL3 overlap. The overlapping period OP such as the period ⓒ-ⓓ is equal to the predetermined period DP as described above.

In addition, a gate on voltage is applied to the third gate line GL3, and a common transistor connected to the second common line CL2 is turned on through the gate on voltage VGH, thereby turning on the second common line CL2. Common voltage is applied. Accordingly, the common voltage is applied to the common electrode of the liquid crystal cell Clc connected to the second common line CL2, and the common voltage and the second gate line supplied through the second common line CL2 during the period ⓒ-ⓓ. The liquid crystal is moved by the potential difference with the data voltage D2 supplied through the thin film transistor TFT connected to the GL2 to display an image.

This process is repeated to display an image on all the pixels of the liquid crystal display panel according to the first embodiment of the present invention.

4 is a circuit diagram illustrating a liquid crystal panel according to a second embodiment of the present invention, and the configuration thereof is the same as that of the first embodiment described above.

However, the liquid crystal display panel according to the second exemplary embodiment of the present invention shown in FIG. 4 further includes a common controller 40 connected to the gate electrode of the common transistor 32. Same as the display panel. Therefore, the same reference numerals are given, and description of the same parts will be omitted.

The common controller 40 generates a common control signal CSS for controlling the common transistor 32. The common control signal CSS includes a common on voltage VCH for turning on the common transistor 32 and a common off voltage VCL for turning off the common transistor 32, as shown in FIG. 5 or 6. . As shown in FIG. 5, the common on voltage VCH and the off voltage VCL supplied to the common transistor 32 connected to the i common line CLi are supplied to the i th gate line GLi. The supply point is similar to the gate on voltage VCH and the off voltage VCL. As illustrated in FIG. 6, the common on voltage VCH and the off voltage VCL supplied to the common transistor 32 connected to the i common line CLi are supplied to the i + 1 gate line GLi + 1. The gate on voltage VCH and the off voltage VCL are the same at the time of supply.

The source electrode of the common transistor 32 is connected to the common voltage generation unit 30, the drain electrode is connected to the common lines CL1 to CLn, and the gate electrode is connected to the common control unit 40. The common transistor 32 is turned on by the common on voltage VCH of the common control signal CSS generated by the common control unit 40 connected to the gate electrode, so that the common transistor 32 is connected to the common lines CL1 to CLn. Vcom).

5 is a view for explaining a first embodiment of a method of driving a liquid crystal display according to a second embodiment of the present invention.

As shown in FIG. 5, when the gate on voltage VGH is applied to the first gate line GL1, the thin film transistor TFT connected to the first gate line GL1 is turned on. Then, the data voltage D1 from the data line DL is applied to the pixel electrode of the liquid crystal cell through the thin film transistor TFT connected to the first gate line GL1. Subsequently, when the common on voltage VCH is applied to the gate electrode of the common transistor 32 connected to the first common line CL1, the common transistor 32 connected to the first common line CL1 is turned on to form a first transistor. The common voltage Vcom is applied to the common electrodes of the liquid crystal cells connected to the common line CL1.

Accordingly, the common voltage applied to the common electrode of the liquid crystal cell Clc connected to the first common line CL1 and the data voltage D1 supplied through the thin film transistor TFT connected to the first gate line GL1. The liquid crystal moves by the potential difference between and the image is displayed. In this case, the gate off voltage VGL is applied to the gate line GL and the common off voltage VCL is applied to the gate electrode of the common transistor 32 so that the thin film transistor connected to the first gate line GL1 and the first thin film transistor are connected to the gate line GL1. The common transistor 32 connected to the gate common line CL1 is turned off at the same time. Meanwhile, after the thin film transistor connected to the first gate line GL1 is turned off, the common transistor 32 connected to the first common line CL1 may be turned off.

Subsequently, a gate on voltage is applied to the second gate line GL2. The thin film transistor TFT connected to the second gate line GL2 is turned on. Then, the data voltage D2 from the data line DL is applied to the pixel electrode of the liquid crystal cell through the thin film transistor TFT connected to the second gate line GL2.

Subsequently, when the common on voltage VCH is applied to the gate electrode of the common transistor 32, the common transistor 32 connected to the second common line CL2 is turned on and the liquid crystal connected to the second common line CL2. A common voltage is applied to the common electrodes of the cells.

Accordingly, the common voltage applied to the common electrode of the liquid crystal cell Clc connected to the second common line CL2 and the data voltage D2 supplied through the thin film transistor TFT connected to the second gate line GL2. The liquid crystal moves by the potential difference between and the image is displayed. In this case, the gate off voltage is applied to the second gate line GL2 and the common off voltage is applied to the gate electrode of the common transistor 32, thereby the thin film transistor and the second common line CL2 connected to the second gate line GL2. Is connected to the common transistor 32 is turned off. Meanwhile, after the thin film transistor connected to the second gate line GL2 is turned off, the common transistor 32 connected to the second common line CL2 may be turned off.

This process is repeated to display an image on all pixels of the liquid crystal display panel according to the first driving method of the liquid crystal display according to the second embodiment of the present invention.

6 is a view for explaining a second embodiment of a method of driving a liquid crystal display according to a second embodiment of the present invention.

First, as shown in FIG. 6, when a gate on voltage is applied to the first gate line GL1, the thin film transistor TFT connected to the first gate line GL1 is turned on. After the gate-on voltage VGH is applied and the predetermined period DP is delayed, the data voltage D1 from the data line DL is connected to the liquid crystal cell through the thin film transistor TFT connected to the first gate line GL1. It is applied to the pixel electrode.

Subsequently, after the data voltage D1 is applied to the pixel electrode of the liquid crystal cell, the gate on voltage is applied to the second gate line GL2 before the gate off voltage is applied to the first gate line GL1. Like the section ⓑ, a section in which the gate on voltage of the first gate line GL1 and the gate on voltage of the second gate line GL2 overlap each other occurs. This overlap period OP is equal to the predetermined period DP. At the same time when the gate-on voltage is applied to the second gate line GL2, the common transistor 32 connected to the first common line CL1 by the common on-voltage of the common control signal CSS generated by the common controller 40 is generated. ) Is turned on to apply a common voltage to the first common line CL1. Accordingly, the common voltage is applied to the common electrode of the liquid crystal cell Clc connected to the first common line CL1 and the common voltage and the first gate line supplied through the first common line CL1 during the period ⓐ-ⓑ. The liquid crystal is moved by the potential difference with the data voltage D1 supplied through the thin film transistor TFT connected to the GL1 to display an image.

Subsequently, the data voltage D2 from the data line DL through the thin film transistor TFT connected to the second gate line GL2 and turned on at the moment when the gate off voltage is applied to the first gate line GL1. Is applied to the pixel electrode of the liquid crystal cell.

After the gate on voltage is applied to the third gate line GL3 before the gate off voltage is applied to the second gate line GL2, the gate on voltage of the second gate line GL2 and the gate on voltage of the second gate line GL2 may be reduced. A section in which the gate on voltages of the three gate lines GL3 overlap each other occurs. This overlap period OP is equal to the predetermined period DP. At the same time when the gate-on voltage is applied to the third gate line GL2, the common transistor connected to the second common line CL2 is turned on by the common on-voltage of the common control signal CSS generated by the common controller 40. On, the common voltage is applied to the second common line CL2. Accordingly, the common voltage is applied to the common electrode of the liquid crystal cell Clc connected to the second common line CL2, and the common voltage and the second gate line supplied through the second common line CL2 during the period ⓒ-ⓓ. The liquid crystal is moved by the potential difference with the data voltage D2 supplied through the thin film transistor TFT connected to the GL2 to display an image.

This process is repeated to display an image on all pixels of the liquid crystal display panel according to the second driving method of the liquid crystal display according to the second embodiment of the present invention.

 As described above, in the liquid crystal display according to the present invention, the data voltage is first applied and then the common voltage is applied. In this case, the common voltage caused by the data voltage can be prevented from becoming unstable.

Meanwhile, the liquid crystal display according to the present invention may be formed as shown in FIG. 7 instead of the structure shown in FIG. 2. In this case, in the liquid crystal display shown in FIG. 2, the common voltage and the gate signal swing by the parasitic capacitor between the gate electrode and the gate line GL of the common transistor 32. On the other hand, the liquid crystal display illustrated in FIG. 7 does not cross the gate electrode and the gate line of the common transistor 32, so that no parasitic capacitor is formed between the gate electrode and the gate line GL of the common transistor 32. Accordingly, in the liquid crystal display illustrated in FIG. 7, the swing phenomenon of the common voltage and the gate signal can be prevented.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

As described above, in the liquid crystal display according to the present invention, the data voltage is applied first, and then the common voltage is applied, thereby preventing the flicker phenomenon caused by the difference in the common voltage fluctuation width of the center and edge portions of the panel, thereby making the flicker characteristic uniform in the panel. It can be done.

Claims (14)

A gate line; A data line crossing the gate line to provide a pixel area and supply a data voltage; A thin film transistor connected to the gate line and the data line; A plurality of common lines formed parallel to the gate lines; A liquid crystal cell connected to the thin film transistor and the common line; And a common transistor connected to the common line and switched to supply the data voltage before the common voltage to the liquid crystal cell. The method of claim 1, And the common transistor is turned on by a gate on signal supplied to the i + 1 th gate line to supply the common voltage to the i th common line. The method of claim 1, And a common controller for generating a common control signal for controlling the common transistor. The method of claim 3, wherein And the common transistor is turned on by a common on voltage of the common control signal to supply the common voltage to the common line. The method according to claim 2 or 4, And a gate-on voltage supplied to each of the i th gate line and an i + 1 th gate line is partially overlapped. The method of claim 5, wherein And a data signal is supplied to the liquid crystal cell corresponding to the i gate line after the gate-on voltage is supplied to the i-th gate line and delayed for a predetermined period. The method of claim 6, And the predetermined period is the same as an overlap period of a gate-on voltage supplied to each of the i th gate line and an i + 1 th gate line. The method of claim 4, wherein The common on voltage supplied to the common transistor connected to the i-th common line is supplied after the gate-on voltage is supplied to the i-th gate line, and the common off voltage supplied to the common transistor connected to the i-th common line is i. A liquid crystal display according to claim 1, wherein the gate off voltage is supplied to the gate line. Supplying a gate-on voltage to the i-th gate line; Supplying a data voltage to a liquid crystal cell corresponding to an i-th gate line through the thin film transistor turned on by the gate-on voltage; And supplying a common voltage to the liquid crystal cell corresponding to the i-th gate line through a common transistor connected to the i-th common line parallel to the i-th gate line. The method of claim 9, Supplying a data voltage to the liquid crystal cell corresponding to the i-th gate line through the thin film transistor turned on by the gate-on voltage And a data voltage is supplied to the liquid crystal cell corresponding to the i-th gate line after the gate-on voltage is supplied to the thin film transistor and is turned on. The method of claim 10, And the predetermined period is the same as an overlap period of a gate-on voltage supplied to each of the i th gate line and an i + 1 th gate line. The method of claim 10, Supplying a common voltage to the liquid crystal cell corresponding to the i-th gate line Supplying a gate-on voltage to the i + 1 gate line to partially overlap the gate-on voltage supplied to the i-th gate line, and simultaneously turning on the common transistor by the gate-on voltage supplied to the i + 1 gate line Steps; And supplying the common voltage supplied to the i-th common line to the liquid crystal cell through the common transistor. The method of claim 10, Supplying a common voltage to the liquid crystal cell corresponding to the i-th gate line Supplying a common control signal generated by a common controller to a common transistor connected to the i th common line to turn on the common transistor and simultaneously supply a gate on voltage to an i + 1 gate line; And supplying a common voltage supplied to the i-th common line to the liquid crystal cell through the common transistor. The method of claim 9, Supplying a common voltage to the liquid crystal cell corresponding to the i-th gate line Supplying a common control signal generated by a common controller to a common transistor connected to an i-th common line to turn on the common transistor; And supplying a common voltage supplied to the i-th common line to the liquid crystal cell through the common transistor.

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