KR20080067178A - Method of manufacturing flash memory card - Google Patents

Abstract

A method for manufacturing a flash memory card is provided to remove previously electric charges from capacitors by connecting electrodes of the capacitors with a grounding part. A substrate including a plurality of terminals is prepared(S10). A plurality of capacitors are formed on the substrate(S20). The capacitors are electrically connected to the terminals(S30). Electrodes of the capacitors are electrically connected to an external grounding part(S40). A semiconductor die is mounted on the substrate(S50). The terminals are electrically connected to the semiconductor die(S60). A plasma cleaning process is performed between the process for forming the capacitors on the substrate and the process for connecting electrically the terminals and the semiconductor die.

Description

Flash memory card manufacturing method {Method of manufacturing flash memory card}

1 is a plan view illustrating a wiring connection of a flash memory card according to the prior art.

2 is a flowchart illustrating a method of manufacturing a flash memory card according to the present invention.

3 is a plan view illustrating wiring connections of a flash memory card according to the present invention.

Explanation of symbols on the main parts of the drawings

100 substrate 112 semiconductor die

120: capacitors 122, 124: electrodes

130, 132: Terminal 150: Wiring

162: ground

The present invention relates to a flash memory card manufacturing method, and more particularly, to a flash memory card manufacturing method for preventing the charging of charge in the capacitor to prevent the occurrence of defects in the semiconductor chip.

Recently, the demand for application devices such as digital cameras, MP3 players, personal digital assistants (PDAs), mobile phones and other digital mobile devices is increasing and the flash memory card market is rapidly expanding. Flash memory cards are used for storing and reproducing data, and have a non-volatile memory chip such as NAND or NOR flash memory. Flash memory cards are commercially available as memory stick cards, smart media cards, secure digital cards, mini secure digital cards, extreme digital cards, and multi media cards.

In current flash memory cards, a plurality of resistors and capacitors are mounted on a substrate. In addition, after the capacitor is mounted on the substrate, a process such as die attach, wire bonding, molding, or the like is performed, and a plasma process for cleaning or the like is performed between the processes as necessary. Electric charges may accumulate in the capacitor by the plasma generated during the plasma process. The accumulated charge may move to the semiconductor die during wire bonding, causing damage to the semiconductor die. Hereinafter, with reference to the structure of the flash memory card, die damage due to accumulated charge will be described in detail.

1 is a plan view illustrating a wiring connection of a flash memory card according to the prior art.

Referring to FIG. 1, a semiconductor die 12 having a memory element formed on a substrate 10 is mounted. In addition, the substrate 10 is formed with a capacitor 20, terminals 30, 32, and 34, and connection wirings 40 connecting them. The first electrode 22 of the capacitor 20 is connected to the first power terminal 30 through the first connection wiring 42, and the second electrode 24 of the capacitor 20 is the second connection wiring 44. It is connected to the second power terminal 32 through).

When performing conventional wire bonding or wire bonding monitoring system (WBMS), the first power terminal 30 is the source power terminal V _ss , and the second power terminal 32 is the source power terminal V _dd . Can be. Therefore, the first electrode 22 of the capacitor 20 connected to the first power terminal 30 is connected to the external input / output terminal 34 through the third connection wiring 46. The external input / output terminal 34 is connected to the ground 62 of the wire bonding machine 60 through the external wiring 64. Thus, the charge accumulated in the first electrode 22 of the capacitor 20 escapes along the arrow shown. That is, the electric charge passes through the third connection wire 46, the external input / output terminal 34, and the external wire 64 to the ground 62 of the wire bonding machine 60. Therefore, when wire-bonding the first power terminal 30, which is the source power terminal V _ss , and the semiconductor die 12 by the first wire 50, the semiconductor die 12 is formed by the first of the capacitor 20. It is not impacted by the charges accumulated in the electrode 22.

However, the above conventional wiring connection does not connect the charge accumulated in the second electrode 24 of the capacitor 20 with the ground. Therefore, when wire-bonding the second power terminal 32 which is the drain power terminal V _dd and the semiconductor die 12 by the second wire 52, it accumulates in the second electrode 24 of the capacitor 20. Charges exit the ground 62 through the semiconductor die 12 along the arrow shown. However, if the amount of accumulated charge exceeds the degree that the semiconductor die 12 can withstand, there is a fear that the internal circuit is destroyed by the impact caused by the charge in the region A as shown.

Accordingly, an object of the present invention is to provide a flash memory card manufacturing method capable of preventing damage to an internal circuit of a semiconductor die during wire bonding by removing charges accumulated in a capacitor by plasma processing.

According to another aspect of the present invention, there is provided a method of manufacturing a flash memory card, including: preparing a substrate on which a plurality of terminals are formed; Forming a plurality of capacitors on the substrate; Electrically connecting the capacitors with terminals; Electrically connecting all of the electrodes of the capacitor to an external ground; Mounting a semiconductor die on the substrate; And electrically connecting the terminals with the semiconductor die.

Plasma cleaning may be further performed between the steps of forming the plurality of capacitors on the substrate to electrically connecting the terminals and the semiconductor die.

The electrically connecting the electrodes of the capacitor to an external ground may include electrically connecting the electrodes of the capacitor to an external input / output terminal formed on the substrate, and electrically connecting the external input / output terminal to the external ground. It may include.

After electrically connecting the electrodes of the capacitor with an external ground, the method may further include shorting a connection with the external ground.

Electrically connecting the capacitors with the terminals and electrically connecting the electrodes of the capacitor with an external ground may be performed using a pattern formed on the substrate. In addition, the step of electrically connecting the electrodes of the capacitor to the external input and output terminals formed on the substrate, it may be made using a pattern formed on the substrate.

Electrically connecting the electrodes of the capacitor with an external ground may be performed by wire bonding using a wire bonding machine. In addition, the step of electrically connecting the terminals and the semiconductor die may be performed by wire bonding using a wire bonding machine.

The semiconductor die may be a flash memory chip and / or a controller chip.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

The embodiments of the present invention are provided to more fully explain the present invention to those skilled in the art, and the following examples can be modified in various other forms, and the scope of the present invention is It is not limited to an Example. In the following description, when a layer is described as being on top of another layer, it may be directly on top of another layer, and a third layer may be interposed therebetween. In addition, the thickness or size of each layer in the drawings is exaggerated for convenience and clarity, the same reference numerals in the drawings refer to the same elements. As used herein, the term "and / or" includes any and all combinations of one or more of the listed items.

Although the terms first, second, etc. are used herein to describe various members, parts, regions, layers, and / or parts, these members, parts, regions, layers, and / or parts are defined by these terms. It is obvious that not. These terms are only used to distinguish one member, part, region, layer or portion from another region, layer or portion. Thus, the first member, part, region, layer or portion, which will be discussed below, may refer to the second member, component, region, layer or portion without departing from the teachings of the present invention.

2 is a flowchart illustrating a method of manufacturing a flash memory card according to the present invention. 3 is a plan view illustrating wiring connections of a flash memory card according to the present invention.

2 and 3, first, a substrate 100 on which a plurality of terminals 130 and 132 are formed is prepared (S10). The substrate 100 may be a printed circuit board. In addition, the terminals 130 and 132 may be a source voltage V _ss terminal or a drain voltage V _dd terminal. However, this is exemplary and is not necessarily limited thereto.

Subsequently, the capacitor 120 is formed on the substrate 100 (S20). The capacitor 20 may be formed in plural. In addition, the capacitor 20 may be separately formed and mounted on the substrate 100, or may be formed by a conventional device forming method on the substrate 100. After the capacitor 120 is formed, the substrate 100 may be cleaned using plasma. In this case, charges generated by the plasma may be charged in the first electrode 122 and the second electrode 124 of the capacitor 120.

The capacitor 120 is electrically connected to the terminals 130 and 132 (S30). That is, the first electrode 122 of the capacitor 120 and the first terminal 130 are electrically connected by the first wiring 152, and the second electrode 124 of the capacitor 120 and the second terminal ( 132 is electrically connected by the second wiring 154. In addition, after the first wiring 154 and the second wiring 158 are formed, the substrate 100 may be cleaned using plasma. In this case, as described above, charges generated by the plasma may be charged in the first electrode 122 and the second electrode 124 of the capacitor 120.

Subsequently, all of the first and second electrodes 122 and 124 of the capacitor 120 are electrically connected to the external ground 162 (S40). In detail, as shown in FIG. 3, the first electrode 122 of the capacitor 120 is electrically connected by the external input / output terminal 134 and the third wiring 156, and the capacitor 120 is electrically connected to the first electrode 122. The second electrode 124 is electrically connected to the external input / output terminal 134 by the fourth wiring 158. The external input / output terminal 134 is electrically connected to the external ground 162 by the external wiring 164. Alternatively, the first and second electrodes 122 and 124 of the capacitor 120 may be directly connected to the external ground 162 without the external input / output terminal 134, the third wiring 156, and the fourth wiring 158. For example, it may be electrically connected using wire bonding.

The external ground 162 may be included in the wire bonding machine 160 which performs wire bonding afterwards, but this is exemplary and is not necessarily limited thereto. In addition, a plurality of external input / output terminals 134 may be provided, and the first electrode 122 and the second electrode 124 may be connected to separate external input / output terminals 134. In addition, after the third wiring 156 and the fourth wiring 158 are formed, the substrate 100 may be cleaned using plasma. In this case, as described above, charges generated by the plasma may be charged in the first electrode 122 and the second electrode 124 of the capacitor 120.

As such, the first and second electrodes 122 and 124 of the capacitor 120 are electrically connected to the external ground 162 to thereby form the first and second electrodes 122 of the capacitor 120 by a plasma cleaning process. , Charges accumulated in 124 are released to the outside.

The electrical connection between the capacitor 120 and the first and second terminals 130 and 132 and the first and second electrodes 122 and 124 of the capacitor 120 and the external ground 162 may include a substrate. It may be made using a pattern formed on the (100). Also. Electrical connection between the first and second electrodes 122 and 124 of the capacitor 120 and the external input / output terminal 162 formed on the substrate 100 may be performed using a pattern formed on the substrate 100. . That is, the wirings 150 may be patterns formed on the substrate 100.

In addition, in the case where the wirings 150 are patterns formed on the substrate 100, the capacitors may be formed after the first and second terminals 130 and 132 and the wirings 150 are formed on the substrate 100. 120). Alternatively, the first and second terminals 130 and 132, the wirings 150, and the capacitor 120 may be simultaneously formed on the substrate 100.

Next, the semiconductor die 112 is mounted on the substrate 100 (S50). The semiconductor die 112 may be plural and may also be a flash memory chip and / or a controller chip.

The first terminal 130 and the second terminal 132 are electrically connected to the semiconductor die 112. The step may be performed by wire bonding using the wire bonding machine 160. After the process, the substrate 100 may be cleaned using plasma. At this time, the charges generated by the plasma exits to the external ground 162 through the wiring 150 as described above.

Optionally, the first and second electrodes 122 and 124 of the capacitor 120 are electrically connected to the external ground 162 to remove accumulated charge, and then connected to the external ground 162, ie, the first and second electrodes 122 and 124. The third wiring 156 and / or the fourth wiring 158 can be shorted.

Thereafter, a conventional memory card forming process, for example, a molding process is performed to complete the memory card.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes are possible within the scope not departing from the technical spirit of the present invention. It will be evident to those who have knowledge of.

The flash memory card manufacturing method of the present invention can prevent damage to the internal circuit of the semiconductor die during wire bonding by connecting the electrodes of the capacitor with the ground, respectively, to remove the charge accumulated in the capacitor by the plasma process in advance.

Claims (11)

Preparing a substrate on which a plurality of terminals are formed; Forming a plurality of capacitors on the substrate; Electrically connecting the capacitors with the terminals; Electrically connecting all of the electrodes of the capacitor to an external ground; Mounting a semiconductor die on the substrate; And And electrically connecting the terminals to the semiconductor die. The method of claim 1, further comprising plasma cleaning between the steps of forming the plurality of capacitors on the substrate to electrically connecting the terminals and the semiconductor die. Flash memory card manufacturing method characterized in that. The method of claim 1, wherein electrically connecting the electrodes of the capacitor to an external ground includes: Electrically connecting the electrodes of the capacitor with an external input / output terminal formed on the substrate; And And electrically connecting the external input / output terminal to the external ground. The method of claim 1, further comprising shorting a connection with the external ground after electrically connecting the electrodes of the capacitor to an external ground. The flash memory card of claim 1, wherein the connecting of the capacitors to the terminals and the connecting of the electrodes of the capacitor to an external ground are performed using a pattern formed on the substrate. Manufacturing method. The method of claim 3, wherein electrically connecting the electrodes of the capacitor to an external input / output terminal formed on the substrate is performed using a pattern formed on the substrate. The method of claim 1, wherein electrically connecting the electrodes of the capacitor to an external ground is performed by wire bonding using a wire bonding machine. The method of claim 1, wherein the electrically connecting the terminals and the semiconductor die is performed by wire bonding using a wire bonding machine. The method of claim 1, wherein the external ground is included in a wire bonding machine which performs wire bonding. The method of claim 1, wherein the plurality of terminals include a source voltage (V _ss ) terminal and a drain voltage (V _dd ) terminal. The method of claim 1, wherein the semiconductor die is a flash memory chip and / or a controller chip.

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