KR20080062479A - Liquid crystal display device and method driving of the same - Google Patents

Abstract

A liquid crystal display device method and a driving method thereof are provided to improve an image quality by increasing a contrast in a displayed image. A liquid crystal display device includes an LCD(Liquid Crystal Display) panel(102), an input portion, driving portions(104,106), and data format adaptive data compensators(114,116). Plural gate and data lines are arranged on the LCD panel. The input portion inputs pixel data to be inputted to the LCD panel. The driving portions drive the LCD panel. The data format adaptive data compensator converts the input pixel data to data with different low brightness values. The data format adaptive compensator selectively supplies one of the pixel data from the input portion and the compensated data to the drivers.

Description

Liquid crystal display device and method driving of the same

1 is a view showing a liquid crystal display device according to the present invention.

FIG. 2 is a diagram illustrating in detail the data selection controller of FIG. 1; FIG.

3 is a view illustrating in detail the first data compensator of FIG. 1;

4 is a view illustrating in detail a second data compensator of FIG. 1;

<Brief description of the main parts of the drawing>

102: liquid crystal panel 104: gate driver

106: data driver 108: timing controller

110: backlight unit 112: frame delay

114: first data compensator 116: second data compensator

118: first selection unit 120: data selection control unit

122: horizontal counter 124: vertical counter

126: division unit 128, 138, 150: first comparison unit

130, 140, and 152: second comparator 132: first row data compensator

134: second selection unit 136: horizontal synchronization counter

142 and 154: operation unit 144: second row data compensation unit

146: third selection unit 148: pixel counter

The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device and a driving method thereof capable of improving image quality.

Liquid crystal display device (Liquid crystal display device) is a trend that the application range is gradually widened due to the characteristics such as light weight, thin, low power consumption. In accordance with this trend, the liquid crystal display device is used for office automation equipment, audio / video equipment, and the like. On the other hand, the liquid crystal display device displays the desired image on the screen by adjusting the transmission amount of the light beam according to the image signal applied to the plurality of control switches arranged in a matrix form.

Since most of the liquid crystal display devices are light-receiving elements that display an image by controlling the amount of light source coming from the outside, a separate light source for irradiating light to the liquid crystal panel is necessary. When the light generated from the light source is irradiated onto the liquid crystal panel, the liquid crystal panel displays an image.

Optical sheets are added to make the light generated from the light source have a uniform brightness, and a mechanical design is separately required to support the optical sheet on the light source. Due to the optical sheet, the light generated from the light source has a uniform brightness, and the light having the uniform brightness is irradiated onto the liquid crystal panel so that an image having the same brightness is displayed on the front surface of the liquid crystal panel.

The image signal to be input to the liquid crystal panel has a normal data format, a data format of a letter box having a black image at the upper and lower portions, and a SD (Standard Definition) data format having a 4: 3 aspect ratio. Left / right parts show a black image). As described above, since the light generated from the light source of the liquid crystal display device has a uniform brightness, the light generated from the light source is irradiated onto the liquid crystal panel even when the above three data formats are input to the liquid crystal panel. That is, light of uniform brightness is irradiated from the light source to the liquid crystal panel irrespective of the data format to be input to the liquid crystal panel.

Therefore, the portion of the image that does not appear and the uniform luminance are irradiated in the portion of the black image, as in the case of the letter box data format or the SD data format. This causes a problem in that the black image portion appears bright. As the luminance of the black image is increased, image quality deterioration such as flicker occurs, and as the luminance of the black image is increased, contrast is not emphasized.

An object of the present invention is to provide a liquid crystal display device and a driving method thereof capable of improving image quality.

SUMMARY OF THE INVENTION An object of the present invention is to provide a liquid crystal display and a driving method thereof which can emphasize contrast.

According to an aspect of the present invention, a liquid crystal display device includes: a liquid crystal panel including a plurality of gate lines and a plurality of data lines; an input unit for inputting pixel data to be input to the liquid crystal panel; and driving the liquid crystal panel. Data format adaptation for compensating pixel data input from the driver and the input unit with low luminance at different ratios and selectively supplying any one of the pixel data and the compensated data from the input unit to the driver. And a data compensator.

According to an aspect of the present invention, there is provided a method of driving a liquid crystal display device comprising: a liquid crystal panel having a plurality of gate lines and a plurality of data lines arranged therein; an input unit for inputting pixel data to be input to the liquid crystal panel; A driving method of a liquid crystal display device comprising a driving unit for driving, the method comprising: compensating pixel data from the input unit with data having low luminance at different ratios, and among the pixel data and the compensated data from the input unit; Selecting any one data and displaying an image corresponding to the selected data.

Hereinafter, with reference to the accompanying drawings will be described an embodiment according to the present invention.

1 is a view showing a liquid crystal display device according to the present invention.

As shown in FIG. 1, the liquid crystal display according to the present invention includes a liquid crystal panel 102 for displaying an image and a gate driver for driving a plurality of gate lines GL1 to GLn on the liquid crystal panel 102. 104, a data driver 106 for driving the plurality of data lines DL1 to DLm on the liquid crystal panel 102, and a timing controller for controlling driving timings of the gate and data drivers 104 and 106 ( 108 and a backlight unit 110 for generating light irradiated onto the liquid crystal panel 102.

In addition, the liquid crystal display according to the present invention includes a frame delay unit 112 for delaying data supplied from the outside for one frame and a first and a second compensation unit for compensating data delayed from the frame delay unit 112 at different rates. A first selector configured to select one of the second data compensators 114 and 116 and data compensated by the first and second data compensators 114 and 116 and supply the selected data to the data driver 106. 118 and a data selection controller 120 for controlling the first selection unit 118.

The liquid crystal panel 102 includes pixels formed in regions divided by a plurality of gate lines GL1 to GLn and a plurality of data lines DL1 to DLm, respectively. Each of the pixels includes a thin film transistor TFT formed at an intersection between a corresponding gate line GL and a corresponding data line DL, and a liquid crystal connected between the thin film transistor TFT and the common electrode Vcom electrode. It has a cell Clc.

The thin film transistor TFT switches the pixel data voltage to be supplied to the corresponding liquid crystal cell Clc from the corresponding data line DL in response to a gate scan signal on the corresponding gate line GL. The liquid crystal cell Clc includes a common electrode facing each other with a liquid crystal layer interposed therebetween, and a pixel electrode connected to the thin film transistor TFT. The liquid crystal cell Clc charges the pixel data voltage supplied via the corresponding thin film transistor TFT. In addition, the voltage charged in the liquid crystal cell Clc is updated every time the corresponding thin film transistor TFT is turned on.

In addition, each of the pixels on the liquid crystal panel 102 includes a storage capacitor Cst connected between the thin film transistor TFT and the previous gate line. The storage capacitor Cst minimizes a natural decrease in the voltage charged in the liquid crystal cell Clc.

The gate driver 104 correspondingly supplies a plurality of gate scan signals to the plurality of gate lines GL1 to GLn in response to the gate control signals GCS from the timing controller 108. The plurality of gate scan signals cause the plurality of gate lines GL1 to GLn to be sequentially enabled for one horizontal synchronization signal.

The data driver 106 generates a plurality of pixel data voltages whenever any one of the plurality of gate lines DL1 to DLm is enabled in response to the data control signals DCS from the timing controller 108. Is generated and supplied to each of the plurality of data lines DL1 to DLm on the liquid crystal panel 102. To this end, the data driver 106 inputs pixel data from the timing controller 116 by one line, and converts one line of pixel data into pixel data voltages in an analog form using a gamma voltage set. Convert.

The timing controller 108 is a data clock DCLK, a horizontal synchronization signal Hsync, a vertical synchronization signal from an external system (for example, a graphic module of a computer system or an image demodulation module of a television reception system), which is not shown. The gate control signals GCS, the data control signals DCS, and the polarity inversion signal POL are generated using the Vsync and the data enable signal DE. The gate control signals GCS are supplied to the gate driver 104, and the data control signals DCS and the polarity inversion signal POL are supplied to the data driver 106.

The backlight unit 110 includes a lamp for generating light and includes an optical sheet for allowing the light generated by the lamp to have a uniform brightness. The backlight unit 110 adjusts the light generated by the lamp to have a uniform brightness to irradiate the light having the uniform brightness to the liquid crystal panel 102. As a result, the liquid crystal panel 102 can display an image.

The frame delay unit 112 delays the input data Data from the outside for one frame and supplies them to the first and second data compensators 114 and 116, respectively. In this case, the description of the first and second data compensators 114 and 116 will be described later with reference to FIGS. 3 and 4.

The first selector 118 selects any one of compensation data supplied from the first and second data compensators 114 and 116 according to a control signal generated from the data selection controller 120. It serves to supply the data driver 106. A detailed description of the data selection controller 120 will be described later with reference to FIG. 2.

FIG. 2 is a diagram illustrating the data selection controller of FIG. 1 in detail.

As shown in FIGS. 1 and 2, the data selection controller 120 includes a horizontal counter 122 that counts a horizontal synchronization signal Hsync supplied from an external system, and a data clock signal supplied from an external system. A division unit 126 including a vertical counter 124 for counting the DCLK, and dividing the value counted by the horizontal counter 122 and the value counted by the vertical counter 124 to calculate the divided value; And a value calculated from the first comparator 128 and the divider 126 which compares the value calculated by the divider 126 with the first reference value and generates a first control signal according to the comparison result. And a second comparison unit 130 for comparing the second reference value and generating a second control signal according to the comparison result.

The horizontal counter 122 counts the number of times a high pulse of the horizontal sync signal Hsync supplied from an external system is input and supplies the counted value to the divider 126. The horizontal counter 122 may eventually determine the number of gate lines GL1 to GLn arranged in the liquid crystal panel 102.

The vertical counter 124 counts the number of times the high pulse of the data clock signal DCLK supplied from an external system is input and supplies the counted value to the divider 126. The vertical counter 124 may eventually determine the number of the plurality of data lines DL1 to DLm arranged on the liquid crystal panel 102.

The division unit 126 calculates the value counted from the horizontal counter 122 and the value counted from the vertical counter 124, and outputs the calculated value. To be exact, the divider 126 divides the value counted from the horizontal counter 122 and the value counted from the vertical counter 124, calculates the divided value, and calculates the first and second comparator 128. , 130). The divider 126 determines the format of data input from an external system by dividing the number of gate lines supplied from the horizontal counter 122 and the number of data lines supplied from the vertical counter 124.

The divider 126 divides the number of data lines and the number of gate lines, for example, to determine whether the ratio of the number of data lines and the number of gate lines is an 4: 3 SD data image format.

The first comparison unit 128 compares the value calculated by the division unit 126 with the first reference value (first data format) and generates a first control signal of a specific logic according to the comparison result. In this case, the first reference value (first data format) is one step lower than a ratio of dividing a data line and a gate line to determine whether a black box is displayed on the upper and lower portions of the liquid crystal panel 102. .

When the value calculated by the divider 126 is greater than the first reference value (first data format), the first comparator 128 generates a high first control signal. In addition, when the value calculated by the divider 126 is smaller than the first reference value (first data format), the first comparator 128 generates a low first control signal. The low and high first control signals generated by the first comparator 128 are supplied to the first selector 118 illustrated in FIG. 1.

The second comparator 130 compares the value calculated by the divider 126 with a second reference value (second data format) and generates a second control signal of a specific logic according to the comparison result. In this case, the second reference value (second data format) is one step lower than the ratio of dividing the data line and the gate line, which determine whether the black image is the SD data image displayed on the left and right sides of the liquid crystal panel 102.

When the value calculated by the divider 126 is larger than the second reference value (second data format), the second comparator 130 generates a high second control signal. In addition, when the value calculated by the divider 126 is smaller than the second reference value (second data format), the second comparator 130 generates a low second control signal. The low and high second control signals generated by the second comparator 130 are supplied to the first selector 118 shown in FIG. 1.

The first and second reference values are values obtained by dividing the number of gate lines and the number of data lines arranged in the liquid crystal panel 102. The first and second reference values are set according to the width and height ratio of the format of the data to be input to the liquid crystal panel 102.

3 is a view illustrating in detail the first data compensator of FIG. 1.

As shown in FIGS. 1 and 3, the first data compensator 114 compensates the data input from the frame delay unit 112 shown in FIG. 1 to have a low luminance. 132 and a first selector illustrated in FIG. 1 by selectively outputting any one of data output from the first row data compensator 132 and data input from the frame delay unit 112. And a second selector 134 for supplying to 118.

In addition, the first data compensator 114 uses a horizontal sync signal Hsync supplied from an external system to count the number of times the high of the horizontal sync signal Hsync is input. 136, a first comparison unit 138 which generates a first comparison signal according to the comparison result by comparing the value counted from the horizontal synchronization counter 136 with the first reference line number, and the horizontal synchronization counter ( The second comparison unit 140 and the first and second comparison units 138 and 140 which generate a second comparison signal according to the comparison result by comparing the counted value from 136 with the number of second reference lines. Computing the first and second comparison signals generated in the) to generate a control signal according to the operation result and further includes a calculation unit 142 for supplying to the second selection unit 134.

In this case, the horizontal synchronization counter 136 performs the same operation as the horizontal counter (122 in FIG. 2) shown in FIG. 2, and the first and second comparators 138 and 140 also include the first shown in FIG. And the same operation as the second comparator 128 and 130 of FIG. 2.

The first row data compensator 132 makes the data input from the frame delay unit 112 have a low luminance. Data compensated for having low luminance by the first row data compensator 132 is supplied to the second selector 134. At this time, the data output from the frame delay unit 112 and the data compensated by the first row data compensator 132 are supplied to the second selector 134.

The first comparison unit 138 compares the value counted from the horizontal synchronization counter 132 with the number of first reference lines (for example, the 100th gate line) and generates a first comparison signal according to the comparison result. . When the counted value is larger than the first reference line number (the 100th gate line), the first comparator 138 generates a high first comparison signal. In addition, when the counted value is smaller than the first reference line number (the 100th gate line), the first comparator 138 generates a low first comparison signal. The low and high first comparison signals generated by the first comparator 138 are supplied to the calculator 142.

The second comparison unit 140 compares the value counted from the horizontal synchronization counter 132 with a second reference value (for example, the 600th gate line) and generates a second comparison signal according to the comparison result. When the value counted from the horizontal synchronization counter 132 is greater than the number of second reference lines (for example, the 600th gate line), the second comparator 140 receives the first high comparison signal. Create In addition, when the count value is smaller than the second reference line number (the 600 th gate line), the second comparator 140 generates a low second comparison signal. The low and high second comparison signals generated by the second comparator 140 are supplied to the calculator 142.

The calculator 142 calculates first and second comparison signals supplied from the first and second comparators 138 and 140, and supplies the calculated value to the second selector 132. The operation unit 142 generates a high control signal when the first and second comparison signals have the same logic, and low when the first and second comparison signals have the same logic. Generate a control signal of (Low). The high and low control signals generated by the calculator 142 are supplied to the second selector 134.

As described above, the second selector 134 is supplied with data output from the frame delay unit 112 and data compensated from the first row data compensator 132. According to a control signal generated by the calculator 142, the second selector 134 selects any one of data output from the frame delay unit 112 and data compensated from the first row data compensator 132. One data is selected and supplied to the first selection unit (118 in FIG. 1) shown in FIG. When a high control signal is supplied from the calculator 142, the second selector 134 selects data supplied from the first low data compensator 132 to the selector 118. Supply. In addition, when a low control signal is supplied from the calculator 142, the second selector 134 selects the delayed data from the frame delayer 112 to the first selector 118. Supply.

As a result, the second selector 134 alternately selects data supplied from an external system and data compensated for low luminance of the data according to a control signal supplied from the calculator 142 to select the first. Feed to section 118.

4 is a diagram illustrating in detail a second data compensator of FIG. 1.

As shown in FIGS. 1 and 4, the second data compensator 116 compensates for the data input from the frame delay unit 112 illustrated in FIG. 1 so as to have a low luminance. 144 and the first selector illustrated in FIG. 1 by selectively outputting any one of data output from the second row data compensator 144 and data input from the frame delay unit 112. And a third selector 146 for supplying to 118.

In addition, the second row data compensator 116 may include a pixel counter that counts the number of times the high of the data clock signal DCLK is input using the data clock signal DCLK supplied from an external system. 148 and a first comparison unit 150 for generating a first comparison signal according to the comparison result by comparing the value counted from the pixel counter 148 with the number of first reference lines, and the pixel counter 148. The second comparison unit 152 and the first and second comparison units 150 and 152 that compare the value counted from the number of second reference lines and generate the second comparison signal based on the comparison result. The operation unit 154 may further include an operation unit 154 configured to calculate the generated first and second comparison signals to generate a control signal according to the operation result, and supply the generated control signal to the third selector 146.

Since the components of the second data compensator 116 operate in the same manner as the components of the first data compensator 114, the description of the second data compensator 116 will be simplified. At this time, the second row data compensator 144 of the components of the second data compensator 116 is different from the first row data compensator 132 of the first data compensator (114 in FIG. 3). Decreases the brightness of the input data.

The pixel counter 148 counts the number of times the high pulse of the data clock signal DCLK supplied from an external system is input and the counted value is input to the first and second comparators 150 and 152. To supply. The number of data lines DL1 to DLm arranged in the liquid crystal panel 102 may be determined using the value counted by the pixel counter 148.

The first and second comparison units 150 and 152 compare the first and second reference values, which are preset in advance with the data supplied from the pixel counter 148, and compare the first and second comparison signals according to the comparison result. It is supplied to the operation unit 154. In this case, the first reference value may be, for example, the 150th data line, and the second reference value may be, for example, the 800th data line.

The operation unit 154 performs a logical operation on the first and second comparison signals supplied from the first and second comparison units 150 and 152 so as to be high when the first and second comparison signals are the same. Generates a control signal, and generates a low control signal when the first and second comparison signals are different from each other. The high and low control signals generated by the calculator 154 are supplied to the third selector 146. The third selector 146 alternates the data supplied from the frame delay unit 112 and the data compensated by the second row data compensator 144 according to the control signal supplied from the calculator 154. To the first selector 118 of FIG. 1.

The first selector 118 is delayed from the frame delayer 112 and the data supplied from the first and second data compensators 114 and 116 by a control signal supplied from the data selector 120. One of the data is selected and supplied to the data driver 106.

When the first selector 118 selects the first data compensator 114 by the control signal supplied from the data selector 120, it is as follows. Data having low luminance compensated by the first low data compensator 132 of the data compensator 114 is intersected with the data line positioned before the 100th gate line of the liquid crystal panel 102 of FIG. 1. The delayed data is supplied from the frame delay unit 112 to a data line intersected with a gate line positioned between the 100 th gate line and the 600 th gate line. In addition, data having low luminance compensated by the first row data compensator 132 may be supplied to a data line intersecting a gate line positioned after the 600th gate line.

As a result, an image corresponding to low luminance data is displayed on the upper and lower portions of the liquid crystal panel 102, and an image corresponding to data having uniform luminance is displayed on the central portion of the liquid crystal panel 102.

In contrast, when the first selector 118 selects the second data compensator 116 by a control signal supplied from the data selector 120, it is as follows. Data having low luminance compensated by the second row data compensator 144 of the second data compensator 116 is supplied to a data line positioned before the 150th data line of the liquid crystal panel 102 of FIG. 1. The delayed data is supplied from the frame delay unit 112 to a data line positioned between the 150 th data line and the 800 th data line. In addition, the third selector 146 is configured to supply data having low luminance compensated by the second row data compensator 144 to data lines positioned after the 800th data line.

As a result, an image corresponding to data having low luminance is displayed on the left and right sides of the liquid crystal panel 102, and an image corresponding to data having uniform luminance is displayed at the center of the liquid crystal panel 102.

In addition, when the first selector 118 selects the delayed data from the frame delayer 112 by the control signal supplied from the data selection control unit 120, the delayed data from the frame delayer 112. Is supplied to the data driver 106. Data supplied to the data driver 106 is converted into analog and displayed on the liquid crystal panel.

In this way, by determining the format of the data to be input from the outside and appropriately controlling the brightness of the data to be displayed on the liquid crystal panel according to the format of the data, it is possible to display an image with contrasts highlighted. In addition, the image quality may be improved by emphasizing the contrast of the image.

As described above, the liquid crystal display according to the present invention grasps the format of data to be input from the outside and appropriately controls the brightness of the data to be displayed on the liquid crystal panel according to the format of the data, thereby increasing the contrast-enhanced image. I can display it. In addition, the image quality may be improved by emphasizing the contrast of the image.

Although the present invention has been described with reference to the embodiments, those skilled in the art may variously modify and change the present invention without departing from the spirit and scope of the invention as set forth in the claims below. You will understand.

Claims (11)

A liquid crystal panel in which a plurality of gate lines and a plurality of data lines are arranged; An input unit for inputting pixel data to be input to the liquid crystal panel; A driving unit for driving the liquid crystal panel; And A data format adaptive data compensator for compensating pixel data input from the input part with data having low luminance at different ratios and selectively supplying any one of the pixel data and the compensated data from the input part to the driver Liquid crystal display comprising a. The method of claim 1, The data format adaptive data compensator, A data compensator for compensating the data of the pixel data from the input to have low luminance at different ratios; A first selector configured to select one of the pixel data from the input unit and the compensation data from the data compensator and supply the selected data to the driver; And Data selection for controlling the first selector by identifying a format of pixel data from the input unit using the number of gate lines and the number of data lines and generating a control signal according to the identified data format. And a control unit. The method of claim 1, And a frame retarder for delaying pixel data input from the input unit for one frame. The method of claim 2, The data selection control unit, A horizontal counter for counting the number of the plurality of gate lines using a horizontal synchronization signal supplied from the outside; A vertical counter for counting the number of the plurality of data lines by using a data clock signal supplied from an outside; A calculator configured to determine a ratio of the number of the plurality of data lines to the number of the plurality of gate lines by dividing a value counted from the horizontal counter and a value counted from the vertical counter; And And a comparison unit comparing the value calculated from the operation unit with a reference value and generating a control signal according to the comparison result. The method of claim 4, wherein And the reference value is a ratio of the number of the plurality of data lines and the number of the plurality of gate lines that determine the format of the pixel data input from the input unit. The method of claim 2, The data compensation unit, A low data compensator for compensating pixel data from the input unit to have a low luminance; A second selector configured to select any one of data compensated by the row data compensator and pixel data from the input unit and supply the selected data to the first selector; A counter for counting the signal supplied from the outside to calculate the counted value; A first comparison unit comparing the counted value from the counter with a first reference value and generating a first comparison signal according to the comparison result; A second comparing unit comparing the counted value from the counter with a second reference value and generating a second comparison signal according to the comparison result; And And a calculator configured to calculate the first and second comparison signals to generate a comparison signal for controlling the second selector. The method of claim 6, And the counter counts horizontal synchronization signals. The method of claim 6, And the first and second reference values are specific gate lines. The method of claim 6, And the counter counts a data clock signal. The method of claim 9, And the first and second reference values are specific data lines. A liquid crystal display device comprising: a liquid crystal panel including a plurality of gate lines and a plurality of data lines; an input unit for inputting pixel data to be input to the liquid crystal panel; and a driving unit for driving the liquid crystal panel. Compensating pixel data from the input unit with data having low luminance at different ratios: Selecting one of pixel data from the input unit and data of the compensated data; And And displaying an image corresponding to the selected data.

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