KR20080062422A - Thin film transistor and method of manufacturing the same, and liquid crystal display panel having the same - Google Patents

Abstract

A TFT(Thin Film Transistor) array substrate, a method of manufacturing the substrate and an LCD(Liquid Crystal Display) panel having the substrate are provided to form a passivation layer in a single-layer structure using cycle olefine organic material to reduce the number of manufacturing processes. A TFT array substrate includes a plurality of gate lines formed on a substrate(111) in one direction, a plurality of data lines intersecting the gate lines, and a TF(125A) formed at each of intersections of the gate lines and the data lines and connected to a corresponding gate line and a corresponding data line. The TFT includes a gate electrode(122), a source electrode(142) and a drain electrode(143). The TFT array substrate further includes a passivation layer(134) formed on the substrate using a cyclo olefine organic material, and a pixel electrode(151) formed on a portion of the passivation layer, which corresponds to each of pixel regions defined by the gate lines and the data lines.

Description

Thin film transistor substrate, method of manufacturing the same, and a liquid crystal display panel having the same {Thin film transistor and method of manufacturing the same, and liquid crystal display panel having the same}

1 is a schematic diagram of a liquid crystal display panel incorporating a gate driver.

2 is a cross-sectional view of a liquid crystal display panel with a built-in gate driver according to the present invention.

3 (a) to 3 (f) are cross-sectional views of devices sequentially shown to explain a method for manufacturing a thin film transistor substrate having a gate driver according to the present invention.

4 is a graph of I-V characteristics of a thin film transistor when a protective film is formed using a cycloolefin organic film and a protective film is formed using a silicon nitride film.

<Explanation of symbols for the main parts of the drawings>

10 and 300: liquid crystal display panel 11: source driver

12 and 500: gate driver 100: thin film transistor substrate

200: color filter substrate

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display (LCD), and more particularly, to a thin film transistor substrate for forming a protective film using a cyclo olefine organic film, a manufacturing method thereof, and a liquid crystal display panel having the same.

A liquid crystal display (LCD) displays a desired image on a panel of the liquid crystal display by adjusting the amount of light transmitted according to an image signal applied to a plurality of control switches arranged in a matrix. The liquid crystal display is classified into an amorphous silicon thin film transistor liquid crystal display device and a polysilicon thin film transistor liquid crystal display device depending on whether the active layer and the ohmic contact layer of the thin film transistor are formed of amorphous silicon or polysilicon. In the conventional amorphous silicon thin film transistor liquid crystal display, only the pixel portion is manufactured in the liquid crystal panel, and the driving circuit is later connected by tape automated bonding (TAB) or chip on glass (COG). On the contrary, in the polysilicon thin film transistor liquid crystal display, when the pixel portion is manufactured, a data driver circuit and a gate driver are integrated at the same time so that a separate driver circuit is not required.

By the way, in recent years, the gate driver is incorporated in the liquid crystal display panel in the amorphous silicon thin film transistor liquid crystal display device. That is, the recent amorphous silicon thin film transistor liquid crystal display device forms a gate driver in a non-display area of the thin film transistor substrate during the manufacturing process of the thin film transistor substrate. The gate driver includes a plurality of shift registers, each shift register including a plurality of thin film transistors. In this case, the plurality of thin film transistors constituting the shift register of the gate driver are formed by a process that proceeds simultaneously with the thin film transistor forming process of the display area.

After forming the thin film transistor, a double protective film of a silicon nitride film and an organic film is formed. When the passivation layer is formed using only spin-on-glass organic layers such as acryl or benzocyclobutane (BCB) and polysiloxane, the leakage current increases in the channel portion of the thin film transistor to generate a large amount of off current. Because of this, a whitening defect is generated, so that a silicon nitride film is formed under the organic film to prevent this.

When the double protective film of the silicon nitride film and the organic film is formed as described above, the process time increases as much as the silicon nitride film is formed. In addition, since the organic film and the silicon nitride film must be etched to expose the drain electrode of the thin film transistor, the etching time is increased by the silicon nitride film etching time.

SUMMARY OF THE INVENTION An object of the present invention is to provide a thin film transistor substrate, a method of manufacturing the same, and a liquid crystal display panel including the same, which forms a protective film that does not deteriorate the characteristics of the thin film transistor without forming a silicon nitride film.

Another object of the present invention is to provide a thin film transistor substrate, a method of manufacturing the same, and a liquid crystal display panel having the same, which can reduce an increased process time by forming a silicon nitride film without forming a silicon nitride film.

A thin film transistor substrate according to an embodiment of the present invention includes a plurality of gate lines extending in one direction on the substrate; A plurality of data lines extending to cross the gate lines; A thin film transistor formed at an intersection of the gate line and the data line and connected to the gate line and the data line and including a gate electrode, a source electrode, and a drain electrode; A protective film formed on the substrate including the gate line, the data line, and the thin film transistor by using a cycloolefin organic film; And a pixel electrode formed on the passivation layer in the pixel area defined by the gate line and the data line crossing each other.

The cycloolefin organic film is a material containing 70 to 80% of diethyleneglycon ethylmethyl ether, 10 to 20% of a cyclo olefine polymer, and other additives.

And a gate driver formed in a predetermined region on the substrate.

The gate driver includes a plurality of thin film transistors each including a gate electrode, a source electrode, and a drain electrode.

Each of the plurality of thin film transistors is connected to each other through an extension line of the source electrode or the drain electrode.

According to one or more exemplary embodiments, a method of manufacturing a thin film transistor substrate includes forming a gate electrode while simultaneously forming a plurality of gate lines extending in one direction on the substrate; Forming a gate insulating layer on the entire substrate and then forming an active layer on the gate electrode; Forming a source electrode and a drain electrode to partially overlap the upper portion of the gate electrode while forming a plurality of data lines that extend to intersect the gate line; Forming a protective film on the entire substrate using a cycloolefin organic film; And forming a pixel electrode on the passivation layer.

The cycloolefin organic film is formed by containing 70 to 80% of diethyleneglycon ethylmethyl ether, 10 to 20% of a cyclo olefine polymer, and other additives.

The method may further include forming a gate driver including a plurality of thin film transistors including a gate electrode, a source electrode, and a drain electrode in a predetermined region on the substrate.

A liquid crystal display panel according to an exemplary embodiment of the present invention includes a plurality of gate lines and data lines formed to be insulated from each other and intersected with each other, a protective film formed using a cycloolefin organic film formed on an entire upper portion, and a pixel electrode formed on the protective film. A thin film transistor substrate; A color filter substrate having a black matrix formed in a region corresponding to the gate line and a data line, a color filter formed in a region corresponding to a region in which the pixel electrode is formed, and a common electrode; And a liquid crystal layer formed between the thin film transistor substrate and the color filter substrate.

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention;

1 is a schematic configuration diagram of a liquid crystal display panel in which a gate driver to which the present invention is applied is incorporated.

Referring to FIG. 1, the liquid crystal display panel 300 includes a thin film transistor substrate 100 and a color filter substrate 200. The apparatus further includes a source driver 11 for driving the data line and a gate driver 12 for driving the gate line. A thin film transistor, a pixel electrode, and the like are formed on the thin film transistor substrate 100, and a common electrode and the like are formed on the color filter substrate 200. Also, in the liquid crystal display panel 300, the thin film transistor substrate 100 is formed larger than the color filter substrate 200, and an area where the thin film transistor substrate 100 and the color filter substrate 200 overlap each other is the display area A. FIG. The non-overlapping area becomes the non-display area B. The gate driver 12 includes a thin film transistor, which is a switching element that connects an external clock signal and a gate line, and a circuit for controlling the gate driver 12. The gate driver 12 is disposed on the thin film transistor substrate 100 in the non-display area B. FIG. Is implemented.

2 is a cross-sectional view of a liquid crystal display panel in which a gate driver according to the present invention is formed on a thin film transistor substrate in a non-display area.

Referring to FIG. 2, the liquid crystal display panel 300 includes a thin film transistor substrate 100 and a color filter substrate 200 facing each other, and a liquid crystal layer 260 positioned therebetween, and the thin film transistor substrate 100. The gate driver 12 is formed in an area that does not overlap the color filter substrate 200, that is, the non-display area B.

The thin film transistor substrate 100 includes a plurality of gate lines (not shown) extending in one direction on the first insulating substrate 111 in the display area A, and a plurality of data lines crossing the gate lines (not shown). (Not shown), a pixel electrode 151 formed in a pixel region defined by a gate line (not shown) and a data line (not shown), a gate line (not shown), a data line (not shown), and a pixel electrode A thin film transistor 125A connected to 151 and a storage line (not shown) are formed in parallel with the gate line (not shown) and include the storage electrode 123.

The first gate electrode 122 of the display area A is formed to partially protrude from the gate line (not shown). The source electrode 142 partially protrudes from the data line (not shown), and the drain electrode 143 is formed when the data line (not shown) is formed to be spaced apart from the source electrode 142 by a predetermined interval. The source electrode 142 and the drain electrode 143 are formed to partially overlap the gate electrode 122.

The first gate electrode 122, the source electrode 142, and the drain electrode 143 form a thin film transistor 125A. The thin film transistor 125A may receive data in response to a signal supplied to a gate line (not shown). The pixel signal supplied to the line (not shown) is charged in the pixel electrode 151. Accordingly, the first gate electrode 122 of the thin film transistor 125A is connected to a gate line (not shown), the source electrode 142 is connected to a data line (not shown), and the drain electrode 143 is a pixel electrode. 151 is connected. In addition, the thin film transistor 125 may include at least a gate insulating layer 131, an active layer 132, and an active layer 132 sequentially formed between the first gate electrode 122, the source electrode 142, and the drain electrode 143. It further includes an ohmic contact layer 133 formed on a portion. In this case, the ohmic contact layer 133 may be formed on the active layer 132 except for the channel portion.

The passivation layer 134 is formed over the entirety including the thin film transistor 125A. The protective film 134 is formed using a cyclo olefine organic film. The cycloolefin organic film is a material containing 70 to 80% of diethyleneglycon ethylmethyl ether, 10 to 20% of cyclo olefine polymer, and other additives. Cycloolefin has excellent adhesion, excellent barrier property against moisture penetrating from the outside, less vaporizing gas generated when the material is hardened, and excellent transmittance. Therefore, the whitening phenomenon due to the leakage current increase in the channel portion generated when the protective film is formed using a conventional acrylic or spin-on-glass material does not occur when the cycloolefin is used as the protective film 134. In addition, as shown in FIG. 4, the off current is lower than in the case of forming the passivation layer using the silicon nitride layer. In FIG. 4, "A" is an I-V characteristic curve of a thin film transistor when cycloolefin is formed as a protective film, and "B" is an I-V characteristic curve of a thin film transistor when a protective film is formed of a silicon nitride film.

The storage electrode 123 is included in a storage line (not shown) formed at the same time as the gate line (not shown). The storage electrode 123 forms a storage capacitor with the pixel electrode 151 formed through the contact hole 163 formed in a predetermined region of the passivation layer 134 and the gate insulating layer 131 interposed therebetween.

In addition, a gate line (not shown) including the first gate electrode 122 and a storage line (not shown) including the storage electrode 123 may include at least any one of Al, Nd, Ag, Cr, Ti, Ta, and Mo. It is preferably formed of one metal or an alloy containing them. In addition, the gate line (not shown) and the storage line (not shown) may be formed of a multilayer of a plurality of metal layers as well as a single layer. That is, it may be formed of a double layer including a metal layer such as Cr, Ti, Ta, Mo, etc. having excellent physicochemical properties and an Al-based or Ag-based metal layer having a low specific resistance. In addition, the above-described data line (not shown), the source electrode 142 and the drain electrode 143 may also be formed of the above-described metal, or may be formed of multiple layers.

The pixel electrode 151 is formed on the passivation layer 134 and is connected to the drain electrode 143 and the contact hole 161, and the storage electrode 123 is interposed between the gate insulating layer 131 through the contact hole 162. ) And storage capacitors. In addition, the pixel electrode 151 has a cutout pattern 152 as domain restricting means for adjusting the alignment direction of the liquid crystal. In addition, the pixel electrode 151 may include protrusions instead of the incision pattern 152 as domain regulating means for alignment of liquid crystal molecules. The cutting pattern 152 of the pixel electrode 151 is formed to divide the liquid crystal layer 260 into a plurality of domains together with the cutting pattern 252 of the common electrode 251 which will be described later.

In addition, the gate driver 12 is formed in the non-display area B of the thin film transistor substrate 100. The gate driver 12 includes the second gate electrode 124, the gate insulating layer 131, the active layer 132, A plurality of thin film transistors 125B including an ohmic contact layer 133, a source electrode 142, and a drain electrode 143 are formed, and the plurality of thin film transistors 125B include a source electrode 142 or a drain electrode 143. It extends and is connected to the drain electrode 143 or the source electrode 142 of the adjacent thin film transistor 125A. That is, the plurality of thin film transistors 125B of the non-display area B are connected to each other through the wiring 144, for example, the wiring 144 in which the drain electrode 143 of one thin film transistor 125B extends therefrom. Is connected to the source electrode 143 of the other thin film transistor 125B. Here, the second gate electrode 124 is simultaneously formed when a gate line (not shown) including the first gate electrode 122 and a storage line (not shown) including the storage electrode 123 of the display area A are formed. The thin film transistor 125B of the non-display area B is also formed at the same time when the thin film transistor 125A of the display area A is formed.

On the other hand, the color filter substrate 200 has a common electrode having a black matrix 221, a color filter 231, an overcoat layer 241, and a cutout pattern 252 on the second insulating substrate 211. 251.

The black matrix 221 generally distinguishes between red, green, and blue filters, and is formed by using an antireflective organic film to block direct light irradiation to the thin film transistors constituting the gate driver formed on the thin film transistor substrate 100. For example, the black matrix 221 is formed using a photosensitive organic material to which a pigment such as carbon black is added.

The color filter 231 is formed by repeating the red, green, and blue filters on the black matrix 221. The color filter 231 serves to impart color to light emitted from the light source and passing through the liquid crystal layer 260. The color filter 231 is formed of a photosensitive organic material.

The overcoat film 241 is formed on the black matrix 221 not covered by the color filter 231 and the color filter 231. The overcoat film 241 serves to protect the color filter 231 while planarizing the color filter 231 and is formed using an acrylic epoxy material.

The common electrode 251 is formed on the overcoat layer 241. The common electrode 251 is made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). The common electrode 251 directly applies a voltage to the liquid crystal layer 260 together with the pixel electrode 151 of the thin film transistor substrate. A cutting pattern 252 is formed on the common electrode 251. The common electrode cut pattern 252 divides the liquid crystal layer 260 into a plurality of domains along with the pixel electrode cut pattern 152 of the pixel electrode 151.

The pixel electrode cut pattern 152 and the common electrode cut pattern 252 may be formed in various shapes. For example, both the pixel electrode cutting pattern 152 and the common electrode cutting pattern 252 may be formed diagonally and orthogonally to each other.

In addition, the liquid crystal layer 260 is positioned between the thin film transistor substrate 100 and the color filter substrate 200. The liquid crystal layer 260 is, for example, a VA (vertically aligned) mode, and the liquid crystal molecules are vertical in the length direction when no voltage is applied. When voltage is applied, the liquid crystal molecules lie perpendicular to the electric field because the dielectric anisotropy is negative. However, if the pixel electrode incision pattern 152 and the common electrode incision pattern 252 are not formed, the liquid crystal molecules are arranged randomly in various directions because the azimuth angle of the lying down is not determined, and the foreground line at the boundary surface of which the orientation directions are different from each other. ) The pixel electrode cut pattern 152 and the common electrode cut pattern 252 form a fringe field when a voltage is applied to the liquid crystal layer 260 to determine the azimuth angle of the liquid crystal alignment. In addition, the liquid crystal layer 260 is divided into multiple regions according to the arrangement of the pixel electrode cutting pattern 152 and the common electrode cutting pattern 252.

3A to 3E are cross-sectional views of devices sequentially illustrated to explain a method of manufacturing a thin film transistor substrate according to an exemplary embodiment.

Referring to FIG. 3A, after forming a first conductive layer on an insulating substrate 111 made of glass, quartz, ceramic, or plastic, the first conductive layer is formed by a photo-etching process using a first mask. Pattern. As a result, a gate line (not shown) including the first gate electrode 122 and a storage line (not shown) including the storage electrode 123 are formed in the display area A, and the gate is formed in the non-display area B. FIG. The second gate electrode 124 constituting the driver 12 is formed. The first conductive layer is formed by a deposition method such as a CVD method, a PVD method, or a sputtering method, and the first conductive layer includes aluminum (Al), neodymium (Nd), silver (Ag), chromium (Cr), and titanium ( It is preferably formed of at least one metal of Ti), tantalum (Ta) and molybdenum (Mo) or an alloy containing them. In addition, the first conductive layer may be formed of not only a single layer but also multiple layers of a plurality of metal layers. That is, a double layer including a metal layer such as chromium (Cr), titanium (Ti), tantalum (Ta), and molybdenum (Mo) having excellent physicochemical properties, and an aluminum (Al) -based or silver (Ag) -based metal layer having a low specific resistance. It can also be formed. Meanwhile, the storage line (not shown) is formed between two gate lines (not shown) constituting the pixel area, and may be formed in the center between the gate lines (not shown), and is close to any one gate line (not shown). It may be formed to.

Referring to FIG. 3B, a gate insulating layer 131, a first semiconductor layer, and a second semiconductor layer are formed on the entire structure. Here, the gate insulating film 131 is formed using a PECVD method or a sputtering method. In this case, the gate insulating film 131 is preferably formed using an inorganic insulating film including a silicon oxide film or a silicon nitride film. The first semiconductor layer and the second semiconductor layer are sequentially formed on the gate insulating layer 131 using the deposition method. An amorphous silicon layer is used as the first semiconductor layer, and an amorphous silicon layer doped with a high concentration of silicide or N-type impurities is used as the second semiconductor layer. In addition, the first semiconductor layer and the second semiconductor layer are patterned to sufficiently cover the first gate electrode 122 of the display area A by a photolithography and an etching process using a second mask to form an active layer 132 and an ohmic contact layer ( 133). In this case, the active layer 132 and the ohmic contact layer 133 are also formed on the second gate electrode 124 of the non-display area B, which is formed in the same pattern as the pattern formed in the display area A. FIG.

Referring to FIG. 3C, after forming the second conductive layer on the entire structure, the second conductive layer is patterned by a photolithography and etching process using a third mask to form the source electrode 142 and the display region A in the display area A. FIG. The drain electrode 143 is formed and a data line (not shown) is formed. At the same time, the source electrode 142 and the drain electrode 143 for forming the gate driver 12 are also formed in the non-display area B. FIG. Here, the source electrode 142 and the drain electrode 143 of the display area A are formed to be spaced apart from each other by a predetermined interval on the first gate electrode 122, and this portion becomes a channel region. The channel region is also formed in the non-display area B in the same manner. The ohmic contact layer 133 is removed from the channel region, and the active layer 132 is partially etched. As a result, the thin film transistors 125A and 125B are formed in the display area A and the non-display area B. FIG. However, the thin film transistors 125B of the non-display area B are connected to each other by the wiring 144. The wiring 144 is connected to the source electrode 142 when the source electrode 142 and the drain electrode 143 are formed. Or extending from the drain electrode 143. For example, the source electrode 142 of the other thin film transistor 125B is connected by the wiring 144 extending from the drain electrode 143 of the thin film transistor 125B. Here, the same material as that used for forming the first conductive layer may be used as the second conductive layer.

Referring to FIG. 3 (d), a protective film 134 is formed on the entire structure. The protective film 134 is formed using a cyclo olefine organic film. The cycloolefin organic film is a material containing 70 to 80% of diethyleneglycon ethylmethyl ether, 10 to 20% of cyclo olefine polymer, and other additives. The contact hole 161 exposing a portion of the drain electrode 143 of the display area A and the gate insulating layer 131 over the storage electrode 123 are exposed by a photolithography and an etching process using a fourth mask. The hole 162 is formed.

Referring to FIG. 3E, a pixel electrode having a predetermined cutout portion 152 by forming a third conductive layer on the entire structure and patterning the third conductive layer by a photolithography and an etching process using a fifth mask. 151 is formed. The pixel electrode 151 is connected to the drain electrode 143 through the contact hole 162, and is formed on the storage electrode 123 through the contact hole 163 to form a storage capacitor. Here, it is preferable to use a transparent conductive film containing indium tin oxide (ITO) or indium zinc oxide (IZO) as the third conductive layer.

In the above embodiment, the thin film transistor substrate in which the gate driver is formed in the non-display area has been described as an example, but the present invention may be applied to various types of liquid crystal display panels that form a protective film.

As described above, according to the present invention, by forming a protective film using a cycloolefin organic film of a single film, the number of processes such as a silicon nitride film deposition process and an etching process can be reduced as compared with a conventional silicon nitride film and an organic film dual structure protective film.

Claims (9)

A plurality of gate lines extending in one direction on the substrate; A plurality of data lines extending to cross the gate lines; A thin film transistor formed at an intersection of the gate line and the data line and connected to the gate line and the data line and including a gate electrode, a source electrode, and a drain electrode; A protective film formed on the substrate including the gate line, the data line, and the thin film transistor by using a cycloolefin organic film; And And a pixel electrode formed on the passivation layer in a pixel area defined by the gate line and the data line crossing each other. The method of claim 1, wherein the cycloolefin organic film is 70 to 80% of diethyleneglycon ethylmethyl ether (Diethyleneglycon ethylmethyl ether), containing 10 to 20% of a cyclo olefin polymer (cyclo olefine polymer), and other additives Thin film transistor substrate that is a material. The thin film transistor substrate of claim 1, further comprising a gate driver formed in a predetermined region on the substrate. 4. The thin film transistor substrate of claim 3, wherein the gate driver comprises a plurality of thin film transistors each including a gate electrode, a source electrode, and a drain electrode. The thin film transistor substrate of claim 4, wherein each of the plurality of thin film transistors is connected to each other through an extension line of the source electrode or the drain electrode. Forming a gate electrode while simultaneously forming a plurality of gate lines extending in one direction on the substrate; Forming a gate insulating layer on the entire substrate and then forming an active layer on the gate electrode; Forming a source electrode and a drain electrode to partially overlap the upper portion of the gate electrode while forming a plurality of data lines that extend to intersect the gate line; Forming a protective film on the entire substrate using a cycloolefin organic film; And And forming a pixel electrode on the passivation layer. 7. The cycloolefin organic film of claim 6, wherein the cycloolefin organic film contains 70 to 80% of diethyleneglycon ethylmethyl ether, 10 to 20% of a cyclo olefine polymer, and other additives. The manufacturing method of the thin film transistor substrate to form. The method of claim 6, further comprising forming a gate driver including a plurality of thin film transistors including a gate electrode, a source electrode, and a drain electrode in a predetermined region on the substrate. A thin film transistor substrate including a plurality of gate lines and data lines formed to be insulated from each other and intersected with each other, a passivation layer formed using a cycloolefin organic layer formed over the entirety, and a pixel electrode formed over the passivation layer; A color filter substrate including a black matrix formed in a region corresponding to the gate line and a data line, a color filter formed in a region corresponding to the region in which the pixel electrode is formed, and a common electrode; And And a liquid crystal layer formed between the thin film transistor substrate and the color filter substrate.

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