KR20080061725A

KR20080061725A - Method for manufacturing array substrate of liquid crystal display

Info

Publication number: KR20080061725A
Application number: KR1020060136750A
Authority: KR
Inventors: 김용환
Original assignee: 엘지디스플레이 주식회사
Priority date: 2006-12-28
Filing date: 2006-12-28
Publication date: 2008-07-03

Abstract

The present invention provides a method for manufacturing an array substrate of a liquid crystal display device which prevents a short between the data line of the liquid crystal display device and the antistatic circuit portion.

It is formed by patterning a gate electrode, a gate line and a common electrode line on a substrate, forming a gate insulating layer on a substrate including a gator line, depositing a semiconductor layer on the gate insulating layer, and Depositing a conductive metal film on the substrate; forming a protective film on the substrate including the conductive metal film; forming a stepped portion by etching the protective film; Forming a prevention circuit portion.

Description

Array substrate manufacturing method of liquid crystal display device {METHOD FOR MANUFACTURING ARRAY SUBSTRATE OF LIQUID CRYSTAL DISPLAY}

1 is a block diagram schematically illustrating a conventional liquid crystal display.

FIG. 2 is an enlarged view of region A of the liquid crystal panel of FIG. 1.

3A and 3B are cross-sectional views taken along the line II ′ of FIG. 2.

4 is a plan view illustrating an array substrate of a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 5 is a cross-sectional view taken along line II-II ′ of FIG. 4.

6A through 6E are cross-sectional views of processes for describing a method of manufacturing an array substrate, according to an exemplary embodiment of the present invention.

(Explanation of symbols for the main parts of the drawing)

118: conductive metal film 119: data line

122: antistatic circuit portion 123: gate electrode

124: semiconductor layer 134: substrate

135: common electrode line 136: gate insulating layer

138: protective film 138a: stepped portion

The present invention relates to a liquid crystal display device, and more particularly, to a manufacturing method of a liquid crystal display device capable of preventing a short between a data line of the liquid crystal display device and an antistatic circuit.

In general, a liquid crystal display (LCD) arranges upper and lower substrates on which electric field generating electrodes are formed, and forms a liquid crystal layer between the two substrates, and then applies a voltage to the two electrodes. By moving the liquid crystal molecules of the liquid crystal layer by the generated electric field, it is a device for expressing the image by controlling the light transmittance that varies accordingly.

As shown in FIG. 1, the liquid crystal display device includes a liquid crystal panel 2 for displaying an image and a gate driver 4 for supplying scan signals for driving gate lines GL1 to GLn of the liquid crystal panel 2. ), A timing controller that generates control signals for controlling the data driver 6 and the gate driver 4 and the data driver 6 to supply a data signal to the data lines DL1 to DLm of the liquid crystal panel 2. (8) is provided.

The liquid crystal panel 2 is composed of an array substrate, a color filter substrate, and a liquid crystal layer formed therebetween.

The array substrate includes a plurality of gate lines GL1 to GLn, a plurality of data lines DL1 to DLm, a thin film transistor TFT formed on a pixel region defined by the intersection of these lines, and a pixel electrode.

The color filter substrate is opposite to the array substrate and includes color filters corresponding to the pixel electrodes, a black matrix formed between the color filters, color filters, and a common electrode formed on the black matrix.

In the liquid crystal panel configured as described above, a common electrode line 35 is disposed along the edge of the array substrate to induce a common voltage to the common electrode of the color filter substrate. The common electrode line 35 of the array substrate is connected to the common electrode of the color filter substrate by a doting process.

The gate driver 4 sequentially supplies the gate high voltage VGH to the gate lines GL1 to GLn in response to the gate signals GSP, GSC, and GOE provided from the timing controller 8.

The data driver 6 supplies the data signal to the data lines DL1 to DLm in response to the data control signals SSP, SSC, SOE, and POL provided from the timing controller 8.

The timing controller 8 generates gate control signals GSP, GSC, and GOE to control the gate driver 4, and generates data control signals SSP, SSC, SOE, and POL to generate the data driver 6. Will be controlled.

FIG. 2 is an enlarged view of region A of the liquid crystal panel of FIG. 1.

As shown in Fig. 2, a data line 19 is provided for supplying a data signal in the vertical direction. The common electrode line 35 is disposed to be perpendicular to the data line 19. An antistatic circuit part 22 is disposed between the data line 19 and the common electrode line 35 to protect the liquid crystal panel 2 from static electricity. Unexplained symbol P denotes a pixel.

The data line 19 is formed of molybdenum (Mo) material, and is formed in the second mask process during the array four mask process.

The common electrode line 35 is formed of a metal material such as a gate line (not shown), and when the gate line is formed through a mask process on a substrate (not shown) of the liquid crystal display device, the common electrode line 35 is simultaneously formed. ) Is formed.

The antistatic circuit part 22 is formed of the same metal material as the data line 19.

3A and 3B are cross-sectional views taken along the line II ′ of FIG. 2.

As shown in FIG. 3A, a gate electrode and a common electrode line (35 of FIG. 2) made of the same metal material as that of the gate electrode are formed on the substrate 34 through a four mask process, and the common electrode line (FIG. 2). A gate insulating layer 36 and a semiconductor layer 24 are formed on the substrate 35.

The data line 19 and the antistatic circuit part 22 are formed on the semiconductor layer 24 using molybdenum (Mo) material, and the protective layer 38 is formed on the data line 19. In this case, the process of forming the data line 19 is as follows.

A conductive metal film (not shown) is deposited on the semiconductor layer 24 of the substrate 34 to the entire surface, a photoresist (not shown) is applied on the conductive metal film, and an exposure and development process using a mask. The photoresist (not shown) is patterned through.

After the patterning of the photoresist is finished, the conductive metal film is etched through a wet etching process using the patterned photoresist as a mask. The etching process is a wet etching process in which the conductive metal film exposed by the patterned photoresist is etched by immersing the substrate 34 in an etching solution.

The data line 19 and the antistatic circuit part 22 may be formed through the etching process.

However, since the antistatic circuit part 22 is formed in a narrow space, the separation width between the data lines 19 is very narrow.

As shown in FIG. 3B, when the conductive metal film (eg, the remaining film 37) corresponding to the separation width is not completely removed by the wet etching process, the data line 19 and the antistatic circuit part 22 may be electrically connected. Can be shorted.

The remaining film 37 may be formed at a portion where a step occurs in the data line 19, the antistatic circuit unit 22, and the common electrode line (35 of FIG. 2). That is, the gate insulating layer 36 is formed on the common electrode line 35, and a step difference is formed between the common electrode line 35, the data line 19, and the antistatic circuit part 22 due to the gate insulating layer 36. Occurs.

As such, the residual film 37 may be generated at the portion where the step occurs.

When the data signal is supplied to the data line 19, the data signal may be supplied to the remaining film 37 made of the same material as the data line 19. As a result, the data signal to be supplied to the data line 19 is partially supplied to the remaining film 37, so that the desired data is not implemented in the liquid crystal panel (2 of FIG. 1).

That is, when the data signal is supplied through the data line 19 and the remaining film 37, the antistatic circuit part 22 made of the same material as the data line 19 and the remaining film 37 may be shorted with the data line 19. Can be.

Although not shown, the antistatic circuit part 22 and the common electrode line 35 are electrically connected to each other through a contact hole. As a result, when the data line 19 and the antistatic circuit part 22 are shorted due to the remaining film 37, the data signal supplied to the data line 19 flows to the common electrode line 35.

As a result, defects such as horizontal lines occur in the liquid crystal panel.

In addition, since the same voltage is applied to the pixel electrode and the common electrode so that no electric field is generated, the image is not displayed. That is, there is a problem in that the liquid crystal panel is malfunctioning, thereby reducing the quality of the product.

Accordingly, an object of the present invention is to provide an array substrate of a liquid crystal display device which prevents a short between the data line and the antistatic circuit part by manufacturing the data line of the liquid crystal display and the conductive metal film on which the antistatic circuit part is to be completely etched. It is to provide a manufacturing method.

Further technical problems to be achieved by the present invention are not limited to the above-mentioned technical problems, and other technical problems not mentioned above are clearly understood by those skilled in the art from the following description. It can be understood.

According to another aspect of the present invention, there is provided a method of manufacturing an array substrate of a liquid crystal display device, the method including: forming a gate electrode, a gate line, and a common electrode line on a substrate, and forming a gate on the substrate including the gate line Forming an insulating layer, depositing a semiconductor layer on the gate insulating layer, depositing a conductive metal film on the semiconductor layer, forming a protective film on the entire surface of the substrate including the conductive metal film, and forming the protective film. Etching to form a stepped portion, and etching the conductive metal film through the stepped portion to form a data line and an antistatic circuit portion on the semiconductor.

In this case, the step of forming the step portion in the protective film is characterized in that using a half-tone mask.

The step of forming the stepped portion in the protective film is characterized in that when the channel portion is formed on the gate electrode.

Etching the conductive metal film through the stepped part may include removing the stepped part by a known ashing process, and etching the conductive metal film using the removed stepped part as an etching barrier.

Etching the conductive metal film may be etched to expose the semiconductor layer.

Forming the protective film is characterized in that the thickness of the protective film is 2 to 3㎛.

The step of forming the stepped portion in the protective film is characterized in that the thickness of the stepped portion is 0.6 to 1.5㎛.

Specific details of other embodiments are included in the detailed description and the drawings. Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. Like reference numerals refer to like elements throughout.

Hereinafter, an array substrate of a liquid crystal display according to an exemplary embodiment of the present invention will be described with reference to the accompanying drawings.

As shown in FIG. 4, in the array substrate of the liquid crystal display according to the exemplary embodiment of the present invention, a data line 119 to which a data signal is supplied in a vertical direction is disposed, and the common electrode is perpendicular to the data line 119. Line 135 is disposed.

An antistatic circuit unit 122 is disposed between the data line 119 and the common electrode line 135 to protect the liquid crystal panel from static electricity.

Reference numeral P denotes a pixel.

The antistatic circuit unit 122 is usually electrically insulated from the common electrode line 135. In addition, when static electricity is generated, the antistatic circuit unit 122 is electrically connected to the common electrode line 135 to allow the static electricity flowing through the data line 119 to flow through the common electrode line 135. Protection).

In other words, the antistatic circuit unit 122 is formed of a predetermined transistor (not shown), and is not electrically connected due to the predetermined transistor (not shown) when the liquid crystal panel is normally driven.

The data line 119 is a conductive metal line made of molybdenum (Mo) material and is formed in a second mask process during an array four mask process.

The common electrode line 135 is formed of a gate metal such as a gate line, and the common electrode line 135 is formed at the same time when the gate line is formed through a mask process on a substrate (not shown) of the liquid crystal display.

The data line 119 and the antistatic circuit part 122 are also formed of a metal of the same material.

FIG. 5 is a cross-sectional view taken along line II-II ′ of FIG. 4.

As illustrated in FIG. 5, a common electrode line (not shown) formed of the same metal as the gate line and the gate electrode is formed on the substrate 134 through a four mask process, and the gate insulating layer 136 is formed on the common electrode line. ) And a semiconductor layer 124 are formed.

The data line 119 and the antistatic circuit part 122 are formed on the semiconductor layer 124 using a conductive metal film made of molybdenum (Mo) material.

The protective layer 138 is formed on the data line 119 and the antistatic circuit unit 122.

The process of forming the data line 119 and the antistatic circuit unit 122 of the array substrate configured as described above is as follows.

For reference, the process of forming the data line and the antistatic circuit part of the array substrate according to the embodiment of the present invention is performed at the same time when forming the thin film transistor of the array substrate. Therefore, in order to facilitate understanding, the thin film transistor forming portion of the array substrate is illustrated and described with reference to the same.

Referring first to FIG. 6A, a gate line, a gate electrode 123 connected to the gate line, and a common electrode line are patterned in parallel with the gate line as a conductive layer on the substrate 134.

The gate insulating layer 136 is entirely formed on the substrate 134 including the gate line.

Next, as illustrated in FIG. 6B, the semiconductor layer 124 is deposited on the gate insulating layer 136, and the conductive metal film 118 is formed on the semiconductor layer 124.

The conductive metal film 118 is made of molybdenum (Mo) material and is formed to a thickness of approximately 0.18 μm.

Next, as shown in FIG. 6C, a protective film 138 is formed on the entire surface of the substrate 134 including the conductive metal film 118.

At this time, the thickness h of the protective film 138 is about 2 to 3 μm.

Next, as shown in FIG. 6D, the step 138a is formed on the passivation layer 138 by exposing and developing the passivation layer 138 using the half-tone mask 200.

The thickness h1 of the stepped portion 138a is about 0.6 to 1.5 mu m.

For example, the half-tone mask 200 includes a substrate 210, a partial transmissive layer 220, and a blocking layer 230 formed thereon.

Here, the blocking layer 230 serves to block ultraviolet rays (UV), and the partial transmission layer 220 is positioned in an area where a thin film transistor (TFT) is to be formed and an area where a data line and an antistatic circuit part are to be formed, respectively. Partially transmits ultraviolet (UV) light. Accordingly, when the development is performed, the stepped portion 138a pattern lower than the overall thickness is formed in the passivation layer 138.

As described above, the step of using the half-tone mask 200 is performed at the same time as the channel part (ch in FIG. 6E) is formed on the thin film transistor TFT in the four mask process.

Next, as shown in FIG. 6E, the stepped portion 138a and the conductive metal film 118 are etched using the passivation layer 138 on which the stepped portion 138a is formed as an etch barrier, and the data line (i.e. 119 and the antistatic circuit portion 122 are formed.

First, the stepped portion 138a of the protective film 138 is removed by a known ashing process, and the exposed conductive metal film 118 is etched until the semiconductor layer 124 is exposed by a wet etching process. .

The data line 119 and the antistatic circuit unit 122 may be formed through the etching process.

In general, since the data line 119 and the antistatic circuit part 122 are formed in a narrow space, the separation width may be very narrow. As described in the previous step, the data line 119 is subjected to an etching process using a halftone mask. The residue of the protective film 138 does not remain between the antistatic circuit portion 122 and the conductive metal film 118 may be completely removed.

Therefore, an electrical short between the data line 119 and the antistatic circuit unit 122 can be prevented.

Although embodiments of the present invention have been described above with reference to the accompanying drawings, those skilled in the art to which the present invention pertains may implement the present invention in other specific forms without changing the technical spirit or essential features thereof. I can understand that.

Therefore, since the embodiments described above are provided to completely inform the scope of the invention to those skilled in the art, it should be understood that they are exemplary in all respects and not limited. The invention is only defined by the scope of the claims.

According to the method of manufacturing an array substrate of a liquid crystal display device according to the present invention, a stepped portion is formed by using a halftone mask on a protective film on the conductive metal layer, and the conductive metal layer is etched using the formed stepped portion as an etch barrier. And the residue of the conductive metal film remaining between the antistatic circuit portion and the antistatic circuit portion can be completely removed.

As a result, electrical short between the data line and the antistatic circuit part can be prevented, and the desired data can be supplied to the data line to implement desired data in the liquid crystal display. The quality of the liquid crystal display device can be improved.

Claims

Patterning and forming a gate electrode, a gate line, and a common electrode line on the substrate;

Forming a gate insulating layer on the substrate including the gator line;

Depositing a semiconductor layer on the gate insulating layer and depositing a conductive metal film on the semiconductor layer;

Forming a protective film on the entire surface of the substrate including the conductive metal film;

Etching the passivation layer to form a stepped portion;

Etching the conductive metal film through the stepped portion to form a data line and an antistatic circuit part on the semiconductor

Array substrate manufacturing method of the liquid crystal display device comprising a.

The method of claim 1,

And forming a stepped portion in the passivation layer using a half-tone mask.

The method of claim 1,

And forming a stepped portion in the passivation layer when the channel portion is formed on the gate electrode.

The method of claim 1,

Etching the conductive metal film through the stepped portion,

Removing the stepped portion by a known ashing process;

Etching the conductive metal layer using the removed stepped portion as an etch barrier

The method according to claim 1 or 4,

And etching the conductive metal film using wet etching.

The method according to claim 1 or 4,

The etching of the conductive metal layer may include etching the semiconductor layer to expose the semiconductor layer.

The method of claim 1,

And forming the passivation layer so that the thickness of the passivation layer is 2 to 3 μm.

The method of claim 7, wherein

The step of forming the stepped portion in the protective film is a method of manufacturing an array substrate of a liquid crystal display device, characterized in that the thickness of the single portion is 0.6 to 1.5㎛.

The method of claim 1,

The conductive metal film is a molybdenum (Mo) metal material, characterized in that the array substrate manufacturing method of the liquid crystal display device.