KR20080045290A - Plasma display device and plasma display panel drive method - Google Patents

Abstract

first transparent electrodes (12a); a first metal electrode (11) arranged in parallel to the first transparent electrodes and connected between the first transparent electrodes with a gap; second transparent electrodes (14a); a second metal electrode (13) arranged in parallel to the second transparent electrodes and connected between the second transparent electrodes with a gap; and a drive circuit for applying at least two types of sustain discharge voltage between a first electrodes containing the first transparent electrodes and the first metal electrodes and a second electrode containing the second transparent electrodes and the second metal electrode, so as to obtain a region where at least two types of sustain discharge spread and perform at least two types of sustain discharge in one field.

Description

Plasma Display Device and Plasma Display Panel Driving Method {PLASMA DISPLAY DEVICE AND PLASMA DISPLAY PANEL DRIVE METHOD}

The present invention relates to a plasma display device and a driving method of the plasma display panel.

The plasma display apparatus controls the number of pulses of sustain discharge in accordance with the display load ratio in order to set the power consumption to a predetermined value. Each subfield is set to a predetermined pulse number ratio and configured to have a luminance ratio of a predetermined value. However, when the total number of pulses changes, this luminance ratio cannot be maintained at a predetermined value. Generally, the number of sustain discharges is controlled to change the brightness, but there is also a method of changing the brightness of one sustain discharge itself (see Patent Document 1).

When the total number of pulses is reduced, the luminance ratio of each subfield cannot be maintained at a predetermined value. In particular, in the low gradation section, an error in the linearity (linearity) of the output with respect to the input signal becomes large. For this reason, there exists a possibility that the image quality of a low gradation part may deteriorate, and the linearity improvement is needed.

Patent Document 1: Japanese Patent No. 3499058

An object of the present invention is to maintain the linearity between the gradation value and the luminance and to maintain the high picture quality even when the number of sustain discharge pulses decreases.

According to one aspect of the present invention, there is provided a first transparent electrode, a first metal electrode disposed in parallel to the first transparent electrode, connected between the first transparent electrodes, and having a gap, and a second transparent electrode. A second metal electrode disposed in parallel to the second transparent electrode, connected between the second transparent electrodes, and having a gap, a first electrode including the first transparent electrode and the first metal electrode; By applying at least two types of sustain discharge voltages between the second transparent electrode and the second electrode including the second metal electrode, at least two types of sustain discharges can be provided, and at least 2 within one field. There is provided a plasma display device having a driving circuit for causing a kind of sustain discharge.

1 is a plan view showing a structural example of a plasma display panel according to an embodiment of the present invention.

2 is an exploded partial perspective view illustrating a structural example of a plasma display panel.

3 is a diagram illustrating a configuration example of a plasma display device.

4 is a diagram illustrating a configuration example of one field of an image.

5 is a diagram showing an example of voltage waveforms in the plasma display device;

6 is a diagram showing a discharge region in a medium range.

7 shows a wide discharge region.

8 is a waveform diagram of three types of sustain discharge pulses of the voltage of the X electrode and the voltage of the Y electrode in the sustain discharge period.

9 is a graph showing a relationship between display load ratio and luminance.

10 is a cross-sectional view of the front glass substrate.

FIG. 11 is a partially enlarged view of the front glass substrate of FIG. 10. FIG.

12 is a graph showing a relationship between sustain discharge pulse voltage and luminance.

13 is a diagram illustrating examples of first and second subfields.

14 is a diagram showing examples of first and second subfields after power constant control;

Fig. 15 is a diagram showing an example of voltage waveforms in the plasma display device.

3 is a diagram showing an example of the configuration of an AC plasma display device having a three-electrode structure according to an embodiment of the present invention. The power supply circuit 8 supplies a power supply voltage to the control circuit 7. The control circuit 7 controls the X drive circuit (hold drive circuit) 4, the Y drive circuit (scan drive circuit) 5, and the address drive circuit 6. The X drive circuit 4 includes a plurality of X electrodes (holding electrodes) X1, X2,... Supply a predetermined voltage. Hereinafter, the X electrodes X1, X2,... Each or these generic terms is referred to as the X electrode X. The Y drive circuit 5 includes a plurality of Y electrodes (scanning electrodes) Y1, Y2,... Supply a predetermined voltage. Y electrodes Y1, Y2,... Each or these generic names are referred to as Y electrode Y. The address driving circuit 6 includes a plurality of address electrodes A1, A2,... Supply a predetermined voltage. Hereinafter, address electrodes A1, A2,... Each or these generic names are referred to as address electrodes A. This three-electrode structure has an address electrode A, an X electrode X, and a Y electrode Y.

In the plasma display panel 3, the rows in which the X electrodes X and the Y electrodes Y extend in parallel in the horizontal direction are formed, and the columns in which the address electrodes A extend in the vertical direction are formed. The address electrode A is disposed to intersect the X electrode X and the Y electrode Y. The X electrodes X and the Y electrodes Y are alternately arranged in the vertical direction. The Y electrode Yi and the address electrode Aj form a two-dimensional matrix of i rows and j columns. The display cell C11 is formed by the intersection of the Y electrode Y1 and the address electrode A1 and the corresponding X electrode X1 adjacent thereto. This display cell C11 corresponds to the pixel. By this two-dimensional matrix, the plasma display panel 3 can display a two-dimensional image.

FIG. 2 is an exploded partial perspective view showing a structural example of the plasma display panel 3 of FIG. 3. The X electrode 11 is a bus electrode (metal electrode), and the X electrodes 12a and 12b are transparent electrodes. The set of X electrodes 11, 12a, 12b corresponds to one X electrode X in FIG. 3, and the same voltage is applied. In addition, the bus electrode has lower electrical resistance than the transparent electrode. The Y electrode 13 is a bus electrode, and the Y electrodes 14a and 14b are transparent electrodes. The set of Y electrodes 13, 14a, 14b corresponds to one Y electrode Y in FIG. 3, and the same voltage is applied. The address electrode 17 corresponds to the address electrode A in FIG. 3.

The X electrodes 11, 12a, 12b and the Y electrodes 13, 14a, 14b are formed on the front glass substrate 1. On it, a dielectric layer 15 for insulating the discharge space is deposited. The dielectric layer 15 is SiO ₂ formed on the front glass substrate 1 by the vapor phase growth method so as to cover the X electrodes 11, 12a, 12b and the Y electrodes 13, 14a, 14b. In addition, an MgO (magnesium oxide) protective layer 16 is deposited thereon.

On the other hand, the address electrode 17 is formed on the back glass substrate 2 arranged to face the front glass substrate 1. On it, a dielectric layer 18 is deposited. Further, phosphors 20 to 22 are deposited thereon. The partition walls 19 are disposed on both sides of the address electrode 17 on the rear glass substrate 2. On the inner surface of the partition wall 19, red, blue, and green phosphors 20 to 22 are arranged in a stripe shape and coated for each color. The phosphors 20 to 22 are excited by the sustain (sustain) discharge between the X electrodes 11, 12a and 12b and the Y electrodes 13, 14a and 14b to emit light of each color. Ne + Xe penning gas (discharge gas) or the like is enclosed in the discharge space between the front glass substrate 1 and the back glass substrate 2.

FIG. 1 is a plan view illustrating a structural example of the plasma display panel of FIG. 2. The X electrode 101x is constituted by the bus electrodes 11 and 11b and the transparent electrodes 12a and 12b. The transparent electrode 12b is disposed under the bus electrode 11. Transparent electrodes 12a are disposed on both sides of the bus electrode 11. The bus electrode 11 is disposed in parallel to the transparent electrode 12a, is connected between the transparent electrodes 12a, and has a gap dx1 and dx2. The transparent electrode 12a and the bus electrode 11 are connected by the bus electrode 11b at the position on the front glass substrate 1 on which the partition wall 19 is projected.

The Y electrode 101y is constituted by the bus electrodes 13 and 13b and the transparent electrodes 14a and 14b. Below the bus electrode 13, a transparent electrode 14b is disposed. Transparent electrodes 14a are disposed on both sides of the bus electrode 13. The bus electrode 13 is disposed in parallel to the transparent electrode 14a, is connected between the transparent electrodes 14a, and has a gap dy1 and dy2. The transparent electrode 14a and the bus electrode 13 are connected by the bus electrode 13b at a position on the front glass substrate 1 on which the partition wall 19 is projected.

The transparent electrodes 12a, 12b, 14a, 14b are, for example, ITO or nesa. The bus electrodes 11, 11b, 13, 13b are, for example, a three-layered structure of Cr-Cu-Cr or a metal electrode of Ag, and the front glass substrate (for the purpose of improving adhesion with the front glass substrate 1). A transparent electrode is formed between 1).

Since the bus electrodes 11b and 13b are black, the reflectance is reduced and the image quality can be improved by the effect of the black stripe. In addition, the electrodes 11b and 13b may be transparent electrodes instead of bus electrodes.

The space | interval (discharge slit) d between X electrode 101x and Y electrode 101y is 100 micrometers, for example. The gaps dx1 and dx2 between the transparent electrode 12a and the bus electrode 11 are 50 µm or more, and are smaller than the distance d between the X electrode 101x and the Y electrode 101y. Similarly, the gaps dy1 and dy2 between the transparent electrode 14a and the bus electrode 13 are 50 µm or more, and are smaller than the interval d between the X electrode 101x and the Y electrode 101y. The gaps dx1, dx2, dy1, and dy2 are preferably about 20 mu m narrower than the discharge slit d in order to clarify the difference from the discharge slit d. When the discharge slit d is 100 m, the gaps dx1, dx2, dy1 and dy2 are preferably 50 m or more and 80 m or less.

4 is a diagram illustrating a configuration example of one field of an image. One field may be, for example, a weighted first subfield 31, a second subfield 32,... And the tenth subfield 40. The number of subfields is, for example, 10 and is related to the number of gradation bits. Each field can display one image and is displayed at 60 fields / second, for example.

Each subfield 31 to 40 is composed of a reset period 41, an address period 42, and a sustain discharge (sustain discharge) period 43a or 43b. Hereinafter, sustain discharge period 43a or 43b is called sustain discharge period 43. As will be described later, the sustain discharge period 43 is at least two types of sustain discharge periods 43a or 43b. In the reset period 41, the display cell C11 and the like are initialized. In the address period 42, the light emission or non-emission of each display cell can be selected by the address discharge between the address electrode A and the Y electrode Y. Specifically, Y electrodes Y1, Y2, Y3, Y4,... The scan pulses are sequentially applied to the back and the like, the address pulses are applied to the address electrode A corresponding to the scan pulses, and the potential of the X electrode X is discharged between the Y electrodes Y, and Y By discharging between the X electrode X and the Y electrode Y with the discharge between the electrode Y and the address electrode A being terminated, the light emission or non-light emission of the desired display cell can be selected. In the sustain discharge period 43, sustain discharge is performed between the X electrode X and the Y electrode Y of the selected display cell to emit light. In each of the subfields 31 to 40, the number of times of light emission by the sustain discharge pulse between the X electrode X and the Y electrode Y (the length of the sustain discharge period 43) is different. Thereby, the gradation value can be determined.

5 is a diagram illustrating an example of a voltage waveform of the plasma display device. 4 shows examples of voltage waveforms in the reset period 41, the address period 42, and the sustain discharge period 43 in FIG. The voltage Vx is the voltage waveform of the X electrode X. The voltage Vy is the voltage waveform of the Y electrode Y. The voltage Va is the voltage waveform of the address electrode A.

First, the reset period 41 will be described. As the voltage Vx, the write voltage 50 and the adjustment voltage 51 are applied. In addition, as the voltage Vy, the write obtuse wave voltage 60 and the adjusted obtuse wave voltage 61 are applied. Thereby, between the X electrode X and the Y electrode Y, a write discharge and a regulated discharge for reset occur.

Next, the address period 42 will be described. As the voltage Vx, the scan voltage 52 is applied. In addition, the scan pulse 62 is applied as the voltage Vy. Specifically, Y electrodes Y1, Y2, Y3, Y4,... The scan pulse 62 is sequentially applied to the back and the like. In addition, as the voltage Va, the address pulse 90 is applied to the display cell to be selected in synchronization with the scan pulse 62 of each row. When the address pulse 90 is applied in response to the scan pulse 62, a discharge occurs between the Y electrode Y and the address electrode A. FIG. With the discharge as the termination, discharge occurs between the X electrode X and the Y electrode Y, and wall charges are generated in the vicinity of the X electrode X and the Y electrode Y.

In addition, another voltage waveform example of the address period 42 will be described. The address period 42 is divided into a first half address period and a second half address period. As the voltage Vy, the scan pulse 62 is sequentially applied only to the odd-numbered Y electrodes Y1, Y3, and the like in the first half address period, and the scan pulses (only sequentially to the even-numbered Y electrodes Y2, Y4, etc. in the subsequent half-address period. 62). In the first half address period, the scan voltage 52 is applied to the odd-numbered X electrodes X1 and X3 as the voltage Vx, and in synchronization with the scan pulses 62 of the odd-numbered Y electrodes Y1 and Y3 as the voltage Va, The address pulse 90 is applied to the display cell to be selected. In the latter address period, the scan voltage 52 is applied to the even-numbered X electrodes X2 and X4 as the voltage Vx, and the voltage Va is selected in synchronization with the scan pulses 62 of the even-numbered Y electrodes Y2 and Y4. The address pulse 91 is applied to the display cell.

Next, the sustain discharge period 43 will be described. As the voltage Vx, the first sustain discharge pulse 53, the repeat sustain discharge pulses 54 and 55 and the erase pulse 56 are applied. The repeated sustain discharge pulses 54 and 55 are repeatedly applied to pulses whose polarities are alternately inverted. In addition, as the voltage Vy, the first sustain discharge pulse 63, the repeated sustain discharge pulses 64 and 65, and the erase pulse 66 are applied. The repetitive sustain discharge pulses 64 and 65 are pulses inverted with respect to the repetitive sustain discharge pulses 54 and 55 which are alternately applied with pulses whose polarities are inverted alternately.

In the sustain discharge period 43, only display cells in which the address pulses 90 and 91 are applied in the address period 42 to generate wall charges can be discharged. The first sustain discharge pulses 53 and 63 cause a discharge between the X electrode X and the Y electrode Y. By this, sustain discharge is started.

In addition, the discharge is generated between the X electrode X and the Y electrode Y by the repeated sustain discharge pulses 54 and 64. Further, the discharge is generated between the X electrode X and the Y electrode Y by the repeated sustain discharge pulses 55 and 65. The discharge is repeated by the number of repeated sustain discharge pulses. This sustain discharge causes light emission.

In addition, the erase pulses 56 and 66 cause an erase discharge between the X electrode X and the Y electrode Y. By this erase discharge, the wall charges of the light emitting display cells are reduced to prevent the sustain discharge from occurring.

Next, at the beginning of the reset period 41, the obtuse wave voltage 58 is applied as the voltage Vx, and the pulse 68 is applied as the voltage Vy. Thereafter, the above-described reset period 41 is connected.

8 is a waveform diagram of three types of sustain discharge pulses of the voltage Vx of the X electrode and the voltage Vy of the Y electrode in the sustain discharge period 43 of FIG. It has a relationship of Vs1 < Vs2 < Vs3. For example, Vs3 is 85V, Vs2 is 80V, and Vs1 is 75V.

In the first sustain discharge, the voltage Vx is the sustain discharge pulse 801x and the voltage Vy is the sustain discharge pulse 801y. The sustain discharge pulses 801x and 801y are pulses in which the voltages Vs1 and -Vs1 are inverted alternately. A voltage of 2 x Vs1 is applied between the X electrode and the Y electrode to discharge it. When low sustain sustain pulses 801x and 801y are applied, as shown in Fig. 1, discharge regions 25 to 27 are formed. The discharge regions 25 to 27 widen only between the X transparent electrode 12a and the Y transparent electrode 14a adjacent to the discharge slit d to form a narrow discharge region.

In the second sustain discharge, the voltage Vx is the sustain discharge pulse 802x and the voltage Vy is the sustain discharge pulse 802y. The sustain discharge pulses 802x and 802y are pulses in which the voltages Vs2 and -Vs2 are inverted alternately. A voltage of 2 x Vs2 is applied between the X electrode and the Y electrode to discharge it. When the sustain discharge pulses 802x and 802y of the medium voltage are applied, as shown in Fig. 6, the discharge regions 25 to 27 are formed. The discharge regions 25 to 27 widen to a region including the transparent electrodes 12a and 14a and the bus electrodes 11 and 13 adjacent to the discharge slit d to form a medium range discharge region.

In the third sustain discharge, the voltage Vx is the sustain discharge pulse 803x and the voltage Vy is the sustain discharge pulse 803y. The sustain discharge pulses 803x and 803y are pulses whose voltages Vs3 and -Vs3 alternately invert. A voltage of 2 x Vs3 is applied between the X electrode and the Y electrode to discharge. When the high-voltage sustain discharge pulses 803x and 803y are applied, as shown in Fig. 7, discharge regions 25 to 27 are formed. The discharge regions 25 to 27 are widened to the entire regions of the X electrode 101x and the Y electrode 101y to form a wide discharge region.

By applying three types of sustain discharge pulses between the X electrode and the Y electrode, as shown in FIGS. 1, 6, and 7, three types of sustain discharges are provided so that three types of sustain discharges are provided. It can be done.

12 is a graph showing the relationship between the sustain discharge pulse voltage and the luminance. The horizontal axis represents the absolute value of the sustain discharge pulse voltage of FIG. 8. Solid lines show the characteristics of the plasma display panel shown in FIG. 1, and broken lines show the characteristics when the X electrodes 101x and Y electrodes 101y of FIG. 1 are integrated without gaps dx1, dx2 and gaps dy1, dy2, respectively. Indicates.

In the broken line, since the bus electrode and the transparent electrode are continuously connected in the discharge space, and there is no separation of the discharge, the luminance is increased by the increase in the discharge and the increase in the discharge intensity due to the increase in the sustain discharge pulse voltage. As a result, the luminance changes continuously (linearly) with respect to the sustain discharge pulse voltage.

In the solid line, since the X electrode 101x and the Y electrode 101y have gaps dx1, dx2, and gaps dy1, dy2, respectively, the characteristics change stepwise in three steps shown in FIGS. 1, 6, and 7. When the sustain discharge pulse is ± Vs1, it has discharge regions 25 to 27 shown in Fig. 1, and the luminance is substantially constant at the sustain discharge pulse voltage in the vicinity thereof. Similarly, when the sustain discharge pulse is ± Vs2, it has discharge regions 25 to 27 shown in Fig. 6, and the luminance is substantially constant at the sustain discharge pulse voltage in the vicinity thereof. Similarly, when the sustain discharge pulse is ± Vs3, the discharge regions 25 to 27 shown in Fig. 7 are provided, and the luminance is almost constant at the sustain discharge pulse voltage in the vicinity thereof. The increase in luminance is only an increase in the discharge intensity due to the sustain discharge pulse voltage increase in each step, and the change is small. Even if the space | interval of discharge slit d fluctuates by manufacture variation, the change of brightness | luminance is small and a nonuniformity becomes small. On the other hand, in the case of a broken line, the brightness change by the fluctuation | variation of the space | interval of discharge slit d becomes large. Further, in the solid line, the enlargement of the discharge is stepped by the gaps dx1, dx2, dy1, and dy2 of the transparent electrode and the bus electrode, and the luminance can be clearly separated by the sustain discharge pulse voltage.

FIG. 10 is a cross-sectional view of the front glass substrate 1 of FIG. 2, and FIG. 11 is a partially enlarged view of the front glass substrate 1 of FIG. 10. The discharge slit d is a slit between the transparent substrate 12a of the X electrode and the transparent electrode 14a of the Y electrode, and is 100 μm, for example. The dielectric layer 15 is SiO ₂ formed by the vapor phase growth method.

As indicated by the broken line in FIG. 11, the electric field on the surface of the dielectric layer 15 is widened in proportion to the thickness T1 of the dielectric layer 15. The electrode 12a has a width W1 electric field wider on the surface of the dielectric layer 15 to constitute a virtual electrode. Similarly, the electrodes 11 and 12b have a wide W3 electric field on the surface of the dielectric layer 15 to form a virtual electrode. If the dielectric layer 15 is formed by the vapor phase growth method, the thickness T1 can be made thinner than 10 mu m. As a rule of thumb, if there is an interval W2 of about 30 mu m on the surface of the dielectric layer 15, the discharge between the electrode 12a and the electrodes 11, 12b can be separated. Therefore, when the thickness T1 of the dielectric layer 15 is 10 micrometers, it is preferable that the space | interval dx1, dx2, dy1, dy2 of each bus electrode and each transparent electrode shall be 50 micrometers or more. When discharge slit d is 100 micrometers, 80 micrometers or less are preferable for the clearance gap dx1, dx2, dy1, dy2 of each bus electrode and each transparent electrode. For example, the discharge slit d is 100 m, the thickness T1 of the dielectric layer 15 is 10 m, the gaps dx1, dx2, dy1, dy2 are 50 m, the widths W1 and W3 are 10 m, and the interval W2 is 30 m, respectively. The thickness of the bus electrodes 11 and 13 is 2 to 3 µm, for example. This dimension is an example and is not limited to this.

9 is a graph showing the relationship between the display load ratio and the luminance. The characteristic 901 is a characteristic when the sustain discharge pulse voltage is ± Vs1. The characteristic 902 is a characteristic when the sustain discharge pulse voltage is ± Vs 2. The characteristic 903 is a characteristic when the sustain discharge pulse voltage is ± Vs3.

The control circuit 7 detects the display load factor in accordance with the input image signal. The display load ratio is detected based on the number of pixels to emit light and the gradation value of the pixels to emit light. For example, when all the pixels of an image are displayed at the maximum gradation value, the display load factor is 100%. In addition, when all the pixels of an image are displayed at 1/2 of the maximum gradation value, the display load factor is 50%. Further, even when only half of the images (50%) of the pixels are displayed at the maximum gradation value, the display load factor is 50%.

The control circuit 7 determines the total number of sustain discharge pulses of one field applied to the X electrode and the Y electrode so that the electric power becomes constant based on the display load ratio. Specifically, when the display load ratio becomes more than a predetermined value, the total number of sustain discharge pulses in one field is reduced so that the power becomes constant. As a result, the luminance is lowered when the display load ratio is at least a predetermined value.

13 is a diagram illustrating examples of the second subfield 1301 and the first subfield 1302. For example, the second subfield 1301 corresponds to the second subfield 32 of FIG. 4, and the first subfield 1302 corresponds to the first subfield 31 of FIG. 4. For example, when the display load ratio is less than the predetermined value, the second subfield 1301 has eight sustain discharge pulses, and the first subfield 1302 has four sustain discharge pulses. The sustain discharge pulses in the subfields 1301 and 1302 are all the same sustain discharge pulse voltage, for example, ± Vs3. The luminance ratio of the second subfield 1301 and the first subfield 1302 is 8: 4 = 2: 1. That is, the first subfield 1302 may express the luminance of half of the second subfield 1301. Thereby, it is possible to have linearity between the gradation value and the luminance.

FIG. 14 is a diagram illustrating examples of the second subfield 1401 and the first subfields 1402 and 1403 after the above-described power constant control. For example, the second subfield 1401 corresponds to the second subfield 32 of FIG. 4, and the first subfields 1402 and 1403 correspond to the first subfield 31 of FIG. 4. . When the display load ratio is higher than or equal to the predetermined value by the power constant control, for example, the number of sustain discharge pulses in the second subfield 1401 decreases from eight to seven. The sustain discharge pulses in the second subfield 1401 are all the same sustain discharge pulse voltages, for example, ± Vs3. At this time, 3.5 sustain discharge pulses are required to express the luminance of half of the second subfield 1401 by the first subfield. However, only the sustain discharge pulses of ± Vs3 cannot realize 3.5 sustain discharge pulses.

The first subfield 1402 has four sustain discharge pulses. The first three sustain discharge pulses are sustain discharge pulses of ± Vs3, and the last one sustain discharge pulses are sustain discharge pulses of ± Vs1. The luminance of the sustain discharge pulse of ± Vs1 is about half of the luminance of the sustain discharge pulse of ± Vs3. Therefore, the first subfield 1402 can realize the luminance of half of the second subfield 1401. The drive circuits 4 and 5 cause at least two types of sustain discharges to be performed in one subfield. For example, as shown in FIG. 15, the sustain discharge pulses 54 and 64 are ± Vs3, and the sustain discharge pulses 55 and 65 are ± Vs1. As described above, even when the total sustain discharge pulses in one field are reduced by the power constant control, the linearity between the gradation value and the luminance can be maintained, and the image quality can be improved. In particular, in the low gradation portion having a small number of sustain discharge pulses, the linearity tends to collapse, so the effect of improving the image quality in the low gradation portion is large.

In addition, the position of the sustain discharge pulse of +/- Vs1 is not limited to the last, and may be anywhere. In addition, the combination of ± Vs1, ± Vs2 and ± Vs3 is free.

The first subfield 1403 shows another example, and has seven sustain discharge pulses. All sustain discharge pulses in the first subfield 1403 are sustain discharge pulses of ± Vs1. The luminance of the sustain discharge pulse of ± Vs1 is about half of the luminance of the sustain discharge pulse of ± Vs3. Therefore, the first subfield 1403 can realize the luminance of half of the second subfield 1401. The drive circuits 4 and 5 cause one type of sustain discharge to be performed in each subfield. For example, in the second subfield 1401, sustain discharge is caused by one type of sustain discharge pulse of ± Vs3, and in the first subfield 1403, one kind of sustain discharge pulse of ± Vs1 is performed. Sustain discharge is performed.

The first subfield 31 of FIG. 4 has a sustain discharge period 43a when the display load factor is small, and has a sustain discharge period 43b when the display load factor is large. The sustain discharge period 43a corresponds to the first subfield 1302 of FIG. 13. The sustain discharge period 43b corresponds to the first subfield 1402 or 1403 of FIG. 14.

According to this embodiment, the drive circuits 4 and 5 apply an at least two types of sustain discharge pulse voltages between the X electrode and the Y electrode, thereby providing a region in which at least two types of sustain discharges are widened. At least two types of sustain discharges are caused to occur.

The plasma display panel 3 forms a gap between the bus electrode and the transparent electrode in the display cell which discharges. The bus electrode and the transparent electrode are connected by the bus electrode at the position where the partition wall is projected. By changing the sustain discharge pulse voltage, the enlargement of the discharge region is stepped with respect to the sustain discharge pulse voltage, and the luminance (brightness) is changed step by step. In the subfield with a small weight (less number of sustain discharge pulses), the sustain discharge pulse voltage is lowered, and the discharge which has narrowed the enlargement of the discharge region is used, and the division of luminance is reduced. As a result, the linearity between the gradation value and the luminance can be improved. By the constant power control, even when the total number of sustain discharge pulses in one field decreases, the linearity between the gradation value and the luminance can be maintained, and in particular, the image quality of the low gradation portion can be improved.

In Fig. 1, the X electrode 101x can be sustained with respect to the Y electrodes 101y adjacent to both sides, and the Y electrode 101y can also be sustained with respect to the X electrodes 101x adjacent to both sides. . The X electrode 101x may be configured to allow sustain discharge only for the Y electrode 101y adjacent to the lower side. In this case, the transparent electrode 12a adjacent to the upper side of the bus electrode 11 can be deleted, and the transparent electrode 14a adjacent to the lower side of the bus electrode 13 can be deleted.

The plasma display device of the present embodiment can be applied to an A / C type plasma display device used for a display device such as a personal computer or a workstation, a flat wall-mounted television, a display for display of advertisements or information.

In addition, all the said embodiment is only what showed the example of embodiment in implementing this invention, and the technical scope of this invention should not be interpreted limitedly by these. That is, the present invention can be implemented in various forms without departing from the technical idea or the main features thereof.

Even when the total number of sustain discharge pulses in one field decreases, the linearity between the gradation value and the luminance can be maintained and the image quality can be maintained.

Claims (16)

A first transparent electrode, A first metal electrode disposed in parallel to the first transparent electrode, connected to the first transparent electrode, and having a gap; A second transparent electrode, A second metal electrode disposed in parallel to the second transparent electrode, connected between the second transparent electrode, and having a gap; At least two types of sustain discharge voltages are applied between the first electrode including the first transparent electrode and the first metal electrode, and the second electrode including the second transparent electrode and the second metal electrode. A drive circuit having a region in which a kind of sustain discharge is widened and causing at least two types of sustain discharges in one field Plasma display device comprising a. The method of claim 1, A first substrate on which the first and second electrodes are disposed; A second substrate facing the first substrate, A third electrode disposed on the second substrate to intersect the first and second electrodes, Barrier ribs disposed on both sides of the third electrode on the second substrate; Plasma display device further comprising. The method of claim 2, The first transparent electrode and the first metal electrode are connected at a position on the first substrate on which the partition wall is projected, and the second transparent electrode and the second metal electrode are on the first substrate on which the partition wall is projected. And a plasma display device. The method of claim 3, And the first transparent electrode and the first metal electrode are connected by a metal electrode, and the second transparent electrode and the second metal electrode are connected by a metal electrode. The method of claim 3, And a dielectric layer of SiO ₂ formed by vapor deposition to cover the first and second electrodes on the first substrate. The method of claim 3, The gap between the first transparent electrode and the first metal electrode is 50 µm or more, and is smaller than the gap between the first and second electrodes, The gap between the second transparent electrode and the second metal electrode is 50 µm or more and narrower than the gap between the first and second electrodes. The method of claim 1, The one field is composed of a plurality of weighted subfields, And the drive circuit causes at least the two types of sustain discharge to be performed in one subfield. The method of claim 1, The one field is composed of a plurality of weighted subfields, And said drive circuit causes said one type of sustain discharge to be performed in each subfield. A first transparent electrode, A first metal electrode disposed in parallel to the first transparent electrode, connected to the first transparent electrode, and having a gap; A second transparent electrode, A driving method of a plasma display panel which is disposed in parallel to the second transparent electrode, is connected between the second transparent electrode, and has a second metal electrode having a gap. At least two types of sustain discharge voltages are applied between the first electrode including the first transparent electrode and the first metal electrode, and the second electrode including the second transparent electrode and the second metal electrode. And a driving step of having a region in which a kind of sustain discharge is widened, and causing at least two types of sustain discharges in one field. The method of claim 9, The plasma display panel, A first substrate on which the first and second electrodes are disposed; A second substrate facing the first substrate, A third electrode disposed on the second substrate to intersect the first and second electrodes, Barrier ribs disposed on both sides of the third electrode on the second substrate; The driving method of the plasma display panel further comprising. The method of claim 10, The first transparent electrode and the first metal electrode are connected at a position on the first substrate on which the partition wall is projected, and the second transparent electrode and the second metal electrode are the first substrate on which the partition wall is projected. A method of driving a plasma display panel, characterized in that connected at the above position. The method of claim 11, And the first transparent electrode and the first metal electrode are connected by a metal electrode, and the second transparent electrode and the second metal electrode are connected by a metal electrode. The method of claim 11, The plasma display panel further comprises a dielectric layer of SiO ₂ formed by vapor phase growth on the first substrate to cover the first and second electrodes. The method of claim 11, The gap between the first transparent electrode and the first metal electrode is 50 µm or more, and is smaller than the gap between the first and second electrodes, The gap between the second transparent electrode and the second metal electrode is 50 µm or more and narrower than the gap between the first and second electrodes. The method of claim 9, The one field is composed of a plurality of weighted subfields, And the driving step causes at least the two types of sustain discharge to be performed in one subfield. The method of claim 9, The one field is composed of a plurality of weighted subfields, And said driving step causes said one type of sustain discharge to be performed in each subfield.

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