KR20080035809A - Thin film transistor panel - Google Patents

Abstract

A TFT(Thin Film Transistor) display panel is provided to reduce an intersection between data lines and storage electrode lines into one, thereby minimizing possibility that short between the data line and the storage electrode wires is generated. A gate line(129) is formed on an insulating substrate. Storage electrode wires(133a,133b,133c,133d,133e) are formed on the insulating substrate and disposed between neighboring gate lines. A data line(171) crosses the gate line and the storage electrode wires as being insulated with the gate line and the storage electrode wires. A TFT is connected with the gate line and the data line. A pixel electrode(191) is electrically connected with the TFT. An intersection between the storage electrode line and the data line is less than one.

Description

Thin Film Transistor Display Panels {THIN FILM TRANSISTOR PANEL}

1 is a layout view of a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 2 is a layout view illustrating a structure of a thin film transistor array panel for a liquid crystal display of FIG. 1.

FIG. 3 is a layout view of a common electrode display panel for the liquid crystal display of FIG. 1.

4 is a cross-sectional view of the liquid crystal display of FIG. 1 taken along the line IV-IV.

5 is a cross-sectional view of the liquid crystal display of FIG. 1 taken along the line V-V.

Explanation of reference numbers

3: liquid crystal layer 11, 21: alignment film

12, 22: polarizer 31: liquid crystal molecules

71-72b, 91-92b: incisions 81, 82: contact aid member

100: thin film transistor array panel 110: insulating substrate

121 and 129: gate line 124: gate electrode

131: stem line 133a-133d: sustain electrode

133e: connector 140: gate insulating film

151, 154: semiconductor

161, 163, and 165: ohmic contact members

171 and 179: data line 173: source electrode

175, 175a, 175b, and 175c: drain electrode

180: shield

181, 182, 183a, 183b, 185: contact hole

191: pixel electrode

200: common electrode display panel 210: insulating substrate

220: light blocking member 230: color filter

250: overcoat 270: common electrode

The present invention relates to a thin film transistor array panel, and more particularly, to a thin film transistor array panel for a liquid crystal display device.

In general, a thin film transistor (TFT) is used as a switching element for driving each pixel independently in a flat panel display such as a liquid crystal display or an organic light emitting display. The thin film transistor array panel including the thin film transistor includes a scan signal line (or gate line) for transmitting a scan signal to the thin film transistor and a data line for transmitting a data signal, in addition to the thin film transistor and the pixel electrode connected thereto.

The thin film transistor includes a gate electrode connected to the gate line, a source electrode connected to the data line, a drain electrode connected to the pixel electrode, and a semiconductor positioned on the gate electrode between the source electrode and the drain electrode. The data signal from the data line is transferred to the pixel electrode in accordance with the scan signal from the.

Meanwhile, in the thin film transistor array panel, each pixel must maintain a constant voltage for a certain period of time. Therefore, capacitors are formed in each pixel to display charges for a certain period even in the non-selection period.

In order to form such a capacitor, a sustain electrode line (first electrode) / insulating film (dielectric) / pixel electrode (second electrode) can be formed by stacking.

However, the storage electrode line is formed on the same layer as the gate line by a separate wiring and intersects the plurality of data lines. If metal residue is present at the intersection with the data line, a short may occur with the data line.

Therefore, the technical problem to be achieved by the present invention is to minimize the short circuit between the sustain electrode line and the data line.

According to an exemplary embodiment of the present invention, a thin film transistor array panel is insulated from and crosses a gate line formed on an insulating substrate, a storage electrode wiring formed on the insulating substrate, and positioned between neighboring gate lines. And a thin film transistor connected to the data line, the gate line and the data line, and a pixel electrode electrically connected to the thin film transistor, and the intersection point between the sustain electrode wiring and the data line is one or less.

The sustain electrode wiring extends from both ends of the stem line and the stem line parallel to the gate line, and intersects the first sustain electrode and the second sustain electrode and the first sustain electrode and the second sustain electrode positioned opposite to the data line, and intersect the first sustain electrode and the second sustain electrode. It may include a connecting portion for connecting.

The connection part may be located at a center line between neighboring gate lines.

The storage electrode wiring includes a third storage electrode extending obliquely from the center of the first storage electrode to the upper direction of the second storage electrode and a fourth storage electrode extending obliquely from the center of the first storage electrode to the lower direction of the second storage electrode. It may include.

The pixel electrode may include a cutout that overlaps the third storage electrode and the fourth storage electrode.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, area, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

Next, a liquid crystal display according to an exemplary embodiment of the present invention will be described with reference to the drawings.

1 is a layout view of a liquid crystal display according to an exemplary embodiment of the present invention, FIG. 2 is a layout view showing a structure of a thin film transistor array panel for the liquid crystal display of FIG. 1, and FIG. 3 is a common view for the liquid crystal display of FIG. 1. FIG. 4 is a cross-sectional view illustrating the liquid crystal display of FIG. 1 taken along the line IV-IV, and FIG. 5 is a cross-sectional view illustrating the liquid crystal display of FIG. 1 taken along the line VV.

The liquid crystal display according to the present exemplary embodiment includes a thin film transistor array panel 100 and a common electrode panel 200 facing each other, and a liquid crystal layer 3 interposed between the two display panels 100 and 200.

First, the thin film transistor array panel 100 will be described in detail with reference to FIGS. 1, 2, 4, and 5.

A plurality of gate lines 121 and a plurality of storage electrode wires 131, 133a, 133b, 133c, 133d, and 133e are formed on an insulating substrate 110 made of transparent glass or plastic. It is.

The gate line 121 transmits a gate signal and mainly extends in a horizontal direction. Each gate line 121 includes a plurality of gate electrodes 124 protruding up and down and a wide end portion 129 for connection with another layer or an external driving circuit. A gate driving circuit (not shown) for generating a gate signal may be mounted on a flexible printed circuit film (not shown) attached to the substrate 110 or directly mounted on the substrate 110, It may be integrated into the substrate 110. When the gate driving circuit is integrated on the substrate 110, the gate line 121 may extend to be directly connected to the gate driving circuit.

The storage electrode wiring receives a predetermined voltage, and connects the stem line 131 extending substantially in parallel with the gate line 121, the plurality of storage electrode sets 133a, 133b, 133c, and 133d and the connecting portion 133e that are separated therefrom. Include. Each of the storage electrode wires is positioned between two adjacent gate lines 121, and the stem line 131 is close to the upper gate line 121 of the two gate lines 121.

Each of the storage electrode sets 133a to 133d extends in a diagonal direction from the first and second storage electrodes 133a and 133b extending in the longitudinal direction from both ends of the stem line 131, respectively, and the first storage electrode 133a. And third and fourth sustain electrodes 133c and 133d connecting the second and second sustain electrodes 133b to each other.

The first storage electrode 133a has a fixed end connected to one end of the stem line 131 and a free end positioned at the opposite side thereof and having a protrusion. The second storage electrode 133b is connected to the other end of the stem line 131.

The third storage electrode 133c is connected to an opposite side not connected to the stem line 131 of the second storage electrode 133b near the center of the first storage electrode 133a, respectively, and the fourth storage electrode 133d. Is connected to an upper portion of the second storage electrode 133b. The third and fourth sustain electrodes 133c and 133d have inverted symmetry with respect to the center line between two adjacent gate lines 121. The connection part 133e connects the adjacent first storage electrode 133a and the second storage electrode 133b of the adjacent storage electrode sets 133a to 133d. The gate line 121 and the sustain electrode wirings 131 and 133a to 133e may be formed of aluminum-based metals such as aluminum (Al) or aluminum alloys, silver-based metals such as silver (Ag) or silver alloys, and copper such as copper (Cu) and copper alloys. The metal may be made of molybdenum-based metals such as molybdenum (Mo) or molybdenum alloys, chromium (Cr), tantalum (Ta), and titanium (Ti). However, they may have a multilayer structure including two conductive films (not shown) having different physical properties. One of the conductive films is made of a metal having low resistivity, such as aluminum-based metal, silver-based metal, or copper-based metal, so as to reduce signal delay or voltage drop. In contrast, other conductive films are made of other materials, particularly materials having excellent physical, chemical, and electrical contact properties with indium tin oxide (ITO) and indium zinc oxide (IZO), such as molybdenum-based metals, chromium, tantalum, and titanium. Good examples of such a combination include a chromium bottom film, an aluminum (alloy) top film, and an aluminum (alloy) bottom film and a molybdenum (alloy) top film. However, the gate line 121 and the sustain electrode wirings 131 and 133a to 133e may be made of various metals or conductors.

Side surfaces of the gate line 121 and the sustain electrode wirings 131 and 133a to 133e are inclined with respect to the surface of the substrate 110, and the inclination angle is preferably about 30 to 80 °.

A gate insulating layer 140 made of silicon nitride (SiN _x ) or silicon oxide (SiOx) is formed on the gate line 121 and the storage electrode wirings 131 and 133a to 133e.

On the gate insulating layer 140, a plurality of linear semiconductors 151 made of hydrogenated amorphous silicon (amorphous silicon is abbreviated a-Si), polycrystalline silicon, or the like are formed. The linear semiconductor 151 mainly extends in the vertical direction and includes a plurality of protrusions 154 extending toward the gate electrode 124.

The linear semiconductor 151 has a wider width in the vicinity of the gate line 121 and the connecting portion 133e and covers them widely.

A plurality of linear and island ohmic contacts 161 and 165 are formed on the semiconductor 151. The ohmic contacts 161 and 165 may be made of a material such as n + hydrogenated amorphous silicon in which n-type impurities such as phosphorus are heavily doped, or may be made of silicide. The linear ohmic contact 161 has a plurality of protrusions 163, and the protrusion 163 and the island-type ohmic contact 165 are paired and disposed on the protrusion 154 of the semiconductor 151.

Side surfaces of the semiconductor 151 and the ohmic contacts 161 and 165 are also inclined with respect to the surface of the substrate 110, and the inclination angle is about 30 to 80 °.

A plurality of data lines 171, a plurality of drain electrodes 175, and a plurality of isolated metal pieces 178 are disposed on the ohmic contacts 161 and 165 and the gate insulating layer 140. ) Is formed.

The data line 171 transmits a data signal and mainly extends in the vertical direction to cross the gate line 121. Each data line 171 also crosses the connection portion 133e of the sustain electrode wiring. Each data line 171 has a wide end portion 179 for connection between a plurality of source electrodes 173 extending in a C shape toward the gate electrode 124 and another layer or an external driving circuit. Include. A data driving circuit (not shown) for generating a data signal is mounted on a flexible printed circuit film (not shown) attached to the substrate 110, directly mounted on the substrate 110, or integrated in the substrate 110. Can be. When the data driving circuit is integrated on the substrate 110, the data line 171 may be extended to be directly connected to the data driving circuit.

In the present invention, since only the connecting portion 133e of the sustain electrode wiring intersects the data line 171, the intersection point between the data line 171 and the sustain electrode wiring can be minimized. That is, since the intersection point between the storage electrode wiring and the data line 171 is one or less, a short circuit between the data line 171 and the storage electrode wiring is minimized. The drain electrode 175 is separated from the data line 171. The source electrode 173 faces the gate electrode 124. One end portion 175a of the drain electrode 175 is bent toward the source electrode 173 and partially surrounded by the source electrode 173 protruding in a C shape. The other end portion 175c not facing the source electrode 173 is extended for contact with the other layer. Both ends 175a and 175c of the drain electrode 175 are connected by the straight portion 175b.

One gate electrode 124, one source electrode 173, and one drain electrode 175 together with the protrusion 154 of the semiconductor 151 form one thin film transistor (TFT). A channel of the transistor is formed in the protrusion 154 between the source electrode 173 and the drain electrode 175.

The metal piece 178 is positioned on the gate line 121 near the free end of the sustain electrode 133a.

The data line 171, the drain electrode 175, and the metal piece 178 are preferably made of a refractory metal such as molybdenum, chromium, tantalum, and titanium, or an alloy thereof, and a refractory metal film (not shown). And a low resistance conductive film (not shown). Examples of the multilayer structure include a double layer of chromium or molybdenum (alloy) lower layer and an aluminum (alloy) upper layer, and a triple layer of molybdenum (alloy) lower layer and aluminum (alloy) interlayer and molybdenum (alloy) upper layer. However, in addition to the data line 171, the drain electrode 175, and the metal piece 178, various kinds of metals or conductors may be used.

The data line 171, the drain electrode 175, and the metal piece 178 may also be inclined at an inclination angle of about 30 to 80 ° with respect to the surface of the substrate 110.

The ohmic contacts 161 and 165 exist only between the semiconductor 151 below and the data line 171 and the drain electrode 175 thereon, thereby lowering the contact resistance. In most places, the width of the linear semiconductor 151 is smaller than the width of the data line 171. However, as described above, the width of the linear semiconductor 151 is widened at the portion where it meets the gate line 121 to smooth the profile of the surface. Prevents disconnection.

A passivation layer 180 is formed on the data line 171, the drain electrode 175, the metal piece 178, and the exposed semiconductor 151. The passivation layer 180 may be made of an inorganic insulator or an organic insulator, and may have a flat surface. Examples of the inorganic insulator include silicon nitride and silicon oxide. The organic insulator may have photosensitivity and the dielectric constant is preferably about 4.0 or less. However, the passivation layer 180 may have a double layer structure of the lower inorganic layer and the upper organic layer so as not to damage the exposed portion of the semiconductor 151 while maintaining excellent insulating properties of the organic layer.

In the passivation layer 180, a plurality of contact holes 182 and 185 exposing the end portion 179 and the drain electrode 175 of the data line 171 are formed, respectively, and the passivation layer 180 and the gate insulating layer are formed. In the 140, a plurality of contact holes 181 exposing the end portion 129 of the gate line 121 and a plurality of contact holes 183a exposing a part of the storage electrode line 131 near the fixed end of the first storage electrode 133a. And a plurality of contact holes 183b exposing the protruding portion of the free end of the first storage electrode 133a.

A plurality of pixel electrodes 191, a plurality of overpasses 83, and a plurality of contact assistants 81 and 82 are formed on the passivation layer 180. These may be made of a transparent conductive material such as ITO or IZO or a reflective metal such as aluminum or silver alloy.

The pixel electrode 191 is physically and electrically connected to the drain electrode 175 through the contact hole 185 and receives a data voltage from the drain electrode 175. The pixel electrode 191 to which the data voltage is applied is generated between the two electrodes 191 and 270 by generating an electric field together with the common electrode 270 of the other display panel 200 to which the common voltage is applied. The direction of the liquid crystal molecules 31 of the liquid crystal layer 3 is determined. The polarization of light passing through the liquid crystal layer 3 varies according to the direction of the liquid crystal molecules 31 determined as described above. The pixel electrode 191 and the common electrode 270 form a capacitor (hereinafter, referred to as a "liquid crystal capacitor") to maintain an applied voltage even after the thin film transistor is turned off.

The pixel electrode 191 overlaps the stem lines 131 including the sustain electrodes 133a to 133d, and the left and right sides of the pixel electrode 191 are adjacent to the data line 171 than the sustain electrodes 133a and 133b. do. A capacitor formed by the pixel electrode 191 and the drain electrode 175 electrically connected to the pixel electrode 191 overlapping the storage electrode line 131 is called a storage capacitor, and the storage capacitor enhances the voltage holding capability of the liquid crystal capacitor.

Each pixel electrode 191 has a substantially rectangular shape in which four corners are chamfered, and the chamfered hypotenuse forms an angle of about 45 ° with respect to the gate line 121.

A central cutout 91, a lower cutout 92a, and an upper cutout 92b are formed in the pixel electrode 191, and the pixel electrode 191 includes a plurality of cutouts 91, 92a, and 92b. It is divided into partitions of. The cutouts 91, 92a and 92b are almost inverted symmetric with respect to an imaginary transverse centerline that bisects the pixel electrode 191. The lower and upper cutouts 92a and 92b extend obliquely from the right side to the left side of the pixel electrode 191 and overlap the third and fourth sustain electrodes 133c and 133d. The lower and upper cutouts 92a and 92b are positioned at the lower half and the upper half with respect to the horizontal center line of the pixel electrode 191, respectively. The lower and upper cutouts 92a and 92b extend perpendicular to each other at an angle of about 45 ° with respect to the gate line 121.

The central cutout 91 extends along the horizontal centerline of the pixel electrode 191 and has an inlet at the right side thereof. The inlet of the central incision 91 has a pair of hypotenuses substantially parallel to the lower incision 92a and the upper incision 92b, respectively.

Therefore, the lower half of the pixel electrode is divided into two regions by the lower cutout 92a, and the upper half is also divided into two regions by the upper cutout 92b. In this case, the number of regions or the number of cutouts may vary depending on the size of the pixel, the ratio of the length of the horizontal side to the vertical side of the pixel electrode, and the type or characteristics of the liquid crystal layer 3.

The contact auxiliary members 81 and 82 are connected to the end portion 129 of the gate line 121 and the end portion 179 of the data line 171 through the contact holes 181 and 182, respectively. The contact auxiliary members 81 and 82 compensate for and protect the adhesion between the end portions 179 and 129 of the data line 171 and the gate line 121 and the external device.

The connecting leg 83 crosses the gate line 121, and the exposed end of the free end of the first storage electrode 133a through the contact holes 183a and 183b positioned opposite to each other with the gate line 121 interposed therebetween. And the exposed portion of the storage electrode line 131. The connecting leg 83 may overlap the metal piece 178 and be electrically connected to the metal piece 178. The sustain electrode lines 131 including the sustain electrodes 133a to 133d, together with the connecting legs 83 and the metal pieces 178, can be used to repair defects in the gate line 121, the data line 171, or the thin film transistor. have. When the gate line 121 is repaired, the gate line 121 and the sustain electrode line 131 are formed by connecting the gate line 121 and the connecting leg 83 by laser irradiation at the intersection of the gate line 121 and the connecting leg 83. ) Is electrically connected. At this time, the metal piece 178 strengthens the electrical connection between the gate line 121 and the connecting leg 83.

Next, the common electrode display panel 200 will be described with reference to FIGS. 1 and 3 to 5.

A light blocking member 220 called a black matrix is formed on an insulating substrate 210 made of transparent glass or the like. The light blocking member 220 has a plurality of openings 225 facing the pixel electrode 191 and having substantially the same shape as the pixel electrode 191. However, the light blocking member 220 may include only a linear portion extending along the data line 171, and may further include a portion facing the thin film transistor. The light blocking member 220 may be formed of a single layer of chromium or a double layer of chromium and chromium oxide, or may be formed of an organic layer including a black pigment.

A plurality of color filters 230 are also formed on the substrate 210, most of which are located in the opening 225 of the light blocking member 230. However, the color filter 230 may extend in the vertical direction along the pixel electrode 191. The color filter 230 may display one of the primary colors, and examples of the primary colors may include three primary colors such as red, green, and blue. The edges of the neighboring color filters 230 may overlap.

An overcoat 250 is formed on the color filter 230 to prevent the color filter 230 from being exposed and to provide a flat surface.

The common electrode 270 made of a transparent conductor such as ITO or IZO is formed on the overcoat 250.

The plurality of cutouts 71, 72a, and 72b are formed in the common electrode 270.

One set of cutouts 71, 72a, and 72b includes a central cutout 71, a lower cutout 72a, and an upper cutout 72b facing one pixel electrode 191. Each of the cutouts 71, 72a, 72b is disposed between adjacent cutouts 91, 92a, 92b of the pixel electrode 191 or between the cutouts 91, 92a, 92b and the chamfered hypotenuse of the pixel electrode 191. It is arranged. In addition, each cutout 71, 72a, and 72b includes at least one diagonal line extending in parallel with the lower cutout 92a or the upper cutout 92b of the pixel electrode 191.

Each of the lower and upper cutouts 72a and 72b includes an oblique portion, a horizontal portion and a vertical portion. The oblique line portion extends substantially parallel to the lower or upper cutouts 92a and 92b of the pixel electrode 191 from the upper side or the lower side of the pixel electrode 191 to the left side. The horizontal portion and the vertical portion extend along the sides of the pixel electrode 191 from each end of the diagonal portion and form an obtuse angle with the diagonal portion.

The central cutout 71 includes a central transverse portion, a pair of oblique portions and a pair of longitudinal longitudinal portions. The central horizontal portion extends from the left side of the pixel electrode 191 to the right along the horizontal center line of the pixel electrode 191, and the pair of diagonal portions respectively lower toward the right side of the pixel electrode 191 at the end of the central horizontal portion. And almost parallel with the upper incisions 72a, 72b. The vertical longitudinal portion extends along the right side of the pixel electrode 191 from each end of the diagonal portion and forms an obtuse angle with the diagonal portion.

The straight portion 175b of the drain electrode 175 overlaps with the lower diagonal portion and the vertical vertical portion of the lower inclined portion of the central cut portion 71. The number and direction of the cut portions 71, 72a and 72b also depend on the design element. The light blocking member 220 may overlap the cutouts 71 to 75b to block light leakage near the cutouts 71, 72a, and 72b.

Alignment layers 11 and 21 are coated on inner surfaces of the display panels 100 and 200, and they may be vertical alignment layers. Polarizers 12 and 22 are provided on the outer surfaces of the display panels 100 and 200, and the transmission axes of the two polarizers 12 and 22 are perpendicular to each other, and one of the transmission axes is parallel to the gate line 121. desirable. In the case of a reflective liquid crystal display, one of the two polarizers 12 and 22 may be omitted.

The liquid crystal display may include a polarizer 12 and 22, display panels 100 and 200, and a backlight unit (not shown) that supplies light to the liquid crystal layer 3.

The liquid crystal layer 3 has negative dielectric anisotropy, and the liquid crystal molecules of the liquid crystal layer 3 are aligned such that their major axes are perpendicular to the surfaces of the two display panels 100 and 200 in the absence of an electric field. Therefore, incident light does not pass through the quadrature polarizers 12 and 22 and is blocked.

When a common voltage is applied to the common electrode 270 and a data voltage is applied to the pixel electrode 191, an electric field (electric field) substantially perpendicular to the surfaces of the display panels 100 and 200 is generated. In response to the electric field, the liquid crystal molecules attempt to change their long axis to be perpendicular to the direction of the electric field. From now on, the pixel electrode 191 and the common electrode 271 will be referred to as an electric field generating electrode.

Meanwhile, the inclinations 71, 72a, 72b, 91, 92a, and 92b of the field generating electrodes 191 and 270 and the hypotenuse of the pixel electrode 191 parallel thereto distort the electric field to determine the inclination direction of the liquid crystal molecules. Produces a horizontal component. The horizontal component of the electric field is perpendicular to the hypotenuse of the cutouts 71, 72a, 72b, 91, 92a, 92b and the hypotenuse of the pixel electrode 191. As the widths of the cutouts 71, 72a, and 72b become narrower, the electric field is formed vertically, so that the liquid crystal molecules positioned in this portion do not tilt in any direction, resulting in texture. However, when the edge of the common electrode 270 positioned at the boundary of the cutouts 71, 72a, and 72b includes a thin portion or a gradually thinning portion, the width of the cut portions 71, 72a and 72b is increased. Even if it is narrowed, the slope of the electric field is gentle, and the liquid crystal molecules positioned in this portion are easily inclined in either direction to form domains.

One set of cutouts 71, 72a, 72b, 91, 92a, and 92b divides the pixel electrode 191 into a plurality of sub-areas having two inclined peripheries, respectively. The inclination direction of the liquid crystal molecules is determined by the direction determined by the horizontal component of the electric field, and the inclination direction is approximately four directions. As described above, when the liquid crystal molecules are inclined in various directions, the reference viewing angle of the liquid crystal display is increased.

The shape and arrangement of the incisions 71, 72a, 72b, 91, 92a, 92b can be modified.

As described above, the present invention can reduce the portion where the data line and the sustain electrode line intersect with one connection portion, thereby minimizing the possibility of a short circuit between the data line and the sustain electrode line.

Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.

Claims (5)

Insulation board, A gate line formed on the insulating substrate, A storage electrode wiring formed on the insulating substrate and positioned between the adjacent gate lines; A data line insulated from and intersecting the gate line and the sustain electrode line; A thin film transistor connected to the gate line and the data line, and A pixel electrode electrically connected to the thin film transistor Including, And a junction point of the sustain electrode wiring and the data line is one or less. In claim 1, The sustain electrode wiring is A stem line parallel to the gate line, First and second storage electrodes extending from both ends of the stem line and positioned opposite to the data line, respectively; A connection part intersecting the data line to connect the first storage electrode and the second storage electrode; Thin film transistor array panel comprising a. In claim 2, The connection part is a thin film transistor array panel positioned in the center line between the adjacent gate line. In claim 2, The sustain electrode wiring is A third sustain electrode extending obliquely from the center of the first sustain electrode to the upper direction of the second sustain electrode and a fourth sustain electrode obliquely extending from the center of the first sustain electrode to the lower direction of the second sustain electrode; Thin film transistor array panel comprising. In claim 4, The pixel electrode includes a cutout that overlaps the third storage electrode and the fourth storage electrode.

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