KR20080034617A - Power factor correction circuit using snubber circuit - Google Patents

Abstract

A power factor correction circuit using a snubber circuit is provided to configure a circuit only with a passive element of a small capacity by using the snubber circuit not requiring an additional switching element. A power factor correction circuit using a snubber circuit includes a converter unit(51) and a snubber circuit unit(52). The converter unit includes a first inductor(Lm), an output diode(Do), an output capacitor(Co), and a switching element(M). The converter converts input power into a voltage of a DC level to output the converted voltage. The snubber circuit unit includes a second inductor(Ls), a first capacitor(Cs1), a first diode(Ds1), a second diode(Ds2), and a second capacitor(Cs2). One end of the second inductor is connected to the first inductor. One end of the first capacitor is connected to the second inductor and the other end of the first capacitor is connected to an anode of the output diode. An anode of the second diode is connected to the second inductor and a cathode of the second diode is connected to a cathode of the first diode.

Description

Power factor correction circuit using snubber circuit {POWER FACTOR CORRECTION CIRCUIT USING SNUBBER CIRCUIT}

1 is a view showing a power system of a general power conversion circuit;

2 is a circuit diagram of a power factor improvement circuit according to the prior art;

3A and 3B illustrate switching losses generated when a switching element is turned on or off;

4A is a view showing reverse recovery characteristics of an output diode;

4B is a diagram showing a short circuit path at the time of switching on,

5 is a circuit diagram of a power factor improvement circuit using a snubber circuit according to the present invention;

6A to 6E are diagrams showing a current flow for each operation mode of the present invention in a solid line;

7 is a main waveform diagram according to each operation mode of the present invention;

8A and 8B conceptually show switching current / voltage waveforms and switching losses at the time of adding a snubber circuit portion.

* Description of Major Symbols in Drawings *

51 converter portion 52 snubber circuit portion

M: switching element Do: output diode

Co: output capacitor Lm: first inductor

Ls: second inductor La: third inductor

D _s1 : first diode D _s2 : second diode

D _s3 : third diode C _s1 : first capacitor

C _s2 : second capacitor

The present invention relates to a power factor improvement circuit using a snubber circuit, and more particularly, to a power factor improvement circuit for reducing switching loss and improving the reverse recovery characteristic of a diode by using a snubber circuit to have improved efficiency. .

Conventional power supplies have used simple full bridge rectifiers and large capacity electrolytic capacitors to obtain DC voltages from commercial AC voltages, but currently have strong regulations to solve problems caused by harmonic currents on commercial lines. have.

Therefore, the power system of the general power conversion circuit is composed of a power factor improving stage 11 and a DC power conversion stage 12, as shown in Figure 1, the power factor improving stage 11 performs the AC / DC conversion function It consists of a rectifier (11a) and a PFC stage (11b) that performs a power factor correction (PFC) function to generate a DC voltage of about 400V, which is required by the load in the DC power conversion stage 12 As a specification, DC / DC power conversion is performed.

Until recently, various technologies for improving power factor have been researched and developed. As a topology for PFC, boost converters, which are known for their excellent characteristics and reliability, are mainly used. However, high efficiency and high reliability of the boost converter that improves power factor requires high switching frequency operation to reduce harmonics and input / output filter sizes, and thus soft switching techniques to reduce the switching stress and loss. There is a need.

Until now, many literatures have proposed such a circuit technique, and a typical method is to use a snubber circuit.

2 is a circuit diagram of a power factor improvement circuit according to the related art, and shows a boost converter mainly used as a PFC converter.

Referring to the operation of the circuit of FIG. 2, the energy storage mode and the energy delivery mode may be classified into two types.

In the energy storage mode, the switching element M conducts, and when the switching element M conducts, all of the input voltage Vin is applied to the inductor L to store energy in the form of a current.

Afterwards, in the energy transfer mode, the switching element M is cut off. When the switching element M is cut off, both the energy stored in the inductor L and the input side energy are transferred to the load terminal through the output diode D, and the input voltage Vin is applied. A larger output voltage (V _o ) is produced.

However, the power factor improvement circuit according to the prior art has the following problems due to the actual characteristics of the circuit elements and parasitic components present in the circuit.

First, there is a problem that a large switching loss occurs when the switching device (M) is on / off, it will be briefly described with reference to Figures 3a and 3b.

3A and 3B illustrate switching losses generated when the switching element is turned on and off. FIG. 3A illustrates switching losses generated when the switching element is turned on. FIG. 3B illustrates when the switching element is turned off. Switching loss is shown.

As shown in FIGS. 3A and 3B, when the switching element is turned on / off, an area where the switching voltage v _ds and the current i _ds cross each other is generated, which causes switching loss and noise. Will occur.

In particular, since this point is proportional to the operating frequency of the power supply, the increase in the frequency leads to an increase in loss and noise, which causes a problem in that the efficiency is lowered and the switch generates heat. This is especially true for high speed switching operations.

In addition, the conventional power factor improvement circuit has a problem in that the circuit is momentarily shorted by the reverse recovery characteristic of the output diode D, which will be briefly described with reference to FIGS. 4A and 4B.

4A is a diagram illustrating reverse recovery characteristics of the output diode D, and FIG. 4B is a diagram illustrating a short circuit path when the switching device M is turned on.

In order for the conventional power factor improving circuit to switch from the energy transfer mode in which the output diode D is conducting to the energy storage mode, the output diode D becomes the output voltage V _O at the moment the switching element M is turned on. It should be reverse biased and blocked, but it can not be instantaneously blocked by diode reverse recovery characteristic, and current i _D flows in the reverse direction as shown in FIG. 4a, which causes a short path as shown in FIG. 4b. Is formed. This results in severe surge currents in each device, which can cause heat generation, permanent burnout, and severe electro-magnetic interference (EMI).

SUMMARY OF THE INVENTION The present invention has been proposed to solve the above problems, and an object thereof is to provide a power factor improvement circuit for reducing switching loss by using a snubber circuit and improving the reverse recovery characteristic of a diode to have improved efficiency.

The objects and advantages of the present invention can be understood by the following description, and will be more clearly understood by the embodiments of the present invention. It will also be appreciated that the objects and advantages of the present invention may be realized by the means and combinations thereof indicated in the claims.

According to an aspect of the present invention, there is provided a power factor improvement circuit including a first inductor connected between a power input terminal and a load, an output diode connected between the first inductor and a load, an output capacitor connected in parallel to the load, and a A converter including a switching element connected in parallel to an input power source and converting the input power into a voltage having a corresponding DC level; And a snubber circuit unit connected to the converter unit to reduce on / off loss of the switching element, wherein the snubber circuit unit includes: a second inductor connected to the first inductor and one end thereof; A first capacitor connected at one end thereof to a second end thereof connected to an anode of the output diode, a first capacitor connected in parallel to the first capacitor, an anode connected to the second inductor, and a cathode connected to the anode of the output diode A first diode being connected, an anode connected to the second inductor, a second diode having a cathode connected to the cathode of the first diode, and one end thereof connected to the cathode of the second diode, and the other end being grounded It characterized in that it comprises two capacitors.

Here, the third inductor further comprises a third inductor between one end of the first inductor and the second inductor.

At this time, the third inductor, characterized in that formed by the auxiliary winding of the first inductor.

In addition, the first and second diodes are characterized in that the fast recovery diode (fast recovery diode).

The above objects, features, and advantages will become more apparent from the following detailed description taken in conjunction with the accompanying drawings, whereby those skilled in the art may easily implement the technical idea of the present invention. There will be.

In addition, in describing the present invention, when it is determined that the detailed description of the known technology related to the present invention may unnecessarily obscure the gist of the present invention, the detailed description thereof will be omitted.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

5 is a circuit diagram of a power factor improving circuit using a snubber circuit according to the present invention. As shown in FIG. 5, the power factor improving circuit according to the present invention includes a converter unit 51 and a snubber circuit unit 52. Doing.

Here, the converter unit 51 includes a first inductor Lm, an output diode Do, an output capacitor Co, and a switching element M. The power source Vin input from the power input terminal is directly connected to the DC. It converts and outputs the voltage (Vo) of the level.

At this time, the first inductor Lm is connected between the power input terminal and the load, and the output diode Do is connected between the first inductor Lm and the load.

In addition, the output capacitor Co is connected in parallel with the load, and the switching element M is connected in parallel with the input power source Vin.

In this case, the switching device M uses an active device. Since the active element M includes a gate, a source, and a drain, the magnitude and direction of the current flowing from the drain to the source or vice versa is determined according to the magnitude and polarity of the voltage applied between the gate and the source. Have

Such active devices include bipolar junction transistors (BJTs), junction field effect transistors (JFETs), metal oxide semiconductor field effect transistors (MOSFETs), and metal semiconductor field effect transistors (MESFETs).

Meanwhile, the snubber circuit unit 52 is connected to the converter unit 51 to reduce the on / off switching loss of the switching element M, and the first and second capacitors C s ₁ and C s ₂ and the second inductor ( Ls), first and second diodes D s ₁ , D s ₂ .

At this time, one end of the second inductor Ls is connected to the first inductor Lm, and the first capacitor C _s1 is connected to the second inductor Ls and one end thereof, and the other end thereof is the output diode Do. Is connected to the anode.

In addition, the first diode D _s1 is connected in parallel with the first capacitor C _s1 , an anode is connected with the second inductor Ls, and a cathode is connected with the anode of the output diode Do.

In addition, the second diode D _s2 has an anode connected to the second inductor Ls and a cathode connected to the cathode of the first diode D _s1 .

In addition, one end of the second capacitor C _s2 is connected to the cathode of the second diode D _s2 , and the other end thereof is grounded.

At this time, the diodes (D s _{1 ,} D s ₂ ) that can be used in the snubber circuit unit 52 are preferred to use a device having a smaller capacity than the output diode Do, which is used for each diode using a small capacity diode. This is because by reducing the average current flowing, the loss in the conduction can be reduced and the complexity of the circuit configuration can be reduced.

In addition, the first and second diodes (D _s1,, D _s2) is a fast recovery diode it is preferable to use the (fast recovery diode), which high-speed restore the first and second diodes (D _s1,, D _s2) When the diode is used for a very short time, the carrier accumulation effect is small, which is suitable for high speed operation.

On the other hand, since some of the inductor component (L) is used in the present invention, the power factor may be improved by using the resonance characteristic, but the first inductor Lm and the second inductor may be used to enhance the resonance characteristic. A third inductor La may be added between Ls, and in this case, the third inductor La may be formed as an auxiliary winding of the first inductor Lm.

Hereinafter, the operation process of the present invention will be described for each mode with reference to FIGS. 5 to 7.

6A to 6F are diagrams showing a current flow for each operation mode of the present invention in solid line, and FIG. 7 shows a main waveform diagram according to each operation mode of the present invention.

Mode 1 (t ₀ to t ₁ )

6A is a diagram illustrating a current flow in mode 1, _in which energy is stored in the first inductor L _m from the input power supply V _{in with} the switching element M of the converter unit 51 turned on. It is a section. In this case, when the third inductor La is formed by the auxiliary winding of the first inductor L _m , a voltage having a size of V _in / N (where N is the winding ratio) is applied to the third inductor La.

On the other hand, the second capacitor (C _s2 ) is charged by the size of the output voltage (V _o ) in the previous mode, so that the second capacitor (C _s2 ) _-first capacitor (C _s1 ) around the second capacitor (C _s2 ). A closed loop consisting of the second inductor Ls, the third inductor La, and the switching element M is formed.

At this time, the first capacitor C _s1 is charged from the start of this mode, and the voltage V _{Cs1 at} both ends thereof becomes constant in Mode 2 to be described later. This mode ends when the voltage of the second capacitor C _s2 falls to zero.

Mode 2 (t ₁ to t ₂ )

6B is a diagram illustrating a current flow in mode 2, in which the switching element M is continuously turned on, and the current i _Lm flowing into the first inductor L _m is the switching element M. It is equal to the current (i _Ds ) flowing in.

At this time, the closed loop including the third inductor La, the second diode D _s2 , the first capacitor C _s1 , and the second inductor Ls based on the voltage Vin / N applied to the third inductor La. Will form. This mode ends when the resonance current i _Ls generated by the first capacitor C s ₁ and the second inductor Ls falls to zero after half a period.

Mode 3 (t ₂ to t ₃ )

FIG. 6C is a diagram illustrating a current flow in mode 3, in which the switching device M is turned on like the mode 2, and thus, the input power Vin, the first inductor Lm, and the switching device M Loop is formed, and the load is supplied with power from the output capacitor Co. This mode ends when the switching element M is turned off.

Mode 4 (t ₃ to t ₄ )

FIG. 6D is a diagram illustrating a current flow in mode 4. In this mode, when the switching element M is turned off, the second capacitor C _s2 starts to be charged while the second diode D _s2 is turned on. This mode ends when the voltage of the second capacitor C _s2 is charged by the output voltage Vo.

Mode 5 (t ₄ to t ₅ )

Figure 6e is a diagram showing the current flow in the mode 5, the output transmission path in this mode is V _in -L _m -L _s -C _s1 -D _o and V _in -L _m -D _s2 -D _o This power delivery path is up to mode 6. This mode ends when the voltage V _Cs1 across the charged first capacitor C _s1 falls to zero.

Mode 6 (t ₅ to t ₆ )

FIG. 6F is a diagram illustrating a current flow in mode 6. When the voltage V _Cs1 at both ends of the first capacitor C s ₁ falls to zero, the first diode D s ₁ is turned on and the power transfer path is V. FIG. _in -L _m -L _s -D _s1 -D _o and Vin-L _m -D _s2 -Do This mode ends when the second diode D _s2 is turned off.

Mode 7 (t ₆ to t ₇ )

Figure 6g is a diagram showing the current flow in mode 7, which shows the last mode of the present invention, the main power transmission path of this mode is V _in -L _m -L _s -D _s1 -D _o . When this mode ends, the switching device M is turned on again.

The seven operation modes described above are based on one cycle and are continuously repeated.

As such, by implementing the present invention using the snubber circuit unit 52, the present invention has the advantage of reducing the on / off switching loss and improving the reverse recovery characteristic of the diode. As follows.

First, FIGS. 8A and 8B conceptually show a switching voltage / current waveform and a switching loss at the time of adding a snubber circuit, and FIG. 8A is for explaining turn-on switching loss, and FIG. 8B is turned off. It is for explaining the switching loss.

As shown in FIGS. 8A and 8B, when the snubber circuit portion 52 is not added, the rising slope of the switching current / voltage waveform (indicated by the dashed lines) is large, and thus the voltage V _Ds and the current across the switching element ( The area where i _Ds ) intersect with each other becomes large so that the on / off switching loss becomes very large.

However, in the case where the snubber circuit unit 52 is added to lower the slope of the switching current i _Ds / voltage V _Ds , as shown in FIGS. 8A and 8B, the voltage V _Ds across the switching element and the current ( Since the area where i _Ds ) intersects each other becomes small, the on / off switching loss can be greatly reduced.

Accordingly, the present invention provides a switching current i _Ds / voltage V _Ds by adding a snubber circuit portion 52, in particular a second inductor Ls, on the conduction path when the switching element M is on / off. By lowering the slope of the switch has an advantage that can improve the switching loss caused by the on / off and thereby the switching heat generated.

In addition, as mentioned above, in the conventional power factor improvement circuit, when the output diode having a large current flows off momentarily, a short circuit occurs due to the diode reverse recovery characteristic, so that the current flowing when the output diode is turned off gradually decreases. This is usually called diode zero current switching.

Therefore, the present invention is connected to the snubber circuit unit 52, in particular a separate second inductor (Ls) in series with the output diode to suppress the sudden change of the diode current, heat generation that can be generated due to a short circuit situation, It also has the advantage of solving problems such as permanent burnout and EMI.

In addition, the snubber circuit unit 52 of the present invention eliminates the need for an additional control circuit for the active switching device by using a snubber circuit that does not require a separate switching device, and thus, additional loss or circuit influence is eliminated. Not only that, but the circuit can be made up of only a small passive element, so that the circuit can be implemented more simply.

In particular, the number of power diodes used in the power factor improvement circuit is the same or less than that of the conventional lossless snubber, and the voltage stress of the diode Ds1 connected in parallel with the capacitor Cs1 having the low voltage is several times higher than that of the conventional lossless snubber. It is possible to use inexpensive and high-performance diode because it is low.

One preferred embodiment of the present invention described above is disclosed for the purpose of illustration, various substitutions, modifications and Modifications may be made and such substitutions, changes and the like should be regarded as belonging to the following claims.

As described above, the power factor improvement circuit using the snubber circuit according to the present invention has the effect of reducing switching loss and improving the reverse recovery characteristics of the diode by using the snubber circuit, thereby improving efficiency.

In addition, the use of a snubber circuit that does not require a separate switching element eliminates the need for an additional control circuit for the active switching element, so that there is no additional loss or circuit effect caused by this, and the circuit is only required with a small passive element. It can be configured, which has the effect of making the circuit simpler.

In addition, the number of power diodes used in the power factor improvement circuit is the same or smaller than that of the conventional lossless snubber, and the voltage stress of the diode Ds1 connected in parallel with the capacitor Cs1 having the low voltage is several times higher than that of the conventional lossless snubber. Since this is low, it is possible to use a low cost and excellent diode.

Claims (4)

A first inductor connected between a load from a power input terminal, an output diode connected between the first inductor and the load, an output capacitor connected in parallel to the load, and a switching element connected in parallel to the input power source; A converter unit converting and outputting the voltage of the DC level; And  And a snubber circuit unit connected to the converter unit to reduce on / off loss of the switching element. The snubber circuit unit, A second inductor connected to the first inductor and one end thereof; A first capacitor having one end connected to the second inductor and the other end connected to an anode of the output diode; A first diode connected in parallel to the first capacitor, an anode connected to the second inductor, and a cathode connected to the anode of the output diode; A second diode having an anode connected to the second inductor and a cathode connected to the cathode of the first diode; And a second capacitor whose one end is connected to the cathode of the second diode and the other end is grounded. The method of claim 1, And a third inductor between one end of the first inductor and the second inductor. The method of claim 2, wherein the third inductor, The power factor improvement circuit using the snubber circuit, characterized in that formed by the auxiliary winding of the first inductor. The method according to any one of claims 1 to 3, The first and second diodes power factor improvement circuit using a snubber circuit, characterized in that the fast recovery diode (fast recovery diode).

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