KR20080030403A - Light emitting device of a nitride compound semiconductor and the fabrication method thereof - Google Patents

Abstract

A nitride semiconductor light emitting device and a method for manufacturing the same are provided to reduce a non-contact resistance and to improve the uniformity of a current spreading by forming a C54-phase Ti silicide layer and laminating Au to form an N-type ohmic transparent electrode. A light emitting structure is configured to have an active layer(500) between an N-type semiconductor layer(400) and a P-type semiconductor layer(600). A Ti layer is deposited on an exposed region of the N-type semiconductor layer. Si is ion-implanted into the Ti layer. A heat treatment process is performed during 1 minute to 30 minutes at 500 to 800 °C after the Si is ion-implanted to form a C49-phase Ti silicide layer. A region of the Ti layer on which the C49-phase Ti silicide layer is not formed is removed. The C49-phase Ti silicide layer is thermally-treated during 1 minute to 30 minutes at 500 to 800 °C to form a C54-phase Ti silicide layer(810). At least one metal layer is formed on the C54-phase Ti silicide layer.

Description

LIGHT EMITTING DEVICE OF A NITRIDE COMPOUND SEMICONDUCTOR AND THE FABRICATION METHOD THEREOF

1 is a cross-sectional view of a light emitting diode according to an embodiment of the present invention.

2 is a process flowchart illustrating a manufacturing process of a light emitting diode according to an embodiment of the present invention.

3 to 9 are cross-sectional views of the manufacturing process of FIG. 2.

<Description of the symbols for the main parts of the drawings>

100: sapphire substrate 200: buffer layer

300: Undoped GaN layer 400: N-type GaN layer

500: active layer 600: P-type GaN layer

700: P type ohmic transparent electrode 800: N type electrode

810: Ti silicide layer on C54 820: Au

900a, 900b: electrode pad

The present invention relates to a light emitting device and a method for manufacturing the same, and more particularly to a nitride semiconductor light emitting device having an ohmic transparent electrode capable of improving the light emitting efficiency and a method for manufacturing the same.

Group III-V compound semiconductors used to fabricate various light emitting devices provide superior performance in applications such as high speed and high temperature electronics, light emitters and photo detectors. Particularly, gallium nitride (GaN) included in gallium nitride compound semiconductors has a bandgap required for a blue laser and a light emitting diode emitting a blue wavelength spectrum. This is increasing. In addition, alloys of aluminum nitride (AlN), indium nitride (InN) and gallium nitride (GaN) provide spectra across the visible range.

In order to implement a light emitting device such as a light emitting diode or a laser diode using a nitride compound semiconductor, for example, gallium nitride (GaN) semiconductor, an ohmic contact structure between the semiconductor and the N-type and P-type electrodes is very important.

Among such nitride-based light emitting devices, light emitting diodes are classified into top-emitting light emitting diodes (TLEDS) and flip-chip light emitting diodes (FCLEDS).

In the conventional case, when forming an N-type electrode, Ti or Cr is deposited to a thickness of about 200 to 1000 kW to prevent Au diffusion in the exposed region of the N-type gallium nitride, and then, Au is formed as an electrode material. Deposition to a thickness and heat treatment of about 400 ~ 600 ℃ with Rapid Thermal Annealing (RTA) for activation to form an ohmic transparent electrode.

However, Ti or Cr has higher resistivity than Au, an electrode material, hardly changes in resistance after heat treatment, and does not serve as a stable barrier to prevent Au from diffusing to gallium nitride by diffusion at an interface. Therefore, an additional diffusion barrier layer using Ni or Pd is deposited again in the middle.

In addition, Ti or Cr does not form a stable solid solution such as Au or gallium nitride, or does not form a specific phase, resulting in an increase in resistance and an increase in driving voltage, which adversely affects reliability and thus requires low voltage and high reliability. There is a problem that is difficult to apply.

The technical problem to be achieved by the present invention is that in the nitride semiconductor light emitting device having an active layer between the N-type semiconductor layer and the P-type semiconductor layer, the N-type electrode formed on the N-type semiconductor layer has good ohmic characteristics at the junction with the N-type semiconductor layer. To have it.

According to an aspect of the present invention for achieving the above technical problem, in the method for manufacturing a nitride semiconductor light emitting device having an active layer between the N-type semiconductor layer and the P-type semiconductor layer, between the N-type semiconductor layer and the P-type semiconductor layer Forming a light emitting structure having an active layer thereon; depositing a Ti layer in an exposed region of the N-type semiconductor layer; implanting Si into the Ti layer; and Si in the Ti layer. Performing a heat treatment in an ion implanted state to form a C49 phase Ti silicide layer, removing a region where the C49 phase Ti silicide layer is not formed in the Ti layer, and heat treating the C49 phase Ti silicide layer to C54. Forming a phase Ti silicide layer and depositing at least one metal layer on the C54 phase Ti silicide layer. And balls.

Preferably, the C49 phase Ti silicide forming step may be heat treated at 500 ° C. to 800 ° C. for 1 minute to 30 minutes.

Preferably, the C54 phase Ti silicide forming step may be heat treated at 500 ° C. to 1000 ° C. for 1 minute to 30 minutes.

Preferably, the step of depositing the metal layer may further comprise a heat treatment for 1 minute to 30 minutes at 400 ℃ to 1000 ℃.

According to another aspect of the invention, in the nitride semiconductor light emitting device having an active layer between the N-type semiconductor layer and the P-type semiconductor layer, the C54 phase Ti silicide layer formed in the exposed region of the N-type semiconductor layer, and the C54 phase A nitride semiconductor light emitting device including at least one metal layer deposited on a Ti silicide layer is provided.

Preferably, the C54 phase Ti silicide layer is formed of a C49 phase Ti silicide layer by performing heat treatment in a state in which Si is implanted after the Ti layer is deposited in an exposed region of the N-type semiconductor layer, wherein After the region where the C49 phase Ti silicide layer is not formed is removed, heat treatment may be performed to form the C54 phase Ti silicide layer.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

The following embodiments are provided as examples to ensure that the spirit of the invention to those skilled in the art will fully convey. Accordingly, the present invention is not limited to the embodiments described below and may be embodied in other forms. In the drawings, lengths, thicknesses, and the like of layers and regions may be exaggerated for convenience. Like numbers refer to like elements throughout.

1 is a cross-sectional view of a light emitting diode according to an embodiment of the present invention.

Referring to FIG. 1, a light emitting diode according to an embodiment of the present invention may include a substrate 100, a buffer layer 200, an undoped GaN layer 300, an N-type GaN layer 400, an active layer 500, and a P. A GaN layer 600, a P-type ohmic transparent electrode 700 made of Ni / Au, an N-type electrode 800, and electrode pads 900a and 900b.

The substrate 100 is made of a sapphire substrate. In addition to the sapphire substrate, the substrate 100 may be a spinel substrate, an Si substrate, a porous Si substrate, an SiC substrate, a ZnO substrate, a GaAs substrate, or a GaN substrate.

Buffer layer 200, Undoped GaN layer 300, N-type GaN layer 400, active layer 500, P-type GaN layer 600 is metal organic chemical vapor deposition (MOCVD), molecular beam growth (MBE) or hydride It may be formed using a gas phase growth (HVPE) method and the like. It can also be formed continuously in the same process chamber.

The buffer layer 200 is interposed to mitigate the lattice mismatch between the substrate 100 and the undoped GaN layer 300. For example, the buffer layer 200 may be Al _x Ga _{1 - x} N (0≤x≤1), which may be metal organic chemical vapor deposition (MOCVD) or hydride vapor phase epitaxy (HVPE). Or molecular beam growth (MBE), metalorganic chemical vapor phase epitaxy (MOCVPE), or the like.

When the buffer layer 200 is formed, trimethyl aluminum (TMAl, Al (CH ₃ ) ₃ ) and trimethyl gallium (TMG, Ga (CH ₃ ) ₃ ) are used as source gases of Al and Ga. Ammonia (NH ₃ ) is used as the reaction gas. These source gases and reaction gases may be introduced into the reaction chamber, and the buffer layer 200 may be formed at 400 to 1200 ° C.

The undoped GaN layer 300 is grown to grow the N-type GaN layer 400 on the buffer layer 200.

The N-type GaN layer 400 may be formed by doping silicon (Si) in GaN.

The active layer 500 is an area where electrons and holes are recombined and includes InGaN / GaN. The emission wavelength emitted from the light emitting diode is determined by the type of material constituting the active layer 500. The active layer 500 may be a multilayer film in which a quantum well layer and a barrier layer are repeatedly formed. A quantum well layer and the barrier layer may be a semiconductor layer 2-to 4 won the compounds represented by the general formula _{Al x In y Ga 1 -x- y} N (0≤x, y, x + y≤ 1).

The P-type GaN layer 600 may be formed by doping zinc (Zn) or magnesium (Mg) on GaN.

The P-type ohmic transparent electrode 700 is formed on the P-type GaN layer 600. The P-type ohmic transparent electrode 700 transmits light emitted from the active layer 500 to the outside in a plate shape.

The P-type ohmic transparent electrode 700 may be formed of a transparent material such as Ni / Au.

The P-type ohmic transparent electrode 700 evenly distributes the current input through the electrode pad 900a to increase the luminous efficiency.

The N-type electrode 800 is formed on the N-type GaN layer 400, and is formed of a C 54 phase Ti silicide 810 and an Au metal layer 820.

The electrode pads 900a and 900b are formed on the P-type ohmic transparent electrode 700 and the N-type electrode 800. The electrode pads 900a and 900b are connected to a lead (not shown) by a wire to receive power from an external power source.

2 is a flowchart illustrating a manufacturing process of a light emitting diode according to an exemplary embodiment of the present invention, and FIGS. 3 to 9 are cross-sectional views illustrating a manufacturing process thereof.

2 and 3 to prepare a sapphire substrate 100 (S1).

A buffer layer 200 is formed on the substrate 100 (S2).

The buffer layer 200 may include metal organic chemical vapor deposition (MOCVD), hydride vapor phase epitaxy (HVPE) or molecular beam epitaxy (MBE), metal organic chemical vapor deposition (MBE). It can be formed using a method (metalorganic chemical vapor phase epitaxy, MOCVPE) and the like.

The buffer layer 200 may be grown using any one of the above-described crystal growth methods at a pressure of about 10 torr to about 780 torr at 400 to 1200 ° C.

After the buffer layer 200 is formed, an undoped GaN layer 300 having a thickness of 1 μm, an N-type GaN layer 400 having a thickness of 2 μm, an active layer 500 and a P-type GaN layer having a thickness of 0.15 μm are formed on the buffer layer 200. (600) grow in order at 1000 ℃ (S3)

Undoped GaN layer 300, N-type GaN layer 400, active layer 500, P-type GaN layer 600 is a metal organic chemical vapor deposition (MOCVD), hydride vapor deposition (HVPE) or molecular beam growth method ( MBE) and the like. It can also be formed continuously in the same process chamber.

After the P-type GaN layer 600 is formed, a P-type ohmic transparent electrode 700 made of Ni / Au is formed on the P-type GaN layer 600 (S4).

For example, a P-type GaN layer 600 may be formed, and then a metal organic chemical vapor deposition (MOCVD) or a porous atomic layer (PALE) may be formed on the P-type GaN layer 600. It is formed by depositing a Ni metal layer through Epitaxy). The deposition thickness of the Ni metal layer may be 10 nm, for example.

When the Ni metal layer is formed on the P-type GaN layer 600, the Au metal layer is deposited on the Ni metal layer by MOCVD (Metal Organic Chemical Vapor Deposition) or PALE (Pused Atomic Layer Epitaxy). The deposition thickness of the Au metal layer may be, for example, 10 nm.

When the Ni metal layer and the Au metal layer are formed on the P-type GaN layer 600, oxygen plasma treatment is performed on the Ni metal layer and the Au metal layer using an oxygen-containing gas.

When the oxygen plasma treatment is completed for the Ni metal layer and the Au metal layer, annealing treatment is performed on the Ni metal layer and the Au metal layer.

2 and 4, after the P-type ohmic transparent electrode 700 formed of Ni / Au is formed, the P-type ohmic transparent electrode 700 and the P-type GaN layer 600 are formed using a photolithography and etching process. And patterning or etching the active layer 500 to expose a portion of the N-type GaN layer 400 (S5).

2 and 5, the Ti layer 810 is deposited on the exposed N-type GaN layer 400 (S6). As a method of depositing the Ti layer 810, vacuum deposition may be performed using a vacuum evaporator. At this time, the thickness of the deposited Ti layer may be 100 ~ 1000 ∼.

Referring to FIGS. 2 and 6, after the Ti layer 810 is deposited on the exposed N-type GaN layer 400, the photo resist is developed, and then Si is implanted in an ion form using an ion implanter ( S7).

In this case, the amount of Si implanted and the acceleration energy may be adjusted according to the thickness of the Ti layer 810.

2 and 7, heat treatment is performed in a state in which Si is ion-implanted into the Ti layer 810 to form a C49-phase Ti silicide layer (S8). At this time, the heat treatment can be adjusted between 1 minute and 30 minutes at a temperature of 500 ℃ to 800 ℃ according to the kind of RTA (Rapid Thermal Annealing).

After the heat treatment for forming the C49 phase Ti silicide is performed, a region where the C49 phase Ti silicide layer is not formed in the Ti layer 810 is removed (S9).

In order to remove the region where the C49-phase Ti silicide layer is not formed in the Ti layer 810, wet etching is performed for about 10 seconds to 1 minute using a Ti etchant.

2 and 8, after performing wet etching, the C49 phase Ti silicide layer 810 is heat-treated to form a C54 phase Ti silicide layer (S10).

At this time, the heat treatment can be adjusted between 1 minute to 30 minutes at a temperature of 500 ℃ to 1000 ℃ depending on the type of RTA (Rapid Thermal Annealing).

2 and 9, Au is deposited on the C54 Ti silicide layer and heat-treated to form an electrode (S11). At this time, the heat treatment can be controlled between 1 minute to 30 minutes at a temperature of 400 ℃ to 800 ℃ according to the type of Rapid Thermal Annealing (RTA) after depositing Au on the C54 phase Ti silicide layer, it can be made selectively .

When the electrode pad 900a is formed on the P-type ohmic transparent electrode 700 and the electrode pad 900b is formed on the N-type electrode 800 (S12), the light emitting diode shown in FIG. 1 is completed. Here, the electrode pads 900a and 900b may be formed using a lift off method.

The present invention is not limited to the embodiments described above, and various modifications and changes can be made by those skilled in the art, which are included in the spirit and scope of the present invention as defined in the appended claims.

For example, in an embodiment of the present invention, the use of gallium nitride (GaN) in a group III-V compound semiconductor as an N-type semiconductor layer and a P-type semiconductor layer for fabricating a light emitting device has been described.

However, in addition to gallium nitride (GaN), various nitride compound semiconductors such as aluminum nitride (AlN), indium nitride (InN), and alloys thereof may be used as N-type and P-type semiconductor layers for manufacturing light emitting devices. _x in _y Ga _{1 -x- y} N may be used (0≤x, y, x + y≤1 ). in addition may be used a Group III-V compound semiconductor of GaP and GaAs.

Further, in the embodiment of the present invention, the deposition of Au as a metal layer on the C54 phase Ti silicide layer has been described, but various metals such as Al, Ag, TiN, W, and Ni may be used. In addition, although the embodiment has been described as depositing one metal layer, one or more metal layers may be deposited.

According to the present invention, a low-resistance C54 phase Ti silicide layer is formed on an N-type nitride semiconductor layer in a light emitting device, and then Au is formed to form an N-type ohmic transparent electrode, thereby lowering the specific contact resistance and thereby providing a carrier supplied from the outside. It is possible to spread the current uniformly inside the device, and also improve the light efficiency, so that the photons generated inside the light emitting device can easily escape to the outside.

Therefore, when manufacturing a top-emitting light emitting diode layer using an N-type ohmic transparent electrode formed of C54 phase Ti silicide / Au, it is possible to further improve the light utilization efficiency required to implement a large capacity and high brightness light emitting device.

Claims (6)

In the method for manufacturing a nitride semiconductor light emitting device having an active layer between an N-type semiconductor layer and a P-type semiconductor layer, Forming a light emitting structure having an active layer between the N-type semiconductor layer and the P-type semiconductor layer; Depositing a Ti layer in an exposed region of the N-type semiconductor layer; Ion implanting Si into the Ti layer, Forming a C49 phase Ti silicide layer by performing heat treatment in a state in which Si is implanted into the Ti layer; Removing a region in which the C49 phase Ti silicide layer is not formed in the Ti layer; Heat treating the C49 phase Ti silicide layer to form a C54 phase Ti silicide layer; A method of manufacturing a nitride semiconductor light emitting device comprising depositing at least one metal layer on the C54 phase Ti silicide layer. The method of claim 1, wherein the C49 phase Ti silicide forming step, A method for producing a nitride semiconductor light emitting device which is heat treated at 500 ° C to 800 ° C for 1 to 30 minutes. The method of claim 1, wherein the C54 phase Ti silicide forming step, A method of manufacturing a nitride semiconductor light emitting device which is heat treated at 500 ° C to 1000 ° C for 1 to 30 minutes. The method according to claim 1, And depositing the metal layer and then performing a heat treatment at 400 ° C. to 1000 ° C. for 1 minute to 30 minutes. In a nitride semiconductor light emitting device having an active layer between an N-type semiconductor layer and a P-type semiconductor layer, A C54 phase Ti silicide layer formed in the exposed region of the N-type semiconductor layer, A nitride semiconductor light emitting device comprising at least one metal layer deposited on the C54 phase Ti silicide layer. The Ti silicide layer of claim 5, wherein After the Ti layer is deposited on the exposed region of the N-type semiconductor layer, heat treatment is performed in a state in which Si is implanted to form a C49 phase Ti silicide layer, and a region where the C49 phase Ti silicide layer is not formed in the Ti layer. After the removal, the heat treatment is performed to form a nitride semiconductor light emitting device formed of a C54 phase Ti silicide layer.

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