KR20080024374A - High temperature stability nickel silicide preparation method for ulsi - Google Patents

Abstract

A method for manufacturing high temperature stability nickel silicide for use in ULSI(Ultra-Large Scale Integration) is provided to prevent transition from NiSi to NiSi2 and to improve thermal stability characteristic of the nickel silicide by adding iridium to nickel silicide. An iridium layer and a nickel layer are deposited on a single crystalline silicon substrate or a polycrystalline silicon substrate, or a nickel thin film of an iridium alloy is directly deposited on the silicon substrate. The deposited silicon substrate is thermally processed and then a silicidation reaction is performed. The resultant silicon substrate is cooled. A deposition thickness of the iridium layer is controlled by adjusting the addition amount of iridium with respect to a deposition thickness of the nickel layer. The addition amount of the iridium is controlled in 1 to 10 % of the deposition thickness of the nickel layer.

Description

High temperature stability nickel silicide preparation method for ULSI

Figure 1 shows a schematic diagram of a high temperature stable nickel silicide manufacturing process according to an embodiment of the present invention.

Figure 2 shows the surface resistance according to the heat treatment temperature change of the nickel silicide according to an embodiment of the present invention.

   (a) is the change in the surface resistance of the heat treatment temperature of Example 1 and Comparative Example 1

   (b) is the change in the surface resistance of the heat treatment temperature of Example 2 and Comparative Example 2

Figure 3 shows a scanning electron microscope (FESEM, Field Emission Scanning Electron Microscope) of nickel silicide prepared according to an embodiment of the present invention.

   (a) is Ni / Ir / Si heat treated at 700 ℃

   (b) is Ni / Ir / Si heat-treated at 1000 ℃

   (c) is Ni / Ir / poly-Si heat-treated at 700 ℃

   (d) is Ni / Ir / poly-Si heat-treated at 1000 ℃

Figure 4 shows a photograph of the nickel silicide prepared according to an embodiment of the present invention after the trench processing, observed with a scanning electron microscope.

   (a) is a trench processed after heat treatment of Example 1 at 700 ℃

   (b) was a trench treatment after heat treatment of Example 1 at 1000 ℃

   (c) was a trench treatment after heat treatment of Example 2 at 700 ℃

   (d) Trenched after Example 2 the heat treatment at 1000 ° C

FIG. 5 shows a rocking curve of X-ray diffraction analysis to identify the phase of product silicide in nickel silicide prepared according to one embodiment of the present invention.

   (a) is the rocking curve of the heat treatment at 700 and 1000 ℃ of Example 1 (Ni / Ir / Si) and Comparative Example 1 (Ni / Si)

   (b) shows the rocking curve of heat treatment at 700 and 1000 ° C. of Example 2 (Ni / Ir / poly-Si) and Comparative Example 2 (Ni / poly-Si).

Figure 6 shows that the nickel silicide prepared according to an embodiment of the present invention observed the composition change of Si, Ni, Ir by Auger Electron Spectroscopy (Auger Electron Spectroscopy).

   (a) is Ni / Ir / Si heat treated at 700 ℃

   (b) is Ni / Ir / Si heat-treated at 1000 ℃

   (c) is Ni / Ir / poly-Si heat-treated at 700 ℃

   (d) is Ni / Ir / poly-Si heat-treated at 1000 ℃

Figure 7 shows the surface roughness of the nickel silicide prepared according to an embodiment of the present invention.

The present invention relates to a high temperature stable nickel silicide manufacturing method for ULSI.

Silicide is a material made by mixing silicon and transition metal in a fixed ratio and is used for semiconductor manufacturing because of its excellent corrosion resistance and electrical conductivity. Such silicides are used in the fabrication of complementary transistor devices in order to reduce the contact resistance of the wiring layer and to prevent degradation due to diffusion between the silicon layer and the metal wiring layer.

The silicide is economically manufactured through the silicide manufacturing method of depositing and heat-treating a transition metal on the gate of polycrystalline silicon and the source / drain on a single crystal silicon substrate without a mask, and having a minimum line width of 65 nm or less. It is possible to manufacture complementary transistors, which have been used continuously. Therefore, the physical properties of the silicide should ensure the desired electrical properties and thermal stability for both the top of the polycrystalline silicon and single crystal silicon.

Representative silicides widely used to date include titanium silicide (TiSi ₂ ) and cobalt silicide (CoSi ₂ ). Both of these silicides have low resistance values suitable for high speed operation of semiconductor devices.

However, the titanium silicide is relatively easy to short due to bridging, and it is difficult to use a device having a minimum line width of 0.25 μm or less, and the cobalt silicide has an insulating oxide film between the Co thin film layer and the silicon. As a result, the silicide reaction is not well performed, so an excessive pretreatment process is required, and since a single Co atom and two silicon atoms are structurally combined, a silicide thin film having a large volume expansion and finally a thick thickness is formed.

In contrast, nickel silicide (NiSi) has a specific resistance similar to that of titanium silicide or cobalt silicide, but has no bridging problem and no narrow line effect. And silicon consumption is also known to be less than when forming cobalt silicide.

Therefore, when manufacturing a highly integrated transistor device having a minimum line width of 65 nm or less, nickel silicide (NiSi) formed by combining one nickel and one silicon atom overcomes the disadvantages of the conventional titanium silicide or cobalt silicide and uses a conventional silicide manufacturing method. Can be implemented.

However, nickel silicide has a problem in that the surface resistance, which is one of the characteristics of electrical resistance, is rapidly increased at 700 ° C. or higher, so that ohmic contact of low resistance cannot be formed. That is, after the nickel silicide is formed, if the heat treatment at 700 ℃ or more in the subsequent process including the subsequent wiring manufacturing process NiSi is changed to a high resistance NiSi ₂ causes a problem that the device does not work.

Thus, nickel silicide already has the most suitable physical properties for the production of conventional nano-grade transistors, but if the thermal stability to maintain a low resistance even at 700 ℃ or more, as well as the fabrication of transistors requiring a minimum line width of 65 nm, It is possible to form a 50 nm thickness can be used as a silicide material to produce a complementary transistor expected in the next 10 years.

Therefore, the present inventors added a iridium (Ir) to the nickel silicide during the study to solve the problem of the nickel silicide to suppress the transformation of the NiSi to the high resistance NiSi ₂ phase silicide manufacturing method having a thermally stable characteristics It was developed to complete the present invention.

The present invention seeks to provide a high temperature stable nickel silicide manufacturing method for ULSI.

In order to achieve the above object, the present invention comprises the steps of depositing an iridium layer and a nickel layer on a single crystal or polycrystalline silicon substrate, or depositing an iridium alloyed nickel thin film directly on the silicon substrate (step 1); Heat-treating the silicon substrate deposited in step 1 to perform a silicide reaction (step 2); And it provides a high temperature stable nickel silicide manufacturing method comprising the step (step 3) of cooling the silicon substrate subjected to the silicideation reaction of step 2.

Hereinafter, the present invention will be described in detail.

Step 1 of the present invention is to deposit an iridium layer and a nickel layer on a single crystal or polycrystalline silicon substrate, or directly deposit a iridium alloyed nickel thin film on the silicon substrate.

In step 1, a single crystal or polycrystalline silicon substrate may be used, and nickel silicide prepared by depositing an iridium layer and a nickel layer on the silicon substrate, or by depositing an iridium alloyed nickel thin film exhibits electrical resistance at 700 ° C. or higher. One of the characteristics is a low resistance ohmic contact.

In addition, the deposition thickness of the iridium layer can be adjusted by adjusting the amount of iridium added to the deposition thickness of the nickel layer. The addition amount of the iridium may be used as 1 to 10% of the deposition thickness of the nickel layer. In addition, the nickel layer of the step 1 may be used is an alloy of 1 ~ 10% iridium. The range of the added amount of iridium and the range of iridium alloying of the nickel layer are an appropriate range for forming a low resistance ohmic contact, which is one of the characteristics that the nickel silicide exhibits electrical resistance at 700 ° C or higher.

In addition, the deposition order of the iridium layer and the nickel layer deposited on the silicon substrate of step 1 is to deposit a nickel layer after the iridium layer deposition (iridium layer / nickel layer), or after depositing the nickel layer to deposit an iridium layer (nickel Layer / iridium layer). An iridium layer / nickel layer or a nickel layer / iridium layer deposited on the silicon substrate may be deposited one or more times.

The deposition order of nickel and iridium of the substrate is not limited as long as the nickel can be alloyed with iridium by applying heat to the deposited nickel and iridium layers.

In addition, step 2 of the present invention is a step of performing a silicide reaction by heat-treating the silicon substrate deposited in step 1.

The heat treatment for performing the silicideation reaction of the nickel and iridium layer deposited in step 2 may be performed by a rapid heat treatment apparatus. At this time, the heat treatment temperature may be performed at 200 ~ 1300 ℃, preferably may be carried out at 700 ~ 1300 ℃. The heat treatment temperature is a temperature suitable for performing the silicideation reaction of the nickel and iridium layer, the nickel silicide formed therefrom has a thermal stability to maintain a low resistance even above 700 ℃, the minimum line width is required to 65 nm In addition to fabrication of the transistor, it is possible to form a thickness of 50 nm can be used as a silicide material for producing a complementary transistor.

Step 3 of the present invention is a step of cooling the silicon substrate subjected to the silicideation reaction of step 2.

Cooling of the silicon substrate can be carried out by injecting an inert gas at a temperature of -60 ~ 100 ℃, preferably -60 ~ 30 ℃. Cooling time may be performed for 10 to 60 minutes. If the cooling temperature is less than -60 ℃, it may cause a physical change in the silicon substrate to be cooled, if it exceeds 100 ℃, the cooling time is longer than 100 ℃ or less, it is not effective as the cooling temperature.

Hereinafter, the present invention will be described in more detail with reference to Examples and Experimental Examples. However, the following examples are merely to illustrate the present invention, but the content of the present invention is not limited by the following examples.

< Example > Nickel silicide containing iridium

Example  1: Preparation of Nickel Silicide Using Single Crystal Silicon Substrate

100 금속 thick nickel metal / 10 Å thick iridium (Ir) metal before a natural oxide film is formed on a p-type (100) bare single crystal silicon substrate (Si) with a diameter of 10 cm and a thickness of 550 µm The Ni (100 mm 3) / Ir (10 mm) / Si (550 μm) specimens were finally prepared by depositing with a thermal evaporator.

The specimen was subjected to rapid heat treatment using a pair of halogen lamps in a vacuum of 10 ^-3 torr (20 seconds at a heat treatment temperature increase rate of 40 seconds and a holding time of 40 seconds. The silicon silicide added with iridium to the single crystal silicon substrate was manufactured by heat-treating for 40 seconds under 8 conditions of 300, 450, 500, 700, 800, 900, 1000, and 1200 ° C. through 10 seconds.

Example  2 : Polycrystalline  Preparation of Nickel Silicide Using Silicon Substrate

A silicon substrate having a thermal oxide film of 2000 에 in a p-type (100) having a diameter of 10 cm and a thickness of 550 µm was fabricated using low pressure chemical vapor deposition (LPCVD). ) Was deposited on the entire surface of the substrate at a thickness of 700 Å, and 10 Å thick iridium metal and 100 니켈 nickel metal were deposited by a thermal evaporator with a thermal evaporator before the natural oxide film was formed on the substrate. A iridium-added nickel silicide was prepared in the same manner as in Example 1, except that the specimen was prepared in a / Ir (10 Å) / poly-Si (700 Å) / SiO ₂ (2000 Å) / Si (550 μm) specimen. Prepared.

< Comparative example > Preparation of Nickel Silicide

Comparative example  1: Preparation of Nickel Silicide Using Single Crystal Silicon Substrate and Without Iridium

Except that the iridium layer was not deposited on the single crystal silicon substrate was prepared in the same manner as in Example 1.

Comparative example  2: Polycrystalline  Preparation of Nickel Silicide Using Silicon Substrate and Without Iridium

Except that the iridium layer was not deposited on the polycrystalline silicon substrate was prepared in the same manner as in Example 2.

< Experimental Example  1> Measurement of surface resistance of silicide according to temperature

The following experiment was carried out to measure the surface resistance according to temperature in the prepared nickel silicide.

After dipping for 10 minutes in 30% sulfuric acid (H ₂ SO ₄ ) kept in Examples 1 and 2 and Comparative Examples 1 and 2 at 80 ℃ and then washed with a four-point resistor (4 point probe, Changmin, CMT-SR1000N) The surface resistance (ohm / sq) of each specimen was measured using the results, and the results are shown in FIGS. 2 and 3.

As shown in FIG. 2, Comparative Example 1 showed a sharp change in surface resistance at 700 ° C. or higher, whereas nickel silicide containing 10% iridium had a stable surface resistance up to 1200 ° C. FIG. In addition, Comparative Example 2 also showed a sharp change in the surface resistance at 700 ℃ or more, while Example 2 exhibited a lower surface resistance even at 850 ℃ or less than Comparative Example 2.

Accordingly, it was found that nickel silicide added with iridium to the single crystal and polycrystalline silicon substrates greatly improved the low resistance stabilization process range.

< Experimental Example  2> Electron microscopy observation of nickel silicide surface

In order to check the planar microstructure of the prepared silicide, the following experiment was conducted.

After the substrates of Examples 1 and 2 subjected to silicide treatment at 700 or 1000 ° C. were washed for 10 minutes in 30% sulfuric acid, the specimens were observed using a scanning electron microscope (Field Emission Scanning Electron Microscope, Hitachi, S-4300). It was. The results are shown in FIG.

As shown in Figure 3, the specimen of Example 1 (a) heat treated at 700 ℃ showed a very uniform surface, the heat treatment at 1000 ℃ (b) is a labyrinth surface of about 0.2 ㎛ width Aggregation could be observed.

In addition, (c) heat-treated at 700 ° C. on the specimen of Example 2 showed dot grains of 100 nm or less, and (d) heat-treated at 1000 ° C. on the specimen of Example 2 was more fine than (b). It was found to have a maze-type microstructure.

< Experimental Example  3> Observation of vertical section structure of nickel silicide

In order to observe the vertical cross-sectional structure of the nickel silicide prepared in Examples 1 and 2 were carried out as follows.

After the nickel silicide was prepared by heat-treating the specimens according to Examples 1 and 2 at 700 and 1000 ° C., respectively, Ga ions were obtained by using a dual beam connection ion beam system (FEI, dual beam-field ion beam Nano Lab200). The nickel silicides of Examples 1 and 2 were trenched in a 1.2 × 1.0 μm ² area with a target depth of 150 nm while accelerating to kV to maintain a surface current of 10 pA. After the trench processing, nickel silicide was observed using a scanning electron microscope (Field Emission Scanning Electron Microscope, HITACHI, S-4300). In addition, the thickness of the nickel silicide was determined by inclining the processed trench at 52 ° using the thicknesses of the silicon and the conductive silicide. The results are shown in FIGS. 4 and 5.

As shown in Figure 4, the thickness of the trenched nickel silicide is measured as (a) 41 nm, (b) 38 nm, (c) 55 nm, (d) 55 nm so that the silicide layer according to the silicided temperature The thickness of did not change significantly. In addition, the thickness of the silicide may be applicable to a shallow junction transistor having a minimum line width of 100 nm or less.

< Experimental Example  4> X- of nickel silicide Lay Diffraction analysis

The following experiment was conducted to confirm the formation of the silicide phase of nickel silicide by the heat treatment.

Nickel silicides of Example 1 (Ni / Ir / Si) and 2 (Ni / Ir / poly-Si) and Comparative Examples 1 (Ni / Si) and 2 (Ni / poly-Si) were analyzed by X-ray diffractometer (RIGAKU). Using GEIGERFLEXD / MAX-IIA), the Cu Kα wavelength was 1.5406 mA, wherein the filament current was 20 mA and the acceleration voltage was 30 mA. The scan area was analyzed by thermally treating 2θ at 700 and 1000 ° C. for 40 seconds in the range of 20 to 80 ° in consideration of nickel silicide shown on a Joint Committee Powder Diffraction Standard (JCPDS) card. The results are shown in FIG.

As shown in FIG. 5, the nickel silicide of Comparative Example 1 has a peak indicating the formation of NiSi (○ mark) having a 2θ value of about 45 ° at 700 ° C., and at 1000 ° C., a characteristic NiSi ₂ (☆ mark) is present. On the other hand, the shape of the high resistance phase was shown, whereas in Example 1, Ir ₃ Si (□ mark) and IrSi ₃ phase (△ mark) were shown at 700 and 1000 ° C., respectively. These complex Ir silicides, including Ir ₃ Si ₅ , all have a characteristic of having a low resistance toward higher temperatures.

In addition, in Example 2, the NiSi characteristic peak was not seen at a low temperature of 700 ° C., and the characteristic peak of Ir ₃ Si was seen. Therefore, it can be seen that in the case of the polycrystalline silicon substrate, rapid diffusion occurs along the grain boundary, and Ni (Ir) Si and Ir ₃ Si in a form in which Ir is dissolved in NiSi are mixed and show low resistance.

< Experimental Example  5> Quantitative Analysis of Chemical Composition of Nickel Silicide by Temperature

In order to quantitatively analyze the chemical composition of nickel silicide according to temperature, the following experiment was conducted.

Nickel produced according to temperature by measuring the compositional changes of Si, Ni, and Ir for the specimens of Examples 1 and 2 heat-treated at 700 and 1000 ° C. using Auger Electron Spectroscopy (Perkin-Elmer) The chemical composition of silicide was quantitatively analyzed. The results are shown in FIG.

As shown in FIG. 6, the nickel silicides of (a) and (b), which were heat-treated at 700 and 1000 ° C., respectively, showed similar chemical ratios, which were determined to be NiSi, and Example 2 was heat-treated at 700 ° C. (c) showed a similar chemical ratio as in (a) and (b), whereas (d) in Example 2 heat-treated at 1000 ° C. formed silicides having different chemical composition ratios. In particular, it was judged that the inversion phenomenon toward the upper part of the Si layer in the lower part occurred, and thus an extreme aggregation shape occurred. From this, it was found that the nickel silicides of (a), (b) and (c) produced silicides showing low resistance.

< Experimental Example  6> of nickel silicide Surface roughness  Measure

In order to determine the change in surface roughness of the nickel silicide according to the heat treatment, the following experiment was conducted.

In order to confirm the change in surface roughness according to the silicide process, a scanning probe microscope (Scanning Probe Microscope, PSIA CP, AP-0100) was used to scan and analyze a 5 × 5 μm ² range in contact mode to obtain a root mean square, Quantification by measuring rms). The square mean values of the specimens according to the heat treatment temperatures of Examples 1 and 2 set five horizontal lines to determine their square mean values. The results are shown in FIG.

As shown in Figure 7, the specimen of Example 1 according to the heat treatment temperature gradually increases the square average value of the total roughness from 300 to 700 ℃ The surface roughness value rapidly increased from 800 ℃. The surface roughness was determined to have an even surface despite the volume change up to 700 ℃, and surface roughness was determined to be large due to the surface cohesion caused by the high temperature heat treatment above 800 ℃.

In addition, in the specimen of Example 2 according to the heat treatment temperature, the root mean square value of the total surface roughness was almost unchanged until 300 ~ 700 ℃, but slightly lowered near 800 ℃, and the surface roughness value increased again above 800 ℃. However, it was found that the surface roughness in the entire temperature range was about 2.0 nm without significant change with temperature.

According to the present invention, a small amount of iridium may be mixed with an existing nickel silicide material to prepare a high temperature stable nickel silicide that maintains low resistance stably even at high temperature, and thus may be usefully used in the semiconductor material field.

Claims (10)

Depositing an iridium layer and a nickel layer on the single crystal or polycrystalline silicon substrate, or depositing an iridium alloyed nickel thin film directly on the silicon substrate (step 1); Heat-treating the silicon substrate deposited in step 1 to perform a silicide reaction (step 2); And And cooling the silicon substrate on which the silicidation reaction has been performed (step 3). The method of claim 1, wherein the deposition thickness of the iridium layer of step 1 is controlled by adjusting the amount of iridium added with respect to the deposition thickness of the nickel layer. The method of claim 2, wherein the amount of iridium added is controlled to 1 to 10% of the deposition thickness of the nickel layer. The method of claim 1, wherein the nickel thin film of step 1 is iridium alloyed 1 ~ 10%, characterized in that the manufacturing method of high temperature stable nickel silicide. The method of claim 1, wherein the deposition order of the iridium layer and the nickel layer deposited on the silicon substrate is deposited by depositing an iridium layer and then depositing a nickel layer (iridium layer / nickel layer), or depositing a nickel layer and then depositing an iridium layer ( Nickel layer / iridium layer). The method of claim 5, wherein the iridium layer / nickel layer or the nickel layer / iridium layer deposited on the silicon substrate is deposited once or repeatedly deposited two or more times. The method of claim 1, wherein the heat treatment for performing the silicidation reaction is carried out by a rapid heat treatment apparatus. The method of claim 1, wherein the heat treatment temperature is performed at 200 ~ 1300 ℃ high temperature stable nickel silicide manufacturing method. The method of claim 8, wherein the heat treatment temperature is performed at 700 to 1300 ° C. 10. The method of claim 1, wherein the cooling of the step 3 is a method for producing a high temperature stable nickel silicide, characterized in that the inert gas is carried out for 10 to 60 minutes at -60 ~ 100 ℃.

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