KR20080022355A - Liquid crystal display device - Google Patents

Abstract

A liquid crystal display device is provided to drive two gate lines simultaneously for increasing data voltage charging time and to connect entire pixel electrodes integrally for simplifying the drive of the data lines. A liquid crystal display device comprises a first substrate(100), a second substrate(200), and a liquid crystal layer(300). The first substrate includes gate lines, data lines(141), a thin film transistor, and pixel electrodes(161). The second substrate is opposed to the first substrate and includes a common electrode. The liquid crystal layer of a VA(vertical alignment) mode is placed between the first and second substrates. Pixel electrode cut patterns(162) are formed at the pixel electrodes. Common electrode cut patterns(252) are formed at the common electrode. The liquid crystal layer is divided into multiple domains extended by the pixel electrode cut patterns and the common electrode cut patterns. The boundary of the pixel electrode is in parallel to the extension direction of the domain. The shape of the pixel electrode boundary is a square.

Description

Liquid crystal display {LIQUID CRYSTAL DISPLAY DEVICE}

1 is a layout view of a first substrate in a liquid crystal display according to a first embodiment of the present invention;

2 is a cross-sectional view taken along II-II of FIG. 1,

3 is a view for explaining a pixel electrode in the liquid crystal display according to the first embodiment of the present invention;

4 is a view for explaining a relationship between a pixel electrode cut pattern and a common electrode cut pattern in a liquid crystal display according to a first embodiment of the present invention;

5 is a view for explaining the arrangement of wirings and pixel electrodes in the liquid crystal display according to the first embodiment of the present invention;

6 is a view for explaining the configuration of a pixel in a liquid crystal display according to a first embodiment of the present invention;

7 is a view for explaining the arrangement of wirings and pixel electrodes in the liquid crystal display according to the second embodiment of the present invention;

8 is a layout view of a first substrate in a liquid crystal display according to a fourth embodiment of the present invention.

Explanation of Signs of Major Parts of Drawings

121: gate line 122: gate electrode

141: data line 142: source electrode

143: drain electrode 151: protective film

161: pixel electrode 162: pixel electrode incision pattern

200: second substrate 251: common electrode

252: common electrode incision pattern

The present invention relates to a liquid crystal display device.

The liquid crystal display device includes a first substrate on which a thin film transistor is formed, a second substrate disposed opposite to the first substrate, and a liquid crystal layer disposed therebetween.

The patterned vertically aligned (PVA) mode of the liquid crystal display is a mode for improving the viewing angle, and refers to the formation of cutout patterns on the pixel electrode and the common electrode in the VA mode. The viewing angle is improved by controlling the direction in which the liquid crystal molecules lie down by using a fringe field formed by these incision patterns.

In the PVA mode, the liquid crystal layer is divided into a plurality of domains by the incision pattern, and the direction in which the liquid crystal molecules lay down for each domain is determined. However, there is a problem that the aperture ratio is lowered because the driving of the liquid crystal is not controlled at the corners of the pixel electrode.

Accordingly, an object of the present invention is to provide a liquid crystal display device having an improved aperture ratio.

The object of the present invention is a first substrate including a gate line, a data line, a thin film transistor electrically connected to the gate line and the data line, and a pixel electrode connected to the thin film transistor; A second substrate disposed opposite the first substrate and including a common electrode; A liquid crystal display device comprising a liquid crystal layer in a vertical alignment (VA) mode positioned between the first substrate and the second substrate, wherein the pixel electrode is formed with a pixel electrode incision pattern, and the common electrode is a common electrode. An incision pattern is formed, and the liquid crystal layer is divided into a plurality of domains extended by the pixel electrode incision pattern and the common electrode incision pattern, and the circumference of the pixel electrode is parallel to an extension direction of the adjacent domain. Is achieved.

The circumference of the pixel electrode is preferably a square shape.

The circumference of the pixel electrode is preferably not parallel to the extending direction of the gate line.

One side of the circumference of the pixel electrode is preferably about 45 degrees to the extending direction of the gate line.

One side of the pixel electrode may preferably face one side of the neighboring pixel electrode.

The thin film transistor includes a first thin film transistor and a second thin film transistor which are simultaneously driven, and the pixel electrode is separated from each other and connected to the first pixel electrode and the second thin film transistor which are connected to the first thin film transistor. It is preferable to include a second pixel electrode.

Preferably, the first thin film transistor and the second thin film transistor are connected to different data lines.

The first thin film transistor and the second thin film transistor are preferably positioned at the center of the pixel electrode.

Preferably, the pixel electrode connected to the front gate line and the pixel electrode connected to the rear gate line are sequentially driven.

Four data lines may be disposed across the pixel electrode, and the thin film transistor may be connected to a pair of the data lines located inside the pixel electrode.

The gate lines are preferably driven in pairs adjacent to each other.

Preferably, the gate line passes through the center of the pixel electrode.

Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings. Hereinafter, a film is formed (located) on top of another film, not only when two films are in contact with each other but also when another film is between two layers. It also includes the case where it exists.

A liquid crystal display according to the present invention will be described with reference to FIGS. 1 to 6.

As shown in FIG. 2, the liquid crystal display device 1 includes a first substrate 100 on which thin film transistors T1 and T2 are formed, a second substrate 200 facing the first substrate 100, and both substrates 100,. It includes a liquid crystal layer 300 positioned between the 200.

First, the first substrate 100 will be described with reference to FIGS. 1 and 2.

Gate wirings 121 and 122 are formed on the first insulating substrate 111. The gate lines 121 and 122 may be a metal single layer or multiple layers. The gate lines 121 and 122 include a gate line 121 extending in the horizontal direction and a gate electrode 122 connected to the gate line 121.

On the first insulating substrate 111, a gate insulating layer 131 made of silicon nitride (SiNx) or the like covers the gate lines 121 and 122.

A semiconductor layer 132 made of a semiconductor such as amorphous silicon is formed on the gate insulating layer 131 of the gate electrode 122, and n + is doped with silicide or n-type impurities at a high concentration on the semiconductor layer 132. An ohmic contact layer 133 made of a material such as hydrogenated amorphous silicon is formed. The ohmic contact layer 133 is removed from the channel portion between the source electrode 142 and the drain electrode 143.

Data lines 141, 142, and 143 are formed on the ohmic contact layer 133 and the gate insulating layer 131. The data lines 141, 142, and 143 may also be a single layer or multiple layers of a metal layer. The data lines 141, 142, and 143 are formed in a vertical direction and branched from the data line 141 and the data line 141 to intersect the gate line 121 and extend to an upper portion of the ohmic contact layer 133. And a drain electrode 143 which is separated from the electrode 142 and the source electrode 142 and is formed on the resistive contact layer 133 opposite to the source electrode 142. The data wirings 141, 142, and 143 are provided in pairs.

The passivation layer 151 is formed on the data wires 141, 142, and 143 and the semiconductor layer 132 not covered by the data lines. A contact hole 152 exposing the drain electrode 143 is formed in the passivation layer 151.

The pixel electrode 161 is formed on the passivation layer 151. The pixel electrode 161 is usually made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). The pixel electrode 161 is connected to the drain electrode 143 through the contact hole 152. The pixel electrode cut pattern 162 is formed on the pixel electrode 161.

The pixel electrode cutout pattern 162 of the pixel electrode 161 divides the liquid crystal layer 300 into a plurality of domains together with the common electrode cutout pattern 252 described later.

The pixel electrode 161 is divided into two parts 161a and 161b as shown in FIG. 3 and has a square shape as a whole. The first pixel electrode 161a is connected to the first thin film transistor T1, and the second pixel electrode 161b is connected to the second thin film transistor T2. The shape of the pixel electrode 161 will be described later in detail.

Next, the second substrate 200 will be described.

The black matrix 221 is formed on the second insulating substrate 211. The black matrix 221 generally distinguishes between red, green, and blue filters, and serves to block direct light irradiation to the thin film transistor positioned on the first substrate 100. The black matrix 221 is usually made of a photosensitive organic material to which black pigment is added. As the black pigment, carbon black or titanium oxide is used.

The color filter 231 is formed by repeating the red, green, and blue filters with the black matrix 221 as the boundary. The color filter 231 serves to impart color to light emitted from the backlight unit (not shown) and passed through the liquid crystal layer 300. The color filter 231 is usually made of a photosensitive organic material.

An overcoat layer 241 is formed on the black matrix 221 not covered by the color filter 231 and the color filter 231. The overcoat layer 241 serves to protect the color filter 231 while planarizing the color filter 231. The overcoat layer 241 may be a photosensitive acrylic resin.

The common electrode 251 is formed on the overcoat layer 241. The common electrode 251 is made of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). The common electrode 251 directly applies a voltage to the liquid crystal layer 300 together with the pixel electrode 161 of the thin film transistor substrate.

The common electrode cutting pattern 252 is formed on the common electrode 251. The common electrode cutout pattern 252 divides the liquid crystal layer 300 into a plurality of domains together with the pixel electrode cutout pattern 162 of the pixel electrode 161.

The liquid crystal layer 300 is positioned between the first substrate 100 and the second substrate 200. The liquid crystal layer 300 is a VA (vertically aligned) mode, and the liquid crystal molecules are vertical in the length direction when no voltage is applied. When voltage is applied, the liquid crystal molecules lie perpendicular to the electric field because the dielectric anisotropy is negative. However, when the incision patterns 162 and 252 are not formed, the liquid crystal molecules are arranged in random order in various directions because the azimuth angles of the lying down are not determined, and a foreground line is generated at the boundary planes having different alignment directions. The cutting patterns 162 and 252 form a fringe field when a voltage is applied to the liquid crystal layer 300 to determine the azimuth angle of the liquid crystal alignment. In addition, the liquid crystal layer 300 is divided into a plurality of domains according to the arrangement of the cutting patterns 162 and 252.

Hereinafter, the arrangement of the pixel electrode 161 and the common electrode 251 will be described with reference to FIGS. 3 and 4.

The pixel electrode 161 is divided into two parts 161a and 161b and has a square shape as a whole. The first pixel electrode 161a includes an inner triangular portion A and a rectangular band portion B forming a circumference of the pixel electrode 161. The second pixel electrode 161b includes an inner triangle portion C and a square strip portion D surrounding the triangle portions A and C. The triangular portions A and C face each other's base so that the whole becomes a square.

The pixel electrode cut pattern 162 distinguishes each of the portions A, B, C, and D. The pixel electrode cut pattern 162 is formed to be parallel to the circumference of the adjacent pixel electrode 161 except for the portion E formed to be parallel to the gate line 121.

Referring to FIG. 2, a black matrix 221 is formed in most of the upper portions of the triangular portions A and C, and the common electrode 251 is not formed in this portion. Therefore, the portion E of the pixel electrode cut pattern 162 formed in parallel with the gate line 121 does not contribute to the domain formation.

The first pixel electrode 161a is connected to the first thin film transistor T1, and the second pixel electrode 161b is connected to the second thin film transistor T2. As shown in FIG. 1, since the first thin film transistor T1 and the second thin film transistor T2 are connected to different data lines 141, the first thin film transistor T1 and the second thin film transistor T2 are respectively connected to the first pixel electrode 161a and the second pixel electrode 161b. Other pixel voltages may be applied.

When the gamma curve of each of the first pixel electrode 161a and the second pixel electrode 161b is changed, the side visibility is improved. The actual transmittance felt by the user is about halfway between the first pixel electrode 161a and the second pixel electrode 161b.

The drain electrode 143 overlaps the pixel electrode 161 to form a storage capacitor Cst, and the storage capacitor is proportional to the overlapping area of the drain electrode 143 and the pixel electrode 161.

The drain electrode 143a of the first thin film transistor T1 is larger than the drain electrode 143b of the second thin film transistor T2, and the area of the first pixel electrode 161a is larger than that of the second pixel electrode 161b. This is because the larger the storage area, the larger the storage capacity is required.

The common electrode cut pattern 252 has a square shape as a whole and crosses each of the rectangular band portions B and D. The common electrode cutout pattern 252 is provided in parallel with the circumference of the adjacent pixel electrode 161.

The liquid crystal layer 300 is divided into a plurality of domains by the pixel electrode cutting pattern 162 and the common electrode cutting pattern 252 described above. Each domain is elongated, and the extension direction is about 45 degrees or 135 degrees, and is parallel to the circumference of the adjacent pixel electrode 161. The viewing angle is improved between the adjacent domains because the liquid crystal molecules are laid down (driving direction) differently.

As described above, according to the first embodiment, each domain extends in the same direction, so that the liquid crystal is not driven at the edge of the domain or at the boundary portion (F in FIG. 4) with the adjacent pixel electrode 161.

In addition, the thin film transistors T1 and T2 and the drain electrode 143 which reduce the aperture ratio are gathered at the center portion of the pixel electrode 161, thereby improving the aperture ratio.

Hereinafter, the arrangement and driving of the pixel electrode 161 will be described with reference to FIGS. 5 and 6.

As illustrated in FIG. 5, the pixel electrode 161 is arranged such that the front row and the rear row are staggered from each other. Two data lines 141 pass through each pixel electrode 161. The first thin film transistor T1 is connected to the right data line 141, and the second thin film transistor T2 is connected to the left data line 141.

The gate line 121 passes through the center of the corresponding pixel electrode 161.

As shown in FIG. 6, three pixel electrodes 161 are gathered to form one pixel. The three pixel electrodes 161 forming the pixels are arranged in a triangle or inverted triangle shape.

The pixel electrode 161 is driven by sequentially turning on the gate lines 121 one by one. That is, three pixel electrodes 161 constituting one pixel are not driven at the same time.

A second embodiment will be described with reference to FIG.

The pixel electrode 161 is arranged so that the front row and the rear row are alternate with each other. Four data lines 141 pass through each pixel electrode 161. The two data lines 141 pass through the right side of the thin film transistors T1 and T2, and the two data lines 141 pass through the left side of the thin film transistors T1 and T2. The first thin film transistor T1 is connected to the inner right data line 141, and the second thin film transistor T2 is connected to the inner left data line 141.

The gate line 121 passes through the center of the corresponding pixel electrode 161 and the two gate lines 121 are connected to each other. In other words, two gate lines 121 are simultaneously driven.

In the second embodiment, since the pixel electrode 161 of the front row and the pixel electrode 161 of the rear row are connected to different data lines 141, the two gate lines 121 can be driven simultaneously. . As a result, the data voltage charging time can be increased.

A third embodiment will be described with reference to FIG.

The pixel electrode 161 is connected to one whole, and only one thin film transistor T is provided. According to the third embodiment, the data line 141 and the like are simplified, and the driving is also simplified.

Although embodiments of the present invention have been shown and described, it will be apparent to those skilled in the art that the present embodiments may be modified without departing from the spirit or principles of the present invention. It is intended that the scope of the invention be defined by the claims appended hereto and their equivalents.

As described above, according to the present invention, a liquid crystal display device having an improved aperture ratio is provided.

Claims (12)

A first substrate including a gate line, a data line, a thin film transistor electrically connected to the gate line and the data line, and a pixel electrode connected to the thin film transistor; A second substrate disposed opposite the first substrate and including a common electrode; In the liquid crystal display device comprising a liquid crystal layer of VA (vertical alignment) mode positioned between the first substrate and the second substrate, The pixel electrode incision pattern is formed on the pixel electrode, the common electrode incision pattern is formed on the common electrode, The liquid crystal layer is divided into a plurality of domains extended by the pixel electrode incision pattern and the common electrode incision pattern. And a circumference of the pixel electrode is parallel to an extension direction of the adjacent domain. The method of claim 1, And a circumference of the pixel electrode has a square shape. The method of claim 2, And a circumference of the pixel electrode is not parallel to an extension direction of the gate line. The method according to claim 1 or 2, And one side of the circumference of the pixel electrode is about 45 degrees to the extending direction of the gate line. The method according to claim 3 or 4, Wherein one side of the pixel electrode faces one side of the neighboring pixel electrode. The method of claim 5, The thin film transistor includes a first thin film transistor and a second thin film transistor, which are simultaneously driven. The pixel electrode includes a first pixel electrode separated from each other and connected to the first thin film transistor, and a second pixel electrode connected to the second thin film transistor. The method of claim 6, And the first thin film transistor and the second thin film transistor are connected to different data lines. The method of claim 7, wherein And the first thin film transistor and the second thin film transistor are positioned at a central portion of the pixel electrode. The method of claim 8, And the pixel electrode connected to the front gate line and the pixel electrode connected to the rear gate line are sequentially driven. The method of claim 7, wherein Four data lines are disposed across the pixel electrode. And the thin film transistor is connected to a pair of the data lines located inside the thin film transistor. The method of claim 10, And the gate lines are driven in pairs adjacent to each other. The method of claim 7, wherein And the gate line passes through a central portion of the pixel electrode.

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