KR20080021992A - Semiconductor package having metal patterned connection film and method for fabricating the same - Google Patents

Abstract

A semiconductor package having a metal patterned connection film and a method for fabricating the same are provided to connect upper and lower semiconductor chips using the metal patterned film, without using a chip interposer. A substrate(210) has at least one substrate connection terminal(211) formed on an upper surface thereof and plural solder ball pad(231) formed on a lower surface. A first semiconductor chip(230) is flip-chip bonded to the substrate, and a second semiconductor chip(270) is mounted on the first semiconductor chip. A connection film(100) connects the first and second semiconductor chips, and has an adhesive layer(170) adhered to the first semiconductor chip and a metal patterned layer(150). The metal patterned layer is connected with the substrate connection terminal via a first wire.

Description

Semiconductor package having metal patterned connection film and method for fabricating the same

1A to 1E are cross-sectional views of a metal patterned connection film of a semiconductor package of the present invention.

2 is a cross-sectional view of a semiconductor package according to an embodiment of the present invention.

3 is a cross-sectional view of a semiconductor package in accordance with another embodiment of the present invention.

4 is a cross-sectional view of a semiconductor package according to another embodiment of the present invention.

5A through 5D are cross-sectional views illustrating a method of manufacturing a semiconductor package in accordance with an embodiment of the present invention.

6A through 6C are diagrams for describing a method of manufacturing a semiconductor package according to another embodiment of the present invention.

7A to 7D are diagrams for describing a method of manufacturing a semiconductor package according to another embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

100: connection film 210, 310, 410: substrate

230, 270, 330, 370, 430: semiconductor chip

The present invention relates to a semiconductor package, and more particularly, to a semiconductor package having a metal patterned connection film and a method of manufacturing the same.

Nowadays, electronic products such as portable PCs and portable telephones are tending to be thin and short, and accordingly, semiconductor products applied to the portable electronic products are becoming smaller and more versatile. In order to increase the capacity of a semiconductor product, the degree of integration of a unit semiconductor device should be increased. In order to increase the degree of integration of such a unit semiconductor device, a reduction in design rules, that is, fine pattern technology is required.

In order to increase the capacity and expand the functions of semiconductor packages, the degree of integration in a wafer state is gradually increasing, and semiconductor packages using two or more semiconductor chips or semiconductor packages integrated into one are becoming common. Such integrated semiconductor packages include a system in package (SIP), a multi chip package (MCP), and a package on package (POP). In general, SIP can be divided into stacking wire bonded semiconductor chips and stacking flip chips when stacking hetero semiconductor chips on the back surface of a flip chip. When stacking wire bonded semiconductor chips or stacking flip chips, an interposer must be used to connect upper and lower semiconductor chips. The use of the interposer increases the height of the semiconductor package and increases the cost.

Accordingly, the technical problem to be achieved by the present invention is to provide a semiconductor package having a metal-patterned connection film and a method of manufacturing the same.

In order to achieve the above object of the present invention, the semiconductor package of the present invention includes a substrate having one or more substrate connection terminals on its upper surface, and a plurality of solder ball pads on the lower surface facing the upper surface; A first semiconductor chip flip-bonded on the substrate; And a second semiconductor chip stacked on the first semiconductor chip. The connection film connects the first and second semiconductor chips and includes a pressure-sensitive adhesive layer and a metal pattern layer attached to the first semiconductor chip. The metal pattern layer of the connection film and the substrate connection terminal of the substrate are connected through a first wire.

An encapsulant is formed on the upper surface of the substrate to encapsulate the first and second semiconductor chips and the second wire.

The semiconductor wafer may include a contact member arranged between the connection film and the second semiconductor chip to attach the connection film and the second semiconductor chip; And a second wire connecting the chip pad of the semiconductor chip to the substrate connection terminal of the connection film.

The second semiconductor chip further includes a plurality of solder ball pads, and the solder ball pads are flip chip bonded to the substrate connection terminal of the connection film.

In addition, the semiconductor package of the present invention includes a substrate having one or more substrate connection terminals on its upper surface; A first adhesive layer attached on the substrate, a metal pattern layer arranged on the first adhesive layer, a portion of the metal pattern layer exposed on the first adhesive layer and the metal pattern layer A connection film having a second adhesive layer arranged; And a semiconductor chip attached to the second adhesive layer of the connection film and having a chip pad. The first wire connects the exposed metal pattern layer of the connection pad and the substrate connection terminal of the substrate, and the second wire connects the substrate connection terminal of the substrate and the exposed metal pattern layer of the connection pad. Connect it.

First, the method for manufacturing a semiconductor package of the present invention includes a wafer on which a plurality of first semiconductor chips are arranged, each of which includes a plurality of solder ball pads, and a sticky layer, an adhesive layer, and a metal pattern layer sequentially stacked on a base film. Prepare a connecting film. Subsequently, the adhesive layer of the connection film is separated from the base film to attach the semiconductor chips onto the adhesive layer, respectively. The solder ball pad of the first semiconductor chip to which the connection film is attached is attached onto a substrate having a substrate connection terminal on an upper surface thereof. A second semiconductor chip having a chip pad on its top surface is attached on the connecting film. Through the wire bonding process, the substrate connection terminal of the substrate and the metal pattern layer of the connection film are connected through a first wire.

In addition, in the method of manufacturing a semiconductor package of the present invention, first, a substrate having one or more substrate connection terminals on its upper surface is prepared. A semiconductor wafer including a plurality of semiconductor chips having a chip pad is provided. A sticky layer sequentially stacked on a base film, a first adhesive layer, a metal pattern layer arranged on the first adhesive layer, and a second pattern arranged on the metal pattern layer and the first adhesive layer to expose the metal pattern layer. A connection film having an adhesive layer is prepared. The first and second adhesive layers are individually patterned to correspond to each of the semiconductor chips, wherein the second adhesive layer has a size corresponding to the size of the semiconductor chip, and the first adhesive layer is the metal pattern layer. It has a larger size than the second adhesive layer so as to be exposed. The second adhesive layer of the connection film is separated from the base film, and the first adhesive layer of the connection film having the semiconductor layer attached to the second adhesive layer is attached onto the substrate. The exposed metal pattern layer of the connection pad and the substrate connection terminal of the substrate are connected through a first wire through a wire bonding process, and the substrate connection terminal of the substrate and the chip pad of the semiconductor chip are connected to each other. And connecting through a wire.

The method of attaching the connecting film having the semiconductor layer attached on the second adhesive layer of the connecting film on the upper surface of the substrate may include attaching the semiconductor chip on the second adhesive layer of the connecting film, and then The first adhesive layer is separated from the base film and attached to the substrate, or the first adhesive layer of the connecting film is separated from the base film and attached to the top surface of the substrate, and then The semiconductor chip is attached onto the second adhesive layer.

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings. However, embodiments of the present invention may be modified in many different forms, and the scope of the present invention should not be construed as being limited by the embodiments described below. Embodiments of the present invention are provided to more completely explain the present invention to those skilled in the art. Accordingly, the shape and the like of the elements in the drawings are exaggerated to emphasize a more clear description, and the elements denoted by the same reference numerals in the drawings means the same elements.

1A to 1E illustrate cross-sectional views of a metal patterned connection film of a semiconductor package of the present invention. The connection film 100 serves to connect the upper and lower semiconductor chips or the substrate and the semiconductor chip to each other in the stack type semiconductor package.

1A and 1B, the connection film 100 includes a sticky layer 130, a metal pattern layer 150, and an adhesive layer 170 sequentially stacked on the base film 110. Or a sticky layer 130 and a metal pattern layer 150. The adhesive layer 170 is formed on the entire surface of the base film 110, so that the connection film 100 is advantageous when bonding the semiconductor chip in the wafer state before the sawing process of the semiconductor wafer.

1C to 1E, the connection film 100 includes a sticky layer 130, a metal pattern layer 150, and an adhesive layer 170 sequentially stacked on the base film 110, or a sticky layer ( 130, an adhesive layer 170, and a metal pattern layer 150 may be provided. In addition, the connection film 100 may include a sticky layer 130, a first adhesive layer 170, a metal pattern layer 150, and a second adhesive layer 190 sequentially stacked on the base film 110. Can be. Since the adhesive layers 170 and 190 are patterned in units of semiconductor chips, the connection film 170 is advantageous when the semiconductor films are bonded to individual semiconductor chips after the sawing process of the semiconductor wafer.

2 illustrates a cross-sectional view of a semiconductor package according to an embodiment of the present invention. Referring to FIG. 2, in the semiconductor package 200, a first semiconductor chip 230 and a second semiconductor chip 270 are stacked on a substrate 210, and the first semiconductor chip 230 and the second semiconductor chip are stacked. Chip 270 is connected by a connection film (100). The substrate 210 includes a plurality of solder ball pads 213 arranged on a lower surface thereof, and one or more substrate connection terminals 211 arranged on an upper surface opposite to the lower surface. Although not shown in the drawing, the substrate 210 may further include a circuit wiring pattern. The first semiconductor chip 230 is flip chip bonded to the substrate 210 so that a solder ball pad 231 of the first semiconductor chip 230 is attached to an upper surface of the substrate 210 and the solder ball pad 231. ) Is covered by the underfill material 233.

The second semiconductor chip 270 is stacked on the first semiconductor chip 230, and is stacked through the connection film 100. The connection film 100 includes an adhesive layer 170 and a plurality of metal pattern layers 150 adhered to an upper surface of the first semiconductor chip 230. The connection film 100 and the second semiconductor chip 270 are bonded through an adhesive member 250 such as an adhesive tape. The chip pad (not shown) of the second semiconductor chip 27 and the metal pattern layer 150 of the connection film 100 are wire bonded through wires 281 and 283, and the substrate 210 is formed. The substrate connection terminal 211 is wire bonded through the metal pattern layer 150 and the wire 285 of the connection film 100. An upper surface of the substrate 210 including the first and second semiconductor chips 230 and 270 and the wires 181, 183, and 185 may be encapsulated with an encapsulant 290 such as an epoxy molding compound to form the wire ( 181, 183, and 185 and the first and second semiconductor chips 230 and 270 are protected from external impact.

3 illustrates a cross-sectional view of a semiconductor package in accordance with another embodiment of the present invention. Referring to FIG. 3, in the semiconductor package 300, the second semiconductor chip 370 is attached to the connection film 100 through the adhesive member 250, instead of the semiconductor package 200 of FIG. 2. Since only the chip 370 is flip chip bonded to the connection film 100, a detailed description thereof will be omitted. Therefore, since the solder ball pad 371 of the second semiconductor chip 370 is attached to the metal pattern layer 150 of the connection film 100, the chip pad of the second semiconductor chip 370 (not shown in the drawing). And the metal pattern layer 150 of the connection film 100 is not wire bonded through the wire.

4 illustrates a cross-sectional view of a semiconductor package in accordance with another embodiment of the present invention. Referring to FIG. 4, the semiconductor package 400 attaches a single semiconductor chip 430 to the substrate 410 through the connection film 100. The substrate 410 has one or more substrate connection terminals 411 arranged on an upper surface thereof. Although not shown in the drawing, the substrate 410 may further include a circuit wiring pattern. The connection film 100 may include a first adhesive layer 170 for adhering to the substrate 410, a plurality of metal pattern layers 150, and a second adhesive layer for adhering to the semiconductor chip 430. 190). The second adhesive layer 190 preferably has a size corresponding to the size of the semiconductor chip 430, and the first adhesive layer 170 is formed so that a portion of the metal pattern layer 150 is exposed. It is preferable to have a size larger than the one adhesive layer 170.

The chip pad 431 of the semiconductor chip 430 is wire-bonded with the exposed metal pattern layer 150 of the connection film 100 through a wire 481, and a substrate connection terminal of the substrate 410 ( 411 is wire bonded to the exposed metal pattern layer 150 of the connection film 100 through a wire 485. The upper surface of the substrate 410 including the semiconductor chip 430 and the wires 481 and 485 is encapsulated with an encapsulant 490 such as an epoxy molding compound, so that the wires 481 and 485 and the semiconductor chip ( 430 is protected from external impact.

5A through 5D are cross-sectional views illustrating a method of manufacturing a semiconductor package in accordance with an embodiment of the present invention. Referring to FIG. 5A, first, a connection film 100 and a wafer 230a in which the sticky layer 130, the metal pattern layer 150, and the adhesive layer 170 are sequentially stacked on the base film 110 are prepared. . In the wafer 230a, first semiconductor chips 230 are arranged in a plurality of semiconductor chip regions divided by scribe lanes 230c, and each of the first semiconductor chips 230 includes a plurality of solder ball pads 231. Is arranged. The wafer 230a is attached onto the adhesive layer 170 of the connection film 100.

Referring to FIG. 5B, the wafer 230a is cut through a sawing process using a blade 205 or a laser along the scribe lane 230c. At this time, each of the first semiconductor chip 230 is separately separated, but is maintained in the form of a wafer since the connection film 100 is not completely cut. Subsequently, referring to FIG. 5C, only the adhesive layer 170 and the metal pattern layer 150 attached to the first semiconductor chip 230 of the connection film 100 are separated from the base film 110. Referring to FIG. 5D, the separated first semiconductor chip 230 is flip chip bonded to the substrate 210. The solder ball pads 231 of the first semiconductor chip 230 are attached to the upper surface of the substrate 210.

Referring back to FIG. 2, the solder ball pad 231 is covered with an underfill material 233, and the second semiconductor chip 270 is formed on the first semiconductor chip 230 using the connection member 250. After attaching them, the substrate connecting terminal 211 of the substrate 210 and the metal pattern layer 150 of the connecting film 100 are connected by a wire 285 through a wire bonding process and the connecting film 100. The chip pads of the metal pattern layer 150 and the second semiconductor layer 270 are connected to the wires 281 and 283. Subsequently, the encapsulant 290 is formed on the upper surface of the substrate 210 by performing a molding process, and the solder ball pad 213 is formed on the rear surface of the substrate 210 to manufacture the semiconductor package 200.

The manufacturing method of the semiconductor package shown in FIG. 3 is also the same as the manufacturing method shown in FIGS. 5A to 5D. However, as shown in FIG. 5D, the first semiconductor chip 330 is flip chip bonded onto the substrate 310, and then the second semiconductor chip 370 and the connection film 100 are flip chip bonded. The solder ball pads 371 of the second semiconductor chip 370 are attached to the metal pattern layer 150 of the connection film 100 and cover the solder ball pads 371 with an underfill material 373. Subsequently, as in the exemplary embodiment, the substrate connection terminal 311 of the substrate 310 and the metal pattern layer 150 of the connection film 100 are connected through the wire 385 through a wire bonding process. The encapsulant 390 is formed on the upper surface of the substrate 310 through a molding process, and the solder ball 313 is formed on the lower surface of the substrate 310 through the solder ball process to form the semiconductor package 300.

6A to 6D are diagrams for describing a method of manufacturing a semiconductor package according to another embodiment of the present invention. 6A and 6B, first, the connection film 100 and the wafer 230a in which the sticky layer 130, the metal pattern layer 150, and the adhesive layer 170 are sequentially stacked on the base film 110. Prepare. In this case, the adhesive layer 170 is patterned so as to be separately separated from the semiconductor chip 230 arranged on the wafer 230. In the wafer 230a, first semiconductor chips 230 are arranged in a plurality of semiconductor chip regions divided by scribe lanes 230c, and each of the first semiconductor chips 230 has a plurality of solder ball pads (FIG. 6C). 231) is arranged. At this time, although not shown in the drawing, the wafer 230a is attached to the wafer mounting film through an adhesive. The wafer 230a is cut through the sawing process using a blade or a laser along the scribe lane 230c.

Referring to FIG. 6C, the first semiconductor chip 230 is attached to the adhesive layer 170 of the connection film 100, respectively. Referring to FIG. 2, only the adhesive layer 170 and the metal pattern layer 150 attached to the first semiconductor chip 230 of the connection film 100 are separated from the base film 110, and then the The solder ball pads 231 of the semiconductor chip 230 are attached to the upper surface of the substrate 210. Since the manufacturing process of the semiconductor package 200 is the same as above, and the manufacturing process of the semiconductor package 200 of FIG. 3 is also the same as above, it will be omitted here.

7A to 7D are diagrams for describing a method of manufacturing a semiconductor package according to another embodiment of the present invention. 4, 7A, and 7B, the sticky layer 130, the first adhesive layer 170, the metal pattern layer 150, and the second adhesive layer 170 are sequentially stacked on the base film 110. The prepared connection film 100 is prepared. The first adhesive layer 190 of the connection film 100 is attached to the substrate 410 in a subsequent process, and is individually patterned to have a larger area than the semiconductor chip 430. The second adhesive layer 190 is a portion to which the semiconductor chip 430 is attached and has a size corresponding to that of the semiconductor chip 430. The first adhesive layer 170 has a larger size than the second adhesive layer 190 so that the metal pattern layer 150 is exposed.

4 and 7C, a plurality of semiconductor chips 430 to be attached on the connection film 100 are prepared. The semiconductor chips 430 are attached to the second adhesive layer 190 of the connection film 100, respectively. Subsequently, the wire connecting process connects the substrate connection terminal 411 of the substrate 410 and the metal pattern layer 150 of the connection film 100 with a wire 485 and the metal pattern layer of the connection film 100. The chip pad 431 of the semiconductor layer 430 is connected to the wire 150 by a wire 481. The semiconductor package 400 is manufactured by forming an encapsulant 490 on the upper surface of the substrate 410 by performing a molding process.

In other embodiments of FIGS. 7A to 7C, the semiconductor chip 430 is attached to the connection film 100, and then the connection film 100 is attached to the substrate 410. The first adhesive layer 170, the metal pattern layer 150, and the second adhesive layer 190 of the substrate 100 are separated from the base film 110, and then the first adhesive layer 170 is separated from the substrate. The semiconductor package 400 may be manufactured by attaching the semiconductor chip 430 on the second adhesive layer 190 of the connection film 100. FIG. 7D illustrates a planar structure in which the connection film 100 is attached on the substrate 410 without the semiconductor chip 430 attached.

As described in detail above, according to the semiconductor package of the present invention and a method of manufacturing the same, by connecting the upper and lower semiconductor chips using a metal patterned film, do not use a chip interposer, thereby It can reduce height, simplify process and reduce manufacturing costs. In addition, the present invention by attaching a semiconductor chip on the substrate using a metal patterned film to connect the metal pattern layer of the substrate and the film by a wire, it is possible to implement a fine pitch between the lead on the substrate as well as to the process window during wire bonding It is possible to increase the manufacturing cost can be prevented by increasing the number of layers of the substrate.

Although the present invention has been described in detail with reference to preferred embodiments, the present invention is not limited to the above embodiments, and various modifications may be made by those skilled in the art within the scope of the technical idea of the present invention. .

Claims (12)

A substrate having one or more substrate connection terminals on an upper surface thereof and a plurality of solder ball pads on a lower surface opposite to the upper surface; A first semiconductor chip flip-bonded on the substrate; A second semiconductor chip stacked on the first semiconductor chip; A connection film connecting the first and second semiconductor chips to each other, the adhesive film being attached to the first semiconductor chip and a metal pattern layer; And And a metal patterned film including a first wire connecting the metal pattern layer of the connection film to the substrate connection terminal of the substrate. The metal patterned film of claim 1, further comprising an encapsulant formed on the upper surface of the substrate to encapsulate the first and second semiconductor chips and the second wire. Semiconductor package. The semiconductor device of claim 1, further comprising: a contact member arranged between the connection film and the second semiconductor chip to attach the connection film and the second semiconductor chip; And a second wire connecting the chip pad of the semiconductor chip to the substrate connection terminal of the connection film. The semiconductor having a metal patterned film of claim 1, wherein the second semiconductor chip further comprises a plurality of solder ball pads, wherein the solder ball pads are flip chip bonded to the substrate connector of the connection film. package. A substrate having one or more substrate connection terminals on an upper surface thereof; A first adhesive layer attached on the substrate, a metal pattern layer arranged on the first adhesive layer, a portion of the metal pattern layer exposed on the first adhesive layer and the metal pattern layer A connection film having a second adhesive layer arranged; A semiconductor chip attached to the second adhesive layer of the connection film and having a chip pad; A first wire connecting the exposed metal pattern layer of the connection pad to the substrate connection terminal of the substrate; And And a second patterned wire connecting the substrate connection terminal of the substrate to the exposed metal pattern layer of the connection pad. Providing a wafer having a plurality of first semiconductor chips, each of which includes a plurality of solder ball pads, and a connecting film including a sticky layer, an adhesive layer, and a metal pattern layer sequentially stacked on a base film; Separating the adhesive layer of the connection film from the base film and attaching the semiconductor chips to the adhesive layer, respectively; Attaching the solder ball pad of the first semiconductor chip to which the connection film is attached, on a substrate having a substrate connection terminal on an upper surface thereof; Attaching a second semiconductor chip having a chip pad on its top surface on the connection film; And And connecting the substrate connection terminal of the substrate and the metal pattern layer of the connection film through a first wire through a wire bonding process. . The metal patterned film of claim 6, further comprising forming an encapsulant for encapsulating the first and second semiconductor chips and the second wire on the upper surface of the substrate. Method for manufacturing a semiconductor package provided. 7. The method of claim 6, further comprising providing a connection member on the connection film between the step of attaching the semiconductor chip on the substrate and the step of attaching the second semiconductor chip. A method of manufacturing a semiconductor package with a metal patterned film, characterized in that for attaching a chip to the connection member through the connection member. The semiconductor package with a metal patterned film according to claim 8, wherein the chip pad of the semiconductor chip and the substrate connecting terminal of the connecting film are connected through a second wire during the wire bonding process. Way. The semiconductor device of claim 6, wherein the second semiconductor chip further comprises a plurality of solder ball pads, wherein the second semiconductor chip is flip chip bonded to the first semiconductor chip so that the solder ball pad is connected to the substrate connection terminal of the connection film. A method of manufacturing a semiconductor package having a metal patterned film, characterized in that attached. Preparing a substrate having one or more substrate connection terminals on an upper surface thereof; A semiconductor wafer comprising a plurality of semiconductor chips including chip pads is provided, and a sticky layer sequentially stacked on a base film, a first adhesive layer, a metal pattern layer arranged on the first adhesive layer, and the metal pattern layer And a second adhesive layer arranged on the metal pattern layer and the first adhesive layer so as to be exposed, and the first and second adhesive layers are individually patterned to correspond to each of the semiconductor chips, wherein the second adhesive layer is Providing a connection film having a size corresponding to that of the semiconductor chip, wherein the first adhesive layer has a larger size than the second adhesive layer to expose the metal pattern layer; Separating the second adhesive layer of the connection film from the base film and attaching the first adhesive layer of the connection film having the semiconductor layer attached to the second adhesive layer on the substrate; And The exposed metal pattern layer of the connection pad and the substrate connection terminal of the substrate are connected through a first wire through a wire bonding process, and the substrate connection terminal of the substrate and the chip pad of the semiconductor chip are connected to each other. A method of manufacturing a semiconductor package having a metal patterned film comprising the step of connecting through a wire. 12. The method of claim 11, wherein the attaching the connecting film having the semiconductor layer on the second adhesive layer of the connecting film on the upper surface of the substrate comprises attaching the semiconductor chip on the second adhesive layer of the connecting film. And then attach the first adhesive layer of the connecting film to the substrate by separating it from the base film or attaching the first adhesive layer of the connecting film to the top surface of the substrate by separating from the base film. And attaching the semiconductor chip on the second adhesive layer of the connecting film.

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