KR20080004984A - Driver and liquid crystal display comprising the same - Google Patents

Abstract

A driving device and an LCD(Liquid Crystal Display) device having the same are provided to improve display quality by adjusting driving voltages externally. A driving device includes a DC/DC(Direct Current) converter(760), a control voltage generator(710), and a feedback signal generator(750). The DC/DC converter converts the voltage level of input voltage according to the voltage level of feedback signals and outputs driving voltages according to the conversion result. The control voltage generator receives external data signals and outputs control voltages. The feedback signal generator receives the driving voltages, distributes the received voltages, outputs the feedback signals according to the distribution result, and adjusts the voltage level of the feedback signals using the control voltages.

Description

Driver and liquid crystal display including the same {Driver and liquid crystal display comprising the same}

1 is a block diagram illustrating a driving apparatus according to an embodiment of the present invention.

FIG. 2 is a block diagram of the control voltage generator of FIG. 1.

3 is an internal circuit diagram of a feedback signal generator.

4 is an internal circuit diagram of the DC-DC converter of FIG. 1.

5 is a block diagram illustrating a control voltage generator of a driving apparatus according to another exemplary embodiment of the present invention.

6 is a block diagram illustrating a liquid crystal display according to exemplary embodiments of the present invention.

FIG. 7 is an equivalent circuit diagram of one pixel of FIG. 6.

(Explanation of symbols for the main parts of the drawing)

10: liquid crystal display device 100: first display panel

150: liquid crystal layer 200: second display panel

300: liquid crystal panel assembly 400: gate driver

500: data driver 600: signal controller

700: driving device 710: control voltage generator

720: digital-to-analog converter 730: memory

740: counter 750: feedback signal generation unit

760: DC-DC converter section 800: gray voltage generator

The present invention relates to a driving device and a liquid crystal display including the same, and more particularly, to a driving device capable of improving display quality and a liquid crystal display including the same.

The liquid crystal display device drives a first display panel including a pixel electrode, a second display panel including a common electrode, a liquid crystal layer having dielectric anisotropy injected between the first display panel and the second display panel, and a plurality of gate lines. A gate driver, a data driver for outputting a data signal, and a driving device for generating and outputting a gray voltage, a gate driving voltage, and a common electrode voltage.

The data driver receives image data, which is a digital signal, and selects an image data voltage corresponding to the input image data from among a plurality of gray voltages provided from the gray voltage generator and applies the image data voltage to the pixel electrode. The liquid crystal is arranged in accordance with the potential difference between the pixel electrode to which the image data voltage is applied and the common electrode, thereby displaying a predetermined image.

The gray voltage generator generates a plurality of levels of gray voltage by voltage-dividing the driving voltage AVDD. If the driving voltage AVDD is changed due to a change in transmittance of the liquid crystal panel or an error in a circuit element, the image signal is distorted. Therefore, it is necessary to adjust the voltage level of the driving voltage to improve the display quality.

The technical problem to be solved by the present invention is to provide a driving apparatus which can improve display quality.

Another object of the present invention is to provide a liquid crystal display device capable of improving display quality.

The technical problem of the present invention is not limited to the technical problem mentioned above, and other technical problems not mentioned will be clearly understood by those skilled in the art from the following description.

According to an aspect of the present invention, there is provided a driving apparatus including a DC-DC converter for boosting an input voltage and outputting a driving voltage according to a voltage level of a feedback signal, and receiving and controlling an external data signal. A control voltage providing unit for outputting a voltage, and a feedback signal generator for receiving the driving voltage and the control voltage and divide the voltage to output the feedback signal.

According to another aspect of the present invention, a liquid crystal display device receives a DC-DC converter unit for boosting an input voltage and outputs a driving voltage according to a voltage level of a feedback signal, and receives an external data signal. A driving device including a control voltage providing unit for outputting a control voltage, a feedback signal generating unit configured to receive the driving voltage and the control voltage and divide the voltage to output the feedback signal, and a plurality of gray levels of the driving voltage provided from the driving device. A gray voltage generator for converting the voltage into a voltage; a data driver configured to receive the plurality of gray voltages to provide an image data voltage corresponding to image data provided from the outside; and a liquid crystal panel assembly to display an image according to the gray voltages. do.

Specific details of other embodiments are included in the detailed description and the drawings.

Advantages and features of the present invention and methods for achieving them will be apparent with reference to the embodiments described below in detail with the accompanying drawings. The embodiments disclosed below relate to a driving device and a liquid crystal display device having the same, but the present invention is not limited thereto, and the present invention is not limited thereto. The embodiments are provided only to make the disclosure of the present invention complete, and to fully convey the scope of the invention to those skilled in the art to which the present invention pertains. It is only defined by categories. Like reference numerals refer to like elements throughout.

1 is a block diagram illustrating a driving apparatus according to an embodiment of the present invention.

Referring to FIG. 1, the driving apparatus 700 according to an exemplary embodiment of the present invention includes a control voltage generator 710, a feedback signal generator 750, and a DC-DC converter 760.

The DC-DC converter 760 outputs a driving voltage AVDD whose voltage level changes according to the voltage level of the feedback signal FB. The voltage level of the feedback signal FB is determined according to the control voltage CONVOL to which the external data signal SDL is converted and the voltage level of the feedback drive voltage AVDD. That is, the voltage level of the driving voltage AVDD may be adjusted by providing the external data signal SDL from the outside.

In detail, the control voltage generator 710 receives the external data signal SDL and the clock signal SCL from the outside and outputs the control voltage CONVOL. The external data signal SDL may be a digital signal provided by the producer or user to adjust the driving voltage AVDD.

The control voltage generator 710 may be controlled by an Inter Integrated Circuit (I ² C) interface, which is one of the digital serial interfaces. I ² C interface refers to a method for data communication between a master and a slave. That is, when a producer or a user inputs an external data signal SDL through a master (not shown), the producer or user inputs the external data signal SDL to the control voltage CONVOL generator 710 of the driving device 700 that is a slave, and the external data signal SDL. ) Is input through a serial data line (not shown), and the clock signal SCL is input through a serial clock line (not shown).

Therefore, the control voltage generator 710 receives the external data signal SDL from the producer or the user, converts the external data signal SDL, and outputs the control voltage CONVOL. An internal circuit of the control voltage generator 710 will be described later with reference to FIG. 2.

The feedback signal generator 750 receives the control voltage CONVOL and the driving voltage AVDD to divide the voltage to provide the feedback signal FB to the DC-DC converter 760. Here, the voltage level of the feedback signal FB changes according to the voltage level of the control voltage CONVOL or the voltage level of the driving voltage AVDD. The feedback signal generator 750 may be formed of a plurality of resistors, and an internal circuit will be described later with reference to FIG. 3.

The DC-DC converter 760 outputs the driving voltage AVDD by converting the voltage level of the input voltage Vin according to the voltage level of the feedback signal FB. Here, the DC-DC converter 760 may be a boost converter, and an internal circuit and an operation thereof will be described later with reference to FIG. 4.

FIG. 2 is a block diagram of the control voltage generator of FIG. 1.

Referring to FIG. 2, the control voltage generator 710 includes a digital analog converter 720 and a memory 730.

The digital analog converter 720 receives the clock signal SCL and the external data signal SDL and outputs a control voltage CONVOL. When the control voltage generator 710 is controlled by the I ² C interface, the external data signal SDL is transmitted in units of bytes. That is, the external data signal SDL in the digital unit in byte unit is converted into the control voltage CONVOL in the analog form.

The memory 730 stores the external data signal SDL. Therefore, even when the external data signal SDL is not provided from the outside, the external data signal SDL is provided to the digital analog converter 720 so that the digital analog converter 720 continuously outputs the control voltage CONVOL. . The memory may be a nonvolatile memory, and may be an EEPROM or an Erasable Programmable Read-Only Memory (EPROM).

3 is an internal circuit diagram of a feedback signal generator.

The feedback signal generator 750 includes a first resistor R1 connected between the output node N1 to which the driving voltage AVDD is output and the feedback node N2 to which the feedback signal FB is output, and the feedback node N2. ) And a second resistor R2 coupled between the ground node and the third resistor R3 to which the control voltage CONVOL is input.

Referring to the operation, the driving voltage is input and divided by the first resistor R1 and the second resistor R2 to output the feedback signal FB, but the control voltage CONVOL is used to control the feedback signal FB. Adjust the voltage level.

In detail, the driving voltage AVDD is fed back to divide the voltage by the first resistor R1 and the second resistor R2, and the control voltage CONVOL is the second resistor R2 and the third resistor R3. Voltage distribution by That is, the predetermined voltage in which the driving voltage AVDD is divided by the first and second resistors R1 and R2 and the voltage in which the control voltage CONVOL is divided by the second and third resistors R2 and R3 are divided. The feedback signal FB having a voltage level at which a predetermined voltage overlaps is output. Therefore, the voltage level of the feedback signal FB is adjusted by the control voltage CONVOL.

4 is an internal circuit diagram of the DC-DC converter of FIG. 1.

Referring to FIG. 4, the DC-DC converter 760 is a boost converter. An inductor L to which an input voltage Vin, which is a direct current, is applied, and an anode is connected and driven to the inductor L. A diode D having a cathode connected to the output terminal of the voltage AVDD, a capacitor C connected between the cathode of the diode D and a ground and outputting a driving voltage AVDD, and an anode terminal of the diode D A PWM signal generator 762 is connected to provide a pulse signal (PULSE).

Referring to the operation, the PWM signal generator 762 outputs a pulse signal PULSE whose duty ratio changes according to the voltage level of the feedback signal FB, and according to the duty ratio of the pulse signal PULSE. The driving voltage AVDD whose voltage level changes is output.

The process of changing the duty ratio of the pulse signal PULSE according to the voltage level of the feedback signal FB will be described in detail. The PWM signal generator 762 compares the feedback signal FB with a reference voltage (not shown). If different from the reference voltage (not shown), the pulse signal PULSE whose duty ratio is increased or decreased is output. For example, when the feedback signal FB is greater than the reference voltage (not shown), a pulse signal PULSE having a large duty ratio is output. When the feedback signal FB is smaller than the reference voltage (not shown), the pulse having a small duty ratio is output. Output the signal PULSE. Here, as the duty ratio of the pulse signal PULSE is smaller, the voltage level of the driving voltage AVDD increases.

The process of changing the voltage level of the driving voltage AVDD according to the duty ratio of the pulse signal PULSE will be described in detail. When the pulse signal PULSE is at a low level, the current and voltage characteristics of the inductor L are changed. In proportion to the input voltage Vin applied across the inductor L, the current I _L flowing through the inductor _L is gradually increased. Here, the longer the time at which the low level of the pulse signal PULSE is longer, the larger the current I _L flowing through the inductor _L becomes. At this time, the driving voltage AVDD is outputted with the voltage charged in the capacitor C.

When the pulse signal PULSE is at a high level, the current I _L flowing through the inductor L flows through the diode D, and a voltage is charged in the capacitor C according to the current and voltage characteristics of the capacitor C. do. Therefore, the input voltage Vin is boosted to a predetermined voltage and output as the driving voltage AVDD.

As described above, the duty ratio of the pulse signal PULSE is changed according to the voltage level of the feedback signal FB, and the driving voltage AVDD is stepped up or decompressed according to the duty ratio of the pulse signal PULSE.

Accordingly, such a driving device (see 700 of FIG. 1) externally inputs an external data signal (see SDL of FIG. 1) to adjust a feedback signal (see FB of FIG. 1), and adjusts the feedback signal (see FB of FIG. 1). The driving voltage AVDD can be adjusted through the reference S1, thereby improving display quality of the liquid crystal display.

5 is a block diagram illustrating a control voltage CONVOL generator 710 of the driving apparatus 700 according to another exemplary embodiment of the present invention. The same reference numerals are used for the same elements as those of FIG. 2, and detailed descriptions of the corresponding elements will be omitted for convenience of description.

Referring to FIG. 5, a counter 740, a digital analog converter 720, and a memory 730 are included.

The control voltage generator 710 receives an external data signal SDL for adjusting the driving voltage AVDD, where the external data signal SDL is a high level or low level pulse type signal.

That is, the counter 740 receives the external data signal SDL in the form of a pulse, counts the high level and the low level, and outputs the digital external data signal SDL '. Here, the counter 740 may be an up / down counter that increases or decreases according to a high level or a low level.

The digital-to-analog converter 720 receives the digital external data signal SDL 'and outputs the analog control voltage CONVOL, and the memory 730 stores the digital external data signal SDL'. .

That is, the driving voltage may be adjusted by providing an external data signal SDL in the form of a pulse from the outside.

FIG. 6 is a block diagram illustrating a liquid crystal display according to example embodiments. FIG.

FIG. 7 is an equivalent circuit diagram of one pixel of FIG. 6.

Referring to FIG. 6, the liquid crystal display 10 according to the exemplary embodiments of the present invention includes a liquid crystal panel assembly 300, a gate driver 400, a data driver 500, and a data driver 500 connected thereto. And a gray voltage generator 800 connected to the signal, and a signal controller 600 and a driving device 700 for controlling the gray voltage generator 800.

The liquid crystal panel assembly 300 includes a plurality of display signal lines G1 -Gn and D1 -Dm and a plurality of pixels PX connected to the display signal lines G1 -Gn and D1 -Dm and arranged in a matrix form.

The display signal lines G1 -Gn and D1 -Dm include a plurality of gate lines G1 -Gn for transmitting a gate signal and a plurality of data lines D1 -Dm for transmitting a data signal. The gate lines G1 -Gn extend substantially in the row direction and are substantially parallel to each other, and the data lines D1 -Dm extend substantially in the column direction and are substantially parallel to each other.

Here, referring to FIG. 7, the liquid crystal panel assembly 300 includes a first display panel 100, a second display panel 200, and a liquid crystal layer 150 interposed therebetween.

The color filter CF may be formed in a portion of the common electrode CE of the second display panel 200 to face the pixel electrode PE of the first display panel 100. Each pixel, for example, a pixel connected to the i-th (i = 1, 2, ..., n) gate line Gi and the j-th (j = 1, 2, ..., m) data line Dj, is connected to the signal line Gi. And a switching element Q connected to Dj, a liquid crystal capacitor Clc, and a storage capacitor Cst connected thereto. The holding capacitor Cst can be omitted as necessary.

Meanwhile, the gate driver 400 of FIG. 6 is connected to the gate lines G1 -Gn to apply a gate signal formed of a combination of the gate-on voltage Von and the gate-off voltage Voff to the gate lines G1 -Gn. do.

The gate driver 400 applies the gate-on voltage Von to the gate lines G1 -Gn according to the gate control signal CONT1 from the signal controller 600, and is connected to the gate lines G1 -Gn. Turns on the switching element (Q). Then, the data signal applied to the data lines D1 -Dm is applied to the pixel PX through the switching element Q turned on.

The difference between the voltage of the data signal applied to the pixel PX and the common voltage Vcom is charged in the liquid crystal capacitor Clc to serve as the pixel voltage. The arrangement of the liquid crystal molecules varies according to the magnitude of the pixel voltage. Accordingly, the polarization of the light passing through the liquid crystal layer 150 changes, thereby displaying an image.

The data driver 500 is connected to the data lines D1 -Dm of the liquid crystal panel assembly 300 to select an image data voltage corresponding to the image data DAT from among the gray voltages provided from the gray voltage generator 800. And the selected image data voltage pixel. Here, when the gray voltage generator 800 does not provide all the voltages for all grays, but only the basic gray voltages, the data driver 500 divides the basic gray voltages to generate gray voltages for all grays. The video data voltage can be selected from these.

The gate driver 400 or the data driver 500 may be mounted directly on the liquid crystal panel assembly 300 in the form of a plurality of driving integrated circuit chips, or may be mounted on a flexible printed circuit film (not shown). The liquid crystal panel assembly 300 may be attached to the liquid crystal panel assembly 300 in the form of a tape carrier package. Alternatively, the gate driver 400 or the data driver 500 may be integrated in the liquid crystal panel assembly 300 together with the display signal lines G1 -Gn and D1 -Dm and the positioning element Q.

The signal controller 600 receives the input image signals R, G, and B and an input control signal for controlling the display thereof from an external graphic controller (not shown). Examples of the input control signal include a vertical sync signal Vsinc, a vertical sync signal Hsync, a main clock MCLK, and a data enable signal DE.

The signal controller 600 generates a gate control signal CONT1 and a data control signal CONT2 based on the input image signals R, G, and B and the input control signal, and generates the gate control signal CONT1 by the gate driver 400. ), The data control signal CONT2 and the image data DAT are sent to the data driver 500.

Meanwhile, the driving device 700 receives an external data signal SDL and a clock signal SCL from the outside and outputs a driving voltage AVDD. The output driving voltage AVDD is provided to the gray voltage generator, and is provided to the gate on / off voltage generator (not shown) and the common voltage generator (not shown) to provide the gate on / off voltages (Von, Voff) and The common voltage Vcom is output. The driving device 700 may include a gate on / off voltage generator (not shown) and a common voltage generator (not shown).

Although the driving device 700 is the driving device 700 described with reference to FIGS. 1 to 4, the driving device 700 is not limited thereto and may be the driving device described with reference to FIG.

The gray voltage generator 800 receives the driving voltage AVDD from the driving device 700 to generate the gray voltage.

The gray voltage generator 800 includes a plurality of resistors connected in series between the node to which the driving voltage AVDD is applied and the ground to distribute the voltage levels of the driving voltage AVDD to generate the gray voltage. Not shown. The internal circuit of the gray voltage generator 800 is not limited thereto, and may be variously implemented.

Since the liquid crystal display 10 may adjust the driving voltage AVDD from the outside, the display quality may be improved despite problems such as changes in liquid crystal panel transmittance or errors in circuit elements.

Although embodiments of the present invention have been described above with reference to the accompanying drawings, those skilled in the art to which the present invention pertains may implement the present invention in other specific forms without changing the technical spirit or essential features thereof. I can understand that. Therefore, it should be understood that the embodiments described above are exemplary in all respects and not restrictive.

As described above, the driving device and the liquid crystal display including the same according to the present invention have the following effects.

First, despite the change in the transmittance of the liquid crystal panel or the error of the circuit element, the driving voltage can be adjusted to a certain level.

Second, since the driving voltage can be adjusted externally, display quality can be improved.

Claims (8)

A DC-DC converter unit converting the voltage level of the input voltage according to the voltage level of the feedback signal and outputting a driving voltage; A control voltage generator configured to receive an external data signal and output a control voltage; And And a feedback signal generator configured to receive the driving voltage and divide the voltage to output the feedback signal, and to adjust the voltage level of the feedback signal by the control voltage. The method of claim 1, The control voltage generator includes a digital to analog converter for outputting the control voltage corresponding to the external data signal. The method of claim 2, The control voltage generator further includes a memory for storing the external data signal. The method of claim 1, The feedback signal generator may include a first resistor connected between an output node at which a driving voltage is output and a feedback node at which the feedback signal is output, a second resistor connected between the feedback node and the ground node, the feedback node, and the And a third resistor connected between the control voltage providing units. The method of claim 1, The control voltage generator includes a counter for counting a high level or a low level of the external data signal, and a driving device including a digital analog converter for converting the output signal of the counter into an analog control voltage signal. The method of claim 5, The control voltage generator further includes a memory for storing the output signal of the counter. The method of claim 1, The DC-DC converter is a boost converter for boosting the voltage level of the input voltage. A drive device according to any one of claims 1 to 7; A gray voltage generator which converts a driving voltage provided from the driving device into a plurality of gray voltages; A data driver configured to receive the plurality of gray voltages and provide an image data voltage corresponding to image data provided from the outside; And And a liquid crystal panel assembly configured to display an image according to the gray voltage.

Images